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| author | LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com> | 2020-12-07 10:37:07 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-12-07 10:37:07 +0100 |
| commit | 567ea726e173040ae931a37bc85fd6cd92b69363 (patch) | |
| tree | 5b6487d4821c978659732d5f34abf5aa69b0dafa /ARMeilleure/CodeGen/X86/PreAllocator.cs | |
| parent | 668720b0883106fc1f44da70dddb8a3502ac7dbb (diff) | |
Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630)
* Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths).
* Ptc.InternalVersion = 1630
* Nits.
* Address comments.
* Update Ptc.cs
* Address comment.
Diffstat (limited to 'ARMeilleure/CodeGen/X86/PreAllocator.cs')
| -rw-r--r-- | ARMeilleure/CodeGen/X86/PreAllocator.cs | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/ARMeilleure/CodeGen/X86/PreAllocator.cs b/ARMeilleure/CodeGen/X86/PreAllocator.cs index 3aaf315a..4969fa43 100644 --- a/ARMeilleure/CodeGen/X86/PreAllocator.cs +++ b/ARMeilleure/CodeGen/X86/PreAllocator.cs @@ -114,6 +114,16 @@ namespace ARMeilleure.CodeGen.X86 node = HandleVectorInsert8(block.Operations, node, operation); } break; + + case Instruction.Extended: + IntrinsicOperation intrinOp = (IntrinsicOperation)operation; + + if (intrinOp.Intrinsic == Intrinsic.X86Mxcsrmb || intrinOp.Intrinsic == Intrinsic.X86Mxcsrub) + { + int stackOffset = stackAlloc.Allocate(OperandType.I32); + operation.SetSources(new Operand[] { Const(stackOffset), operation.GetSource(0) }); + } + break; } } } |