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authorgdkchan <gab.dark.100@gmail.com>2018-04-04 16:36:07 -0300
committergdkchan <gab.dark.100@gmail.com>2018-04-04 16:36:07 -0300
commit7fe12ad169256c9c08cd59b288bcb7e688773a1a (patch)
tree2084f8ecd81a7dfe4bc51d6561d719061fd72288
parente0c3d9c8dfe317c3c65267efa5c4e2014d9727a6 (diff)
Add FNEG (vector) instruction
-rw-r--r--ChocolArm64/AOpCodeTable.cs3
-rw-r--r--ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs5
2 files changed, 7 insertions, 1 deletions
diff --git a/ChocolArm64/AOpCodeTable.cs b/ChocolArm64/AOpCodeTable.cs
index 4bcf6c1d..eacbd236 100644
--- a/ChocolArm64/AOpCodeTable.cs
+++ b/ChocolArm64/AOpCodeTable.cs
@@ -206,7 +206,8 @@ namespace ChocolArm64
Set("000111100x1xxxxx000010xxxxxxxxxx", AInstEmit.Fmul_S, typeof(AOpCodeSimdReg));
Set("0>1011100<1xxxxx110111xxxxxxxxxx", AInstEmit.Fmul_V, typeof(AOpCodeSimdReg));
Set("0x0011111<<xxxxx1001x0xxxxxxxxxx", AInstEmit.Fmul_Ve, typeof(AOpCodeSimdRegElemF));
- Set("000111100x100001010000xxxxxxxxxx", AInstEmit.Fneg_S, typeof(AOpCodeSimdReg));
+ Set("000111100x100001010000xxxxxxxxxx", AInstEmit.Fneg_S, typeof(AOpCodeSimd));
+ Set("0>1011101<100000111110xxxxxxxxxx", AInstEmit.Fneg_V, typeof(AOpCodeSimd));
Set("000111110x1xxxxx0xxxxxxxxxxxxxxx", AInstEmit.Fnmadd_S, typeof(AOpCodeSimdReg));
Set("000111110x1xxxxx1xxxxxxxxxxxxxxx", AInstEmit.Fnmsub_S, typeof(AOpCodeSimdReg));
Set("000111100x1xxxxx100010xxxxxxxxxx", AInstEmit.Fnmul_S, typeof(AOpCodeSimdReg));
diff --git a/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs b/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs
index f2e80d2b..fd6228ad 100644
--- a/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs
+++ b/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs
@@ -221,6 +221,11 @@ namespace ChocolArm64.Instruction
EmitScalarUnaryOpF(Context, () => Context.Emit(OpCodes.Neg));
}
+ public static void Fneg_V(AILEmitterCtx Context)
+ {
+ EmitVectorUnaryOpF(Context, () => Context.Emit(OpCodes.Neg));
+ }
+
public static void Fnmadd_S(AILEmitterCtx Context)
{
AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;