From 002ecbea190de16294d32449c3d2b61e57490dae Mon Sep 17 00:00:00 2001 From: ReinUsesLisp Date: Mon, 29 Apr 2019 23:28:28 -0300 Subject: shader_ir/memory: Emit AL2P IR --- src/video_core/shader/decode/memory.cpp | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'src/video_core/shader/decode/memory.cpp') diff --git a/src/video_core/shader/decode/memory.cpp b/src/video_core/shader/decode/memory.cpp index ea1092db1..4aa74965f 100644 --- a/src/video_core/shader/decode/memory.cpp +++ b/src/video_core/shader/decode/memory.cpp @@ -12,6 +12,8 @@ #include "video_core/engines/shader_bytecode.h" #include "video_core/shader/shader_ir.h" +#pragma optimize("", off) + namespace VideoCommon::Shader { using Tegra::Shader::Attribute; @@ -239,6 +241,21 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) { } break; } + case OpCode::Id::AL2P: { + // Ignore al2p.direction since we don't care about it. + + // Calculate emulation fake physical address. + const Node fixed_address{Immediate(static_cast(instr.al2p.address))}; + const Node reg{GetRegister(instr.gpr8)}; + const Node fake_address{Operation(OperationCode::IAdd, NO_PRECISE, reg, fixed_address)}; + + // Set the fake address to target register. + SetRegister(bb, instr.gpr0, fake_address); + + // Signal the shader IR to declare all possible attributes and varyings + use_physical_attributes = true; + break; + } default: UNIMPLEMENTED_MSG("Unhandled memory instruction: {}", opcode->get().GetName()); } -- cgit v1.2.3 From 06b363c9b5ccb64cfe7ac4d001ae35bff30828de Mon Sep 17 00:00:00 2001 From: ReinUsesLisp Date: Mon, 29 Apr 2019 23:37:09 -0300 Subject: shader: Remove unused AbufNode Ipa mode --- src/video_core/shader/decode/memory.cpp | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'src/video_core/shader/decode/memory.cpp') diff --git a/src/video_core/shader/decode/memory.cpp b/src/video_core/shader/decode/memory.cpp index 4aa74965f..84db4d4dc 100644 --- a/src/video_core/shader/decode/memory.cpp +++ b/src/video_core/shader/decode/memory.cpp @@ -50,16 +50,13 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) { UNIMPLEMENTED_IF_MSG((instr.attribute.fmt20.immediate.Value() % sizeof(u32)) != 0, "Unaligned attribute loads are not supported"); - Tegra::Shader::IpaMode input_mode{Tegra::Shader::IpaInterpMode::Pass, - Tegra::Shader::IpaSampleMode::Default}; - u64 next_element = instr.attribute.fmt20.element; auto next_index = static_cast(instr.attribute.fmt20.index.Value()); const auto LoadNextElement = [&](u32 reg_offset) { const Node buffer = GetRegister(instr.gpr39); - const Node attribute = GetInputAttribute(static_cast(next_index), - next_element, input_mode, buffer); + const Node attribute = + GetInputAttribute(static_cast(next_index), next_element, buffer); SetRegister(bb, instr.gpr0.Value() + reg_offset, attribute); -- cgit v1.2.3 From 71aa9d08772eb07ccae7b141e032e6e7e57871a1 Mon Sep 17 00:00:00 2001 From: ReinUsesLisp Date: Tue, 30 Apr 2019 18:12:30 -0300 Subject: shader_ir/memory: Implement physical input attributes --- src/video_core/shader/decode/memory.cpp | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'src/video_core/shader/decode/memory.cpp') diff --git a/src/video_core/shader/decode/memory.cpp b/src/video_core/shader/decode/memory.cpp index 84db4d4dc..339692295 100644 --- a/src/video_core/shader/decode/memory.cpp +++ b/src/video_core/shader/decode/memory.cpp @@ -50,13 +50,16 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) { UNIMPLEMENTED_IF_MSG((instr.attribute.fmt20.immediate.Value() % sizeof(u32)) != 0, "Unaligned attribute loads are not supported"); + const Node buffer{GetRegister(instr.gpr39)}; + u64 next_element = instr.attribute.fmt20.element; auto next_index = static_cast(instr.attribute.fmt20.index.Value()); const auto LoadNextElement = [&](u32 reg_offset) { - const Node buffer = GetRegister(instr.gpr39); - const Node attribute = - GetInputAttribute(static_cast(next_index), next_element, buffer); + const Node attribute{instr.attribute.fmt20.IsPhysical() + ? GetPhysicalInputAttribute(instr.gpr8, buffer) + : GetInputAttribute(static_cast(next_index), + next_element, buffer)}; SetRegister(bb, instr.gpr0.Value() + reg_offset, attribute); -- cgit v1.2.3 From fe700e1856fa078ba0fc93ced8576f5023f3146a Mon Sep 17 00:00:00 2001 From: ReinUsesLisp Date: Tue, 30 Apr 2019 19:46:49 -0300 Subject: shader: Add physical attributes commentaries --- src/video_core/shader/decode/memory.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/video_core/shader/decode/memory.cpp') diff --git a/src/video_core/shader/decode/memory.cpp b/src/video_core/shader/decode/memory.cpp index 339692295..c4f68f8ab 100644 --- a/src/video_core/shader/decode/memory.cpp +++ b/src/video_core/shader/decode/memory.cpp @@ -253,7 +253,7 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) { SetRegister(bb, instr.gpr0, fake_address); // Signal the shader IR to declare all possible attributes and varyings - use_physical_attributes = true; + uses_physical_attributes = true; break; } default: -- cgit v1.2.3 From 28bffb1ffa2585429d63c6dab8584b8e46179696 Mon Sep 17 00:00:00 2001 From: ReinUsesLisp Date: Tue, 30 Apr 2019 20:11:41 -0300 Subject: shader_ir/memory: Assert on non-32 bits ALD.PHYS --- src/video_core/shader/decode/memory.cpp | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/video_core/shader/decode/memory.cpp') diff --git a/src/video_core/shader/decode/memory.cpp b/src/video_core/shader/decode/memory.cpp index c4f68f8ab..6a992c543 100644 --- a/src/video_core/shader/decode/memory.cpp +++ b/src/video_core/shader/decode/memory.cpp @@ -49,6 +49,9 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) { "Indirect attribute loads are not supported"); UNIMPLEMENTED_IF_MSG((instr.attribute.fmt20.immediate.Value() % sizeof(u32)) != 0, "Unaligned attribute loads are not supported"); + UNIMPLEMENTED_IF_MSG(instr.attribute.fmt20.IsPhysical() && + instr.attribute.fmt20.size != Tegra::Shader::AttributeSize::Word, + "Non-32 bits PHYS reads are not implemented"); const Node buffer{GetRegister(instr.gpr39)}; -- cgit v1.2.3