From 15a0e1481d9a1efb3e3aa61cbaf2fa1ba0392d71 Mon Sep 17 00:00:00 2001 From: ReinUsesLisp Date: Thu, 20 Dec 2018 19:09:21 -0300 Subject: shader_ir: Initial implementation --- src/video_core/shader/decode/ffma.cpp | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 src/video_core/shader/decode/ffma.cpp (limited to 'src/video_core/shader/decode/ffma.cpp') diff --git a/src/video_core/shader/decode/ffma.cpp b/src/video_core/shader/decode/ffma.cpp new file mode 100644 index 000000000..2044113f0 --- /dev/null +++ b/src/video_core/shader/decode/ffma.cpp @@ -0,0 +1,24 @@ +// Copyright 2018 yuzu Emulator Project +// Licensed under GPLv2 or any later version +// Refer to the license.txt file included. + +#include "common/assert.h" +#include "common/common_types.h" +#include "video_core/engines/shader_bytecode.h" +#include "video_core/shader/shader_ir.h" + +namespace VideoCommon::Shader { + +using Tegra::Shader::Instruction; +using Tegra::Shader::OpCode; + +u32 ShaderIR::DecodeFfma(BasicBlock& bb, u32 pc) { + const Instruction instr = {program_code[pc]}; + const auto opcode = OpCode::Decode(instr); + + UNIMPLEMENTED(); + + return pc; +} + +} // namespace VideoCommon::Shader \ No newline at end of file -- cgit v1.2.3 From 148a6418ede720681f464eca928c7c445f37db79 Mon Sep 17 00:00:00 2001 From: ReinUsesLisp Date: Fri, 21 Dec 2018 17:25:49 -0300 Subject: shader_decode: Implement FFMA --- src/video_core/shader/decode/ffma.cpp | 37 ++++++++++++++++++++++++++++++++++- 1 file changed, 36 insertions(+), 1 deletion(-) (limited to 'src/video_core/shader/decode/ffma.cpp') diff --git a/src/video_core/shader/decode/ffma.cpp b/src/video_core/shader/decode/ffma.cpp index 2044113f0..0adc85476 100644 --- a/src/video_core/shader/decode/ffma.cpp +++ b/src/video_core/shader/decode/ffma.cpp @@ -16,7 +16,42 @@ u32 ShaderIR::DecodeFfma(BasicBlock& bb, u32 pc) { const Instruction instr = {program_code[pc]}; const auto opcode = OpCode::Decode(instr); - UNIMPLEMENTED(); + UNIMPLEMENTED_IF_MSG(instr.ffma.cc != 0, "FFMA cc not implemented"); + UNIMPLEMENTED_IF_MSG(instr.ffma.tab5980_0 != 1, "FFMA tab5980_0({}) not implemented", + instr.ffma.tab5980_0.Value()); // Seems to be 1 by default based on SMO + UNIMPLEMENTED_IF_MSG(instr.ffma.tab5980_1 != 0, "FFMA tab5980_1({}) not implemented", + instr.ffma.tab5980_1.Value()); + UNIMPLEMENTED_IF_MSG(instr.generates_cc, + "Condition codes generation in FFMA is not implemented"); + + const Node op_a = GetRegister(instr.gpr8); + + auto [op_b, op_c] = [&]() -> std::tuple { + switch (opcode->get().GetId()) { + case OpCode::Id::FFMA_CR: { + return {GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset), + GetRegister(instr.gpr39)}; + } + case OpCode::Id::FFMA_RR: + return {GetRegister(instr.gpr20), GetRegister(instr.gpr39)}; + case OpCode::Id::FFMA_RC: { + return {GetRegister(instr.gpr39), + GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset)}; + } + case OpCode::Id::FFMA_IMM: + return {GetImmediate19(instr), GetRegister(instr.gpr39)}; + default: + UNIMPLEMENTED_MSG("Unhandled FFMA instruction: {}", opcode->get().GetName()); + } + }(); + + op_b = GetOperandAbsNegFloat(op_b, false, instr.ffma.negate_b); + op_c = GetOperandAbsNegFloat(op_c, false, instr.ffma.negate_c); + + Node value = Operation(OperationCode::FFma, PRECISE, op_a, op_b, op_c); + value = GetSaturatedFloat(value, instr.alu.saturate_d); + + SetRegister(bb, instr.gpr0, value); return pc; } -- cgit v1.2.3 From fc46ecddb3bca4861babbf610cd64ab9fdc1bb08 Mon Sep 17 00:00:00 2001 From: ReinUsesLisp Date: Fri, 21 Dec 2018 18:47:22 -0300 Subject: video_core: Return safe values after an assert hits --- src/video_core/shader/decode/ffma.cpp | 1 + 1 file changed, 1 insertion(+) (limited to 'src/video_core/shader/decode/ffma.cpp') diff --git a/src/video_core/shader/decode/ffma.cpp b/src/video_core/shader/decode/ffma.cpp index 0adc85476..a17ebd6db 100644 --- a/src/video_core/shader/decode/ffma.cpp +++ b/src/video_core/shader/decode/ffma.cpp @@ -42,6 +42,7 @@ u32 ShaderIR::DecodeFfma(BasicBlock& bb, u32 pc) { return {GetImmediate19(instr), GetRegister(instr.gpr39)}; default: UNIMPLEMENTED_MSG("Unhandled FFMA instruction: {}", opcode->get().GetName()); + return {Immediate(0), Immediate(0)}; } }(); -- cgit v1.2.3 From 2d6c064e66bac4cb871aa26a12066441a8852008 Mon Sep 17 00:00:00 2001 From: ReinUsesLisp Date: Thu, 27 Dec 2018 16:50:36 -0300 Subject: shader_decode: Improve zero flag implementation --- src/video_core/shader/decode/ffma.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/video_core/shader/decode/ffma.cpp') diff --git a/src/video_core/shader/decode/ffma.cpp b/src/video_core/shader/decode/ffma.cpp index a17ebd6db..f3ab3d2e8 100644 --- a/src/video_core/shader/decode/ffma.cpp +++ b/src/video_core/shader/decode/ffma.cpp @@ -21,8 +21,6 @@ u32 ShaderIR::DecodeFfma(BasicBlock& bb, u32 pc) { instr.ffma.tab5980_0.Value()); // Seems to be 1 by default based on SMO UNIMPLEMENTED_IF_MSG(instr.ffma.tab5980_1 != 0, "FFMA tab5980_1({}) not implemented", instr.ffma.tab5980_1.Value()); - UNIMPLEMENTED_IF_MSG(instr.generates_cc, - "Condition codes generation in FFMA is not implemented"); const Node op_a = GetRegister(instr.gpr8); @@ -52,6 +50,7 @@ u32 ShaderIR::DecodeFfma(BasicBlock& bb, u32 pc) { Node value = Operation(OperationCode::FFma, PRECISE, op_a, op_b, op_c); value = GetSaturatedFloat(value, instr.alu.saturate_d); + SetInternalFlagsFromFloat(bb, value, instr.generates_cc); SetRegister(bb, instr.gpr0, value); return pc; -- cgit v1.2.3 From 170c8212bbb10129dfbaed8eb7ab67138c932af2 Mon Sep 17 00:00:00 2001 From: ReinUsesLisp Date: Fri, 28 Dec 2018 20:00:36 -0300 Subject: shader_ir: Pass to decoder functions basic block's code --- src/video_core/shader/decode/ffma.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/video_core/shader/decode/ffma.cpp') diff --git a/src/video_core/shader/decode/ffma.cpp b/src/video_core/shader/decode/ffma.cpp index f3ab3d2e8..be8dc2230 100644 --- a/src/video_core/shader/decode/ffma.cpp +++ b/src/video_core/shader/decode/ffma.cpp @@ -12,7 +12,7 @@ namespace VideoCommon::Shader { using Tegra::Shader::Instruction; using Tegra::Shader::OpCode; -u32 ShaderIR::DecodeFfma(BasicBlock& bb, u32 pc) { +u32 ShaderIR::DecodeFfma(BasicBlock& bb, const BasicBlock& code, u32 pc) { const Instruction instr = {program_code[pc]}; const auto opcode = OpCode::Decode(instr); -- cgit v1.2.3