From bec7d3111d3de2a7a8384b1e761bc3692afef9c7 Mon Sep 17 00:00:00 2001
From: ameerj <52414509+ameerj@users.noreply.github.com>
Date: Mon, 1 Mar 2021 00:25:15 -0500
Subject: shader: Make IMNMX, SHR, SEL stylistically more consistent

---
 .../frontend/maxwell/translate/impl/integer_shift_right.cpp           | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/integer_shift_right.cpp')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/integer_shift_right.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/integer_shift_right.cpp
index a34ccb851..4025b1358 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/integer_shift_right.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/integer_shift_right.cpp
@@ -16,7 +16,7 @@ void SHR(TranslatorVisitor& v, u64 insn, const IR::U32& shift) {
         BitField<39, 1, u64> is_wrapped;
         BitField<40, 1, u64> brev;
         BitField<43, 1, u64> xmode;
-        BitField<48, 1, u64> is_arithmetic;
+        BitField<48, 1, u64> is_signed;
     } const shr{insn};
 
     if (shr.xmode != 0) {
@@ -29,7 +29,7 @@ void SHR(TranslatorVisitor& v, u64 insn, const IR::U32& shift) {
     }
     IR::U32 result;
     const IR::U32 safe_shift = shr.is_wrapped == 0 ? shift : v.ir.BitwiseAnd(shift, v.ir.Imm32(31));
-    if (shr.is_arithmetic == 1) {
+    if (shr.is_signed == 1) {
         result = IR::U32{v.ir.ShiftRightArithmetic(base, safe_shift)};
     } else {
         result = IR::U32{v.ir.ShiftRightLogical(base, safe_shift)};
-- 
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