From 2d48a7b4d0666ad16d03a22d85712617a0849046 Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Sat, 9 Jan 2021 03:30:07 -0300
Subject: shader: Initial recompiler work

---
 .../frontend/maxwell/translate/impl/impl.h         | 316 +++++++++++++++++++++
 1 file changed, 316 insertions(+)
 create mode 100644 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
new file mode 100644
index 000000000..bc607b002
--- /dev/null
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -0,0 +1,316 @@
+// Copyright 2021 yuzu Emulator Project
+// Licensed under GPLv2 or any later version
+// Refer to the license.txt file included.
+
+#include "shader_recompiler/environment.h"
+#include "shader_recompiler/frontend/ir/basic_block.h"
+#include "shader_recompiler/frontend/ir/ir_emitter.h"
+#include "shader_recompiler/frontend/maxwell/instruction.h"
+
+namespace Shader::Maxwell {
+
+class TranslatorVisitor {
+public:
+    explicit TranslatorVisitor(Environment& env_, IR::Block& block) : env{env_} ,ir(block) {}
+
+    Environment& env;
+    IR::IREmitter ir;
+
+    void AL2P(u64 insn);
+    void ALD(u64 insn);
+    void AST(u64 insn);
+    void ATOM_cas(u64 insn);
+    void ATOM(u64 insn);
+    void ATOMS_cas(u64 insn);
+    void ATOMS(u64 insn);
+    void B2R(u64 insn);
+    void BAR(u64 insn);
+    void BFE_reg(u64 insn);
+    void BFE_cbuf(u64 insn);
+    void BFE_imm(u64 insn);
+    void BFI_reg(u64 insn);
+    void BFI_rc(u64 insn);
+    void BFI_cr(u64 insn);
+    void BFI_imm(u64 insn);
+    void BPT(u64 insn);
+    void BRA(u64 insn);
+    void BRK(u64 insn);
+    void BRX(u64 insn);
+    void CAL(u64 insn);
+    void CCTL(u64 insn);
+    void CCTLL(u64 insn);
+    void CONT(u64 insn);
+    void CS2R(u64 insn);
+    void CSET(u64 insn);
+    void CSETP(u64 insn);
+    void DADD_reg(u64 insn);
+    void DADD_cbuf(u64 insn);
+    void DADD_imm(u64 insn);
+    void DEPBAR(u64 insn);
+    void DFMA_reg(u64 insn);
+    void DFMA_rc(u64 insn);
+    void DFMA_cr(u64 insn);
+    void DFMA_imm(u64 insn);
+    void DMNMX_reg(u64 insn);
+    void DMNMX_cbuf(u64 insn);
+    void DMNMX_imm(u64 insn);
+    void DMUL_reg(u64 insn);
+    void DMUL_cbuf(u64 insn);
+    void DMUL_imm(u64 insn);
+    void DSET_reg(u64 insn);
+    void DSET_cbuf(u64 insn);
+    void DSET_imm(u64 insn);
+    void DSETP_reg(u64 insn);
+    void DSETP_cbuf(u64 insn);
+    void DSETP_imm(u64 insn);
+    void EXIT(u64 insn);
+    void F2F_reg(u64 insn);
+    void F2F_cbuf(u64 insn);
+    void F2F_imm(u64 insn);
+    void F2I_reg(u64 insn);
+    void F2I_cbuf(u64 insn);
+    void F2I_imm(u64 insn);
+    void FADD_reg(u64 insn);
+    void FADD_cbuf(u64 insn);
+    void FADD_imm(u64 insn);
+    void FADD32I(u64 insn);
+    void FCHK_reg(u64 insn);
+    void FCHK_cbuf(u64 insn);
+    void FCHK_imm(u64 insn);
+    void FCMP_reg(u64 insn);
+    void FCMP_rc(u64 insn);
+    void FCMP_cr(u64 insn);
+    void FCMP_imm(u64 insn);
+    void FFMA_reg(u64 insn);
+    void FFMA_rc(u64 insn);
+    void FFMA_cr(u64 insn);
+    void FFMA_imm(u64 insn);
+    void FFMA32I(u64 insn);
+    void FLO_reg(u64 insn);
+    void FLO_cbuf(u64 insn);
+    void FLO_imm(u64 insn);
+    void FMNMX_reg(u64 insn);
+    void FMNMX_cbuf(u64 insn);
+    void FMNMX_imm(u64 insn);
+    void FMUL_reg(u64 insn);
+    void FMUL_cbuf(u64 insn);
+    void FMUL_imm(u64 insn);
+    void FMUL32I(u64 insn);
+    void FSET_reg(u64 insn);
+    void FSET_cbuf(u64 insn);
+    void FSET_imm(u64 insn);
+    void FSETP_reg(u64 insn);
+    void FSETP_cbuf(u64 insn);
+    void FSETP_imm(u64 insn);
+    void FSWZADD(u64 insn);
+    void GETCRSPTR(u64 insn);
+    void GETLMEMBASE(u64 insn);
+    void HADD2_reg(u64 insn);
+    void HADD2_cbuf(u64 insn);
+    void HADD2_imm(u64 insn);
+    void HADD2_32I(u64 insn);
+    void HFMA2_reg(u64 insn);
+    void HFMA2_rc(u64 insn);
+    void HFMA2_cr(u64 insn);
+    void HFMA2_imm(u64 insn);
+    void HFMA2_32I(u64 insn);
+    void HMUL2_reg(u64 insn);
+    void HMUL2_cbuf(u64 insn);
+    void HMUL2_imm(u64 insn);
+    void HMUL2_32I(u64 insn);
+    void HSET2_reg(u64 insn);
+    void HSET2_cbuf(u64 insn);
+    void HSET2_imm(u64 insn);
+    void HSETP2_reg(u64 insn);
+    void HSETP2_cbuf(u64 insn);
+    void HSETP2_imm(u64 insn);
+    void I2F_reg(u64 insn);
+    void I2F_cbuf(u64 insn);
+    void I2F_imm(u64 insn);
+    void I2I_reg(u64 insn);
+    void I2I_cbuf(u64 insn);
+    void I2I_imm(u64 insn);
+    void IADD_reg(u64 insn);
+    void IADD_cbuf(u64 insn);
+    void IADD_imm(u64 insn);
+    void IADD3_reg(u64 insn);
+    void IADD3_cbuf(u64 insn);
+    void IADD3_imm(u64 insn);
+    void IADD32I(u64 insn);
+    void ICMP_reg(u64 insn);
+    void ICMP_rc(u64 insn);
+    void ICMP_cr(u64 insn);
+    void ICMP_imm(u64 insn);
+    void IDE(u64 insn);
+    void IDP_reg(u64 insn);
+    void IDP_imm(u64 insn);
+    void IMAD_reg(u64 insn);
+    void IMAD_rc(u64 insn);
+    void IMAD_cr(u64 insn);
+    void IMAD_imm(u64 insn);
+    void IMAD32I(u64 insn);
+    void IMADSP_reg(u64 insn);
+    void IMADSP_rc(u64 insn);
+    void IMADSP_cr(u64 insn);
+    void IMADSP_imm(u64 insn);
+    void IMNMX_reg(u64 insn);
+    void IMNMX_cbuf(u64 insn);
+    void IMNMX_imm(u64 insn);
+    void IMUL_reg(u64 insn);
+    void IMUL_cbuf(u64 insn);
+    void IMUL_imm(u64 insn);
+    void IMUL32I(u64 insn);
+    void IPA(u64 insn);
+    void ISBERD(u64 insn);
+    void ISCADD_reg(u64 insn);
+    void ISCADD_cbuf(u64 insn);
+    void ISCADD_imm(u64 insn);
+    void ISCADD32I(u64 insn);
+    void ISET_reg(u64 insn);
+    void ISET_cbuf(u64 insn);
+    void ISET_imm(u64 insn);
+    void ISETP_reg(u64 insn);
+    void ISETP_cbuf(u64 insn);
+    void ISETP_imm(u64 insn);
+    void JCAL(u64 insn);
+    void JMP(u64 insn);
+    void JMX(u64 insn);
+    void KIL(u64 insn);
+    void LD(u64 insn);
+    void LDC(u64 insn);
+    void LDG(u64 insn);
+    void LDL(u64 insn);
+    void LDS(u64 insn);
+    void LEA_hi_reg(u64 insn);
+    void LEA_hi_cbuf(u64 insn);
+    void LEA_lo_reg(u64 insn);
+    void LEA_lo_cbuf(u64 insn);
+    void LEA_lo_imm(u64 insn);
+    void LEPC(u64 insn);
+    void LONGJMP(u64 insn);
+    void LOP_reg(u64 insn);
+    void LOP_cbuf(u64 insn);
+    void LOP_imm(u64 insn);
+    void LOP3_reg(u64 insn);
+    void LOP3_cbuf(u64 insn);
+    void LOP3_imm(u64 insn);
+    void LOP32I(u64 insn);
+    void MEMBAR(u64 insn);
+    void MOV_reg(u64 insn);
+    void MOV_cbuf(u64 insn);
+    void MOV_imm(u64 insn);
+    void MOV32I(u64 insn);
+    void MUFU(u64 insn);
+    void NOP(u64 insn);
+    void OUT_reg(u64 insn);
+    void OUT_cbuf(u64 insn);
+    void OUT_imm(u64 insn);
+    void P2R_reg(u64 insn);
+    void P2R_cbuf(u64 insn);
+    void P2R_imm(u64 insn);
+    void PBK(u64 insn);
+    void PCNT(u64 insn);
+    void PEXIT(u64 insn);
+    void PIXLD(u64 insn);
+    void PLONGJMP(u64 insn);
+    void POPC_reg(u64 insn);
+    void POPC_cbuf(u64 insn);
+    void POPC_imm(u64 insn);
+    void PRET(u64 insn);
+    void PRMT_reg(u64 insn);
+    void PRMT_rc(u64 insn);
+    void PRMT_cr(u64 insn);
+    void PRMT_imm(u64 insn);
+    void PSET(u64 insn);
+    void PSETP(u64 insn);
+    void R2B(u64 insn);
+    void R2P_reg(u64 insn);
+    void R2P_cbuf(u64 insn);
+    void R2P_imm(u64 insn);
+    void RAM(u64 insn);
+    void RED(u64 insn);
+    void RET(u64 insn);
+    void RRO_reg(u64 insn);
+    void RRO_cbuf(u64 insn);
+    void RRO_imm(u64 insn);
+    void RTT(u64 insn);
+    void S2R(u64 insn);
+    void SAM(u64 insn);
+    void SEL_reg(u64 insn);
+    void SEL_cbuf(u64 insn);
+    void SEL_imm(u64 insn);
+    void SETCRSPTR(u64 insn);
+    void SETLMEMBASE(u64 insn);
+    void SHF_l_reg(u64 insn);
+    void SHF_l_imm(u64 insn);
+    void SHF_r_reg(u64 insn);
+    void SHF_r_imm(u64 insn);
+    void SHFL(u64 insn);
+    void SHL_reg(u64 insn);
+    void SHL_cbuf(u64 insn);
+    void SHL_imm(u64 insn);
+    void SHR_reg(u64 insn);
+    void SHR_cbuf(u64 insn);
+    void SHR_imm(u64 insn);
+    void SSY(u64 insn);
+    void ST(u64 insn);
+    void STG(u64 insn);
+    void STL(u64 insn);
+    void STP(u64 insn);
+    void STS(u64 insn);
+    void SUATOM_cas(u64 insn);
+    void SULD(u64 insn);
+    void SURED(u64 insn);
+    void SUST(u64 insn);
+    void SYNC(u64 insn);
+    void TEX(u64 insn);
+    void TEX_b(u64 insn);
+    void TEXS(u64 insn);
+    void TLD(u64 insn);
+    void TLD_b(u64 insn);
+    void TLD4(u64 insn);
+    void TLD4_b(u64 insn);
+    void TLD4S(u64 insn);
+    void TLDS(u64 insn);
+    void TMML(u64 insn);
+    void TMML_b(u64 insn);
+    void TXA(u64 insn);
+    void TXD(u64 insn);
+    void TXD_b(u64 insn);
+    void TXQ(u64 insn);
+    void TXQ_b(u64 insn);
+    void VABSDIFF(u64 insn);
+    void VABSDIFF4(u64 insn);
+    void VADD(u64 insn);
+    void VMAD(u64 insn);
+    void VMNMX(u64 insn);
+    void VOTE(u64 insn);
+    void VOTE_vtg(u64 insn);
+    void VSET(u64 insn);
+    void VSETP(u64 insn);
+    void VSHL(u64 insn);
+    void VSHR(u64 insn);
+    void XMAD_reg(u64 insn);
+    void XMAD_rc(u64 insn);
+    void XMAD_cr(u64 insn);
+    void XMAD_imm(u64 insn);
+
+    [[nodiscard]] IR::U32 X(IR::Reg reg);
+    void X(IR::Reg dest_reg, const IR::U32& value);
+
+    [[nodiscard]] IR::U32 GetCbuf(u64 insn);
+
+    [[nodiscard]] IR::U32 GetImm(u64 insn);
+
+    void SetZFlag(const IR::U1& value);
+    void SetSFlag(const IR::U1& value);
+    void SetCFlag(const IR::U1& value);
+    void SetOFlag(const IR::U1& value);
+
+    void ResetZero();
+    void ResetSFlag();
+    void ResetCFlag();
+    void ResetOFlag();
+};
+
+} // namespace Shader::Maxwell
-- 
cgit v1.2.3


From 6c4cc0cd062fbbba5349da1108d3c23cb330ca8a Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Tue, 2 Feb 2021 21:07:00 -0300
Subject: shader: SSA and dominance

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index bc607b002..8be7d6ff1 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -208,7 +208,7 @@ public:
     void P2R_reg(u64 insn);
     void P2R_cbuf(u64 insn);
     void P2R_imm(u64 insn);
-    void PBK(u64 insn);
+    void PBK();
     void PCNT(u64 insn);
     void PEXIT(u64 insn);
     void PIXLD(u64 insn);
@@ -252,7 +252,7 @@ public:
     void SHR_reg(u64 insn);
     void SHR_cbuf(u64 insn);
     void SHR_imm(u64 insn);
-    void SSY(u64 insn);
+    void SSY();
     void ST(u64 insn);
     void STG(u64 insn);
     void STL(u64 insn);
-- 
cgit v1.2.3


From d24a16045f0f6b0b873d5e3b5bf187c1a8c4343f Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Wed, 3 Feb 2021 16:43:04 -0300
Subject: shader: Initial instruction support

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index 8be7d6ff1..ef6d977fe 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -46,7 +46,7 @@ public:
     void DADD_reg(u64 insn);
     void DADD_cbuf(u64 insn);
     void DADD_imm(u64 insn);
-    void DEPBAR(u64 insn);
+    void DEPBAR();
     void DFMA_reg(u64 insn);
     void DFMA_rc(u64 insn);
     void DFMA_cr(u64 insn);
@@ -298,9 +298,14 @@ public:
     [[nodiscard]] IR::U32 X(IR::Reg reg);
     void X(IR::Reg dest_reg, const IR::U32& value);
 
+    [[nodiscard]] IR::U32 GetReg20(u64 insn);
+    [[nodiscard]] IR::U32 GetReg39(u64 insn);
+
     [[nodiscard]] IR::U32 GetCbuf(u64 insn);
 
-    [[nodiscard]] IR::U32 GetImm(u64 insn);
+    [[nodiscard]] IR::U32 GetImm20(u64 insn);
+
+    [[nodiscard]] IR::U32 GetImm32(u64 insn);
 
     void SetZFlag(const IR::U1& value);
     void SetSFlag(const IR::U1& value);
-- 
cgit v1.2.3


From be94ee88d227d0d3dbeabe9ade98bacd910c7a7e Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Fri, 5 Feb 2021 19:19:36 -0300
Subject: shader: Make typed IR

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 6 ++++++
 1 file changed, 6 insertions(+)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index ef6d977fe..b701605d7 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -296,12 +296,18 @@ public:
     void XMAD_imm(u64 insn);
 
     [[nodiscard]] IR::U32 X(IR::Reg reg);
+    [[nodiscard]] IR::F32 F(IR::Reg reg);
+
     void X(IR::Reg dest_reg, const IR::U32& value);
+    void F(IR::Reg dest_reg, const IR::F32& value);
 
     [[nodiscard]] IR::U32 GetReg20(u64 insn);
     [[nodiscard]] IR::U32 GetReg39(u64 insn);
+    [[nodiscard]] IR::F32 GetReg20F(u64 insn);
+    [[nodiscard]] IR::F32 GetReg39F(u64 insn);
 
     [[nodiscard]] IR::U32 GetCbuf(u64 insn);
+    [[nodiscard]] IR::F32 GetCbufF(u64 insn);
 
     [[nodiscard]] IR::U32 GetImm20(u64 insn);
 
-- 
cgit v1.2.3


From 85cce78583bc2232428a8fb39e43182877c8d5ad Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Wed, 17 Feb 2021 00:59:28 -0300
Subject: shader: Primitive Vulkan integration

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index b701605d7..8bd468244 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -301,6 +301,7 @@ public:
     void X(IR::Reg dest_reg, const IR::U32& value);
     void F(IR::Reg dest_reg, const IR::F32& value);
 
+    [[nodiscard]] IR::U32 GetReg8(u64 insn);
     [[nodiscard]] IR::U32 GetReg20(u64 insn);
     [[nodiscard]] IR::U32 GetReg39(u64 insn);
     [[nodiscard]] IR::F32 GetReg20F(u64 insn);
-- 
cgit v1.2.3


From 6db69990da9f232e6d982cdcb69c2e27d93075cf Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Fri, 19 Feb 2021 18:10:18 -0300
Subject: spirv: Add lower fp16 to fp32 pass

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index 8bd468244..27aba2cf8 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -11,7 +11,7 @@ namespace Shader::Maxwell {
 
 class TranslatorVisitor {
 public:
-    explicit TranslatorVisitor(Environment& env_, IR::Block& block) : env{env_} ,ir(block) {}
+    explicit TranslatorVisitor(Environment& env_, IR::Block& block) : env{env_}, ir(block) {}
 
     Environment& env;
     IR::IREmitter ir;
-- 
cgit v1.2.3


From 704c6f353f68745168902c6c66c04bb730bd30e6 Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Sun, 21 Feb 2021 17:50:14 -0300
Subject: shader: Rename, implement FADD.SAT and P2R (imm)

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index 27aba2cf8..4d4cf2ebf 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -304,13 +304,14 @@ public:
     [[nodiscard]] IR::U32 GetReg8(u64 insn);
     [[nodiscard]] IR::U32 GetReg20(u64 insn);
     [[nodiscard]] IR::U32 GetReg39(u64 insn);
-    [[nodiscard]] IR::F32 GetReg20F(u64 insn);
-    [[nodiscard]] IR::F32 GetReg39F(u64 insn);
+    [[nodiscard]] IR::F32 GetRegFloat20(u64 insn);
+    [[nodiscard]] IR::F32 GetRegFloat39(u64 insn);
 
     [[nodiscard]] IR::U32 GetCbuf(u64 insn);
-    [[nodiscard]] IR::F32 GetCbufF(u64 insn);
+    [[nodiscard]] IR::F32 GetFloatCbuf(u64 insn);
 
     [[nodiscard]] IR::U32 GetImm20(u64 insn);
+    [[nodiscard]] IR::F32 GetFloatImm20(u64 insn);
 
     [[nodiscard]] IR::U32 GetImm32(u64 insn);
 
-- 
cgit v1.2.3


From e44752ddc8804961eb84f8c225bb36d5b4c77bc1 Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Mon, 22 Feb 2021 22:59:16 -0300
Subject: shader: FMUL, select, RRO, and MUFU fixes

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index 4d4cf2ebf..4e722e205 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -304,8 +304,8 @@ public:
     [[nodiscard]] IR::U32 GetReg8(u64 insn);
     [[nodiscard]] IR::U32 GetReg20(u64 insn);
     [[nodiscard]] IR::U32 GetReg39(u64 insn);
-    [[nodiscard]] IR::F32 GetRegFloat20(u64 insn);
-    [[nodiscard]] IR::F32 GetRegFloat39(u64 insn);
+    [[nodiscard]] IR::F32 GetFloatReg20(u64 insn);
+    [[nodiscard]] IR::F32 GetFloatReg39(u64 insn);
 
     [[nodiscard]] IR::U32 GetCbuf(u64 insn);
     [[nodiscard]] IR::F32 GetFloatCbuf(u64 insn);
@@ -314,6 +314,7 @@ public:
     [[nodiscard]] IR::F32 GetFloatImm20(u64 insn);
 
     [[nodiscard]] IR::U32 GetImm32(u64 insn);
+    [[nodiscard]] IR::F32 GetFloatImm32(u64 insn);
 
     void SetZFlag(const IR::U1& value);
     void SetSFlag(const IR::U1& value);
-- 
cgit v1.2.3


From e87a502da2d5a8356a639d53c0a16a77890de4c7 Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Wed, 24 Feb 2021 05:21:30 -0300
Subject: shader: Fix control flow

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index 4e722e205..672e140b2 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -209,7 +209,7 @@ public:
     void P2R_cbuf(u64 insn);
     void P2R_imm(u64 insn);
     void PBK();
-    void PCNT(u64 insn);
+    void PCNT();
     void PEXIT(u64 insn);
     void PIXLD(u64 insn);
     void PLONGJMP(u64 insn);
-- 
cgit v1.2.3


From e0389286165805258fa2e54014c2dc506ffb9f35 Mon Sep 17 00:00:00 2001
From: ameerj <52414509+ameerj@users.noreply.github.com>
Date: Mon, 1 Mar 2021 01:30:09 -0500
Subject: shader: Implement ISET, add common_funcs

---
 .../frontend/maxwell/translate/impl/impl.h            | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index 672e140b2..232f8c894 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -2,6 +2,8 @@
 // Licensed under GPLv2 or any later version
 // Refer to the license.txt file included.
 
+#pragma once
+
 #include "shader_recompiler/environment.h"
 #include "shader_recompiler/frontend/ir/basic_block.h"
 #include "shader_recompiler/frontend/ir/ir_emitter.h"
@@ -9,6 +11,23 @@
 
 namespace Shader::Maxwell {
 
+enum class ComparisonOp : u64 {
+    False,
+    LessThan,
+    Equal,
+    LessThanEqual,
+    GreaterThan,
+    NotEqual,
+    GreaterThanEqual,
+    True,
+};
+
+enum class BooleanOp : u64 {
+    And,
+    Or,
+    Xor,
+};
+
 class TranslatorVisitor {
 public:
     explicit TranslatorVisitor(Environment& env_, IR::Block& block) : env{env_}, ir(block) {}
-- 
cgit v1.2.3


From ce9b116cfe4fcd96df889ed8997c93c6cd2a502c Mon Sep 17 00:00:00 2001
From: ameerj <52414509+ameerj@users.noreply.github.com>
Date: Tue, 2 Mar 2021 01:05:57 -0500
Subject: Implement PSET, refactor common comparison funcs

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index 232f8c894..ad09ade7c 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -11,7 +11,7 @@
 
 namespace Shader::Maxwell {
 
-enum class ComparisonOp : u64 {
+enum class CompareOp : u64 {
     False,
     LessThan,
     Equal,
@@ -23,9 +23,9 @@ enum class ComparisonOp : u64 {
 };
 
 enum class BooleanOp : u64 {
-    And,
-    Or,
-    Xor,
+    AND,
+    OR,
+    XOR,
 };
 
 class TranslatorVisitor {
-- 
cgit v1.2.3


From 980cafdc27444484a2a2794be5de92ea18de6e27 Mon Sep 17 00:00:00 2001
From: ameerj <52414509+ameerj@users.noreply.github.com>
Date: Wed, 3 Mar 2021 00:41:05 -0500
Subject: shader: Implement LOP and LOP3

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 7 +++++++
 1 file changed, 7 insertions(+)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index ad09ade7c..c6253c40c 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -28,6 +28,13 @@ enum class BooleanOp : u64 {
     XOR,
 };
 
+enum class PredicateOp : u64 {
+    False,
+    True,
+    Zero,
+    NonZero,
+};
+
 class TranslatorVisitor {
 public:
     explicit TranslatorVisitor(Environment& env_, IR::Block& block) : env{env_}, ir(block) {}
-- 
cgit v1.2.3


From 71f96fa6366dc6dd306a953bca1b958fb32bc55a Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Sun, 14 Mar 2021 03:41:05 -0300
Subject: shader: Implement CAL inlining function calls

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index c6253c40c..45d6f5e06 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -62,7 +62,7 @@ public:
     void BRA(u64 insn);
     void BRK(u64 insn);
     void BRX(u64 insn);
-    void CAL(u64 insn);
+    void CAL();
     void CCTL(u64 insn);
     void CCTLL(u64 insn);
     void CONT(u64 insn);
-- 
cgit v1.2.3


From fa2f6e38f4d465ba6e5efe6c6bd23d8ef39b080d Mon Sep 17 00:00:00 2001
From: ameerj <52414509+ameerj@users.noreply.github.com>
Date: Tue, 16 Mar 2021 00:57:07 -0400
Subject: shader: Implement FSET and FSETP

Also fix oversight with adding SignedZeroInfNanPreserve execution mode.
---
 .../frontend/maxwell/translate/impl/impl.h            | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index 45d6f5e06..761b64666 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -35,6 +35,25 @@ enum class PredicateOp : u64 {
     NonZero,
 };
 
+enum class FPCompareOp : u64 {
+    F,
+    LT,
+    EQ,
+    LE,
+    GT,
+    NE,
+    GE,
+    NUM,
+    Nan,
+    LTU,
+    EQU,
+    LEU,
+    GTU,
+    NEU,
+    GEU,
+    T,
+};
+
 class TranslatorVisitor {
 public:
     explicit TranslatorVisitor(Environment& env_, IR::Block& block) : env{env_}, ir(block) {}
-- 
cgit v1.2.3


From 72990df7bad1c81d6ebc51179d34e1bfc71e0caf Mon Sep 17 00:00:00 2001
From: ameerj <52414509+ameerj@users.noreply.github.com>
Date: Thu, 18 Mar 2021 02:53:57 -0400
Subject: shader: Implement DADD

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 3 +++
 1 file changed, 3 insertions(+)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index 761b64666..e3e298c3b 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -351,12 +351,15 @@ public:
     [[nodiscard]] IR::U32 GetReg39(u64 insn);
     [[nodiscard]] IR::F32 GetFloatReg20(u64 insn);
     [[nodiscard]] IR::F32 GetFloatReg39(u64 insn);
+    [[nodiscard]] IR::F64 GetDoubleReg20(u64 insn);
 
     [[nodiscard]] IR::U32 GetCbuf(u64 insn);
     [[nodiscard]] IR::F32 GetFloatCbuf(u64 insn);
+    [[nodiscard]] IR::F64 GetDoubleCbuf(u64 insn);
 
     [[nodiscard]] IR::U32 GetImm20(u64 insn);
     [[nodiscard]] IR::F32 GetFloatImm20(u64 insn);
+    [[nodiscard]] IR::F64 GetDoubleImm20(u64 insn);
 
     [[nodiscard]] IR::U32 GetImm32(u64 insn);
     [[nodiscard]] IR::F32 GetFloatImm32(u64 insn);
-- 
cgit v1.2.3


From 260743f371236f7c57b01334b1c3474b15a47c39 Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Fri, 19 Mar 2021 19:28:31 -0300
Subject: shader: Add partial rasterizer integration

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index e3e298c3b..ed81d9c36 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -108,7 +108,7 @@ public:
     void DSETP_reg(u64 insn);
     void DSETP_cbuf(u64 insn);
     void DSETP_imm(u64 insn);
-    void EXIT(u64 insn);
+    void EXIT();
     void F2F_reg(u64 insn);
     void F2F_cbuf(u64 insn);
     void F2F_imm(u64 insn);
@@ -220,7 +220,7 @@ public:
     void JCAL(u64 insn);
     void JMP(u64 insn);
     void JMX(u64 insn);
-    void KIL(u64 insn);
+    void KIL();
     void LD(u64 insn);
     void LDC(u64 insn);
     void LDG(u64 insn);
-- 
cgit v1.2.3


From f91859efd259995806c2944f7941b105b58300d3 Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Sat, 20 Mar 2021 05:04:12 -0300
Subject: shader: Implement I2F

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index ed81d9c36..cb66cca25 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -356,10 +356,12 @@ public:
     [[nodiscard]] IR::U32 GetCbuf(u64 insn);
     [[nodiscard]] IR::F32 GetFloatCbuf(u64 insn);
     [[nodiscard]] IR::F64 GetDoubleCbuf(u64 insn);
+    [[nodiscard]] IR::U64 GetPackedCbuf(u64 insn);
 
     [[nodiscard]] IR::U32 GetImm20(u64 insn);
     [[nodiscard]] IR::F32 GetFloatImm20(u64 insn);
     [[nodiscard]] IR::F64 GetDoubleImm20(u64 insn);
+    [[nodiscard]] IR::U64 GetPackedImm20(u64 insn);
 
     [[nodiscard]] IR::U32 GetImm32(u64 insn);
     [[nodiscard]] IR::F32 GetFloatImm32(u64 insn);
-- 
cgit v1.2.3


From 112b8f00f0da0e031bb62a7a7a44469d3a5518a6 Mon Sep 17 00:00:00 2001
From: ameerj <52414509+ameerj@users.noreply.github.com>
Date: Sun, 21 Mar 2021 01:32:02 -0400
Subject: shader: Add FP64 register load/store helpers

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index cb66cca25..1a1073fa7 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -342,9 +342,11 @@ public:
 
     [[nodiscard]] IR::U32 X(IR::Reg reg);
     [[nodiscard]] IR::F32 F(IR::Reg reg);
+    [[nodiscard]] IR::F64 D(IR::Reg reg);
 
     void X(IR::Reg dest_reg, const IR::U32& value);
     void F(IR::Reg dest_reg, const IR::F32& value);
+    void D(IR::Reg dest_reg, const IR::F64& value);
 
     [[nodiscard]] IR::U32 GetReg8(u64 insn);
     [[nodiscard]] IR::U32 GetReg20(u64 insn);
-- 
cgit v1.2.3


From c858b8ba97d3ff79dcff0795c1184ee356f2cd1a Mon Sep 17 00:00:00 2001
From: ameerj <52414509+ameerj@users.noreply.github.com>
Date: Sun, 21 Mar 2021 02:09:14 -0400
Subject: shader: Implement DMUL and DFMA

Also add a missing const on DADD
---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index 1a1073fa7..c994fe803 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -354,6 +354,7 @@ public:
     [[nodiscard]] IR::F32 GetFloatReg20(u64 insn);
     [[nodiscard]] IR::F32 GetFloatReg39(u64 insn);
     [[nodiscard]] IR::F64 GetDoubleReg20(u64 insn);
+    [[nodiscard]] IR::F64 GetDoubleReg39(u64 insn);
 
     [[nodiscard]] IR::U32 GetCbuf(u64 insn);
     [[nodiscard]] IR::F32 GetFloatCbuf(u64 insn);
-- 
cgit v1.2.3


From 8cb9443cb99c4510e6ef26a91d09a31a8fa6281f Mon Sep 17 00:00:00 2001
From: FernandoS27 <fsahmkow27@gmail.com>
Date: Wed, 24 Mar 2021 00:02:30 +0100
Subject: shader: Fix F2I

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index c994fe803..54c31deb4 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -341,10 +341,12 @@ public:
     void XMAD_imm(u64 insn);
 
     [[nodiscard]] IR::U32 X(IR::Reg reg);
+    [[nodiscard]] IR::U64 L(IR::Reg reg);
     [[nodiscard]] IR::F32 F(IR::Reg reg);
     [[nodiscard]] IR::F64 D(IR::Reg reg);
 
     void X(IR::Reg dest_reg, const IR::U32& value);
+    void L(IR::Reg dest_reg, const IR::U64& value);
     void F(IR::Reg dest_reg, const IR::F32& value);
     void D(IR::Reg dest_reg, const IR::F64& value);
 
-- 
cgit v1.2.3


From 6c51f496320f698e123207c09ca61e55180a31b5 Mon Sep 17 00:00:00 2001
From: ameerj <52414509+ameerj@users.noreply.github.com>
Date: Sun, 28 Mar 2021 22:23:45 -0400
Subject: shader: Implement FSWZADD

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index 54c31deb4..bf7d1bae8 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -353,6 +353,7 @@ public:
     [[nodiscard]] IR::U32 GetReg8(u64 insn);
     [[nodiscard]] IR::U32 GetReg20(u64 insn);
     [[nodiscard]] IR::U32 GetReg39(u64 insn);
+    [[nodiscard]] IR::F32 GetFloatReg8(u64 insn);
     [[nodiscard]] IR::F32 GetFloatReg20(u64 insn);
     [[nodiscard]] IR::F32 GetFloatReg39(u64 insn);
     [[nodiscard]] IR::F64 GetDoubleReg20(u64 insn);
-- 
cgit v1.2.3


From 7ecc6de56ae01602b25408db8b6658d7a41a419a Mon Sep 17 00:00:00 2001
From: ameerj <52414509+ameerj@users.noreply.github.com>
Date: Fri, 23 Apr 2021 17:47:54 -0400
Subject: shader: Implement Int32 SUATOM/SURED

---
 src/shader_recompiler/frontend/maxwell/translate/impl/impl.h | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.h')

diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index bf7d1bae8..335e4f24f 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -303,6 +303,7 @@ public:
     void STL(u64 insn);
     void STP(u64 insn);
     void STS(u64 insn);
+    void SUATOM(u64 insn);
     void SUATOM_cas(u64 insn);
     void SULD(u64 insn);
     void SURED(u64 insn);
-- 
cgit v1.2.3