From 6db69990da9f232e6d982cdcb69c2e27d93075cf Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Fri, 19 Feb 2021 18:10:18 -0300
Subject: spirv: Add lower fp16 to fp32 pass

---
 .../backend/spirv/emit_spirv_floating_point.cpp    | 48 +++++++++++-----------
 1 file changed, 24 insertions(+), 24 deletions(-)

(limited to 'src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp')

diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp
index d24fbb353..9ef180531 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp
@@ -169,52 +169,52 @@ void EmitFPSaturate64(EmitContext&) {
     throw NotImplementedException("SPIR-V Instruction");
 }
 
-void EmitFPRoundEven16(EmitContext&) {
-    throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPRoundEven16(EmitContext& ctx, Id value) {
+    return ctx.OpRoundEven(ctx.F16[1], value);
 }
 
-void EmitFPRoundEven32(EmitContext&) {
-    throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPRoundEven32(EmitContext& ctx, Id value) {
+    return ctx.OpRoundEven(ctx.F32[1], value);
 }
 
-void EmitFPRoundEven64(EmitContext&) {
-    throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPRoundEven64(EmitContext& ctx, Id value) {
+    return ctx.OpRoundEven(ctx.F64[1], value);
 }
 
-void EmitFPFloor16(EmitContext&) {
-    throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPFloor16(EmitContext& ctx, Id value) {
+    return ctx.OpFloor(ctx.F16[1], value);
 }
 
-void EmitFPFloor32(EmitContext&) {
-    throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPFloor32(EmitContext& ctx, Id value) {
+    return ctx.OpFloor(ctx.F32[1], value);
 }
 
-void EmitFPFloor64(EmitContext&) {
-    throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPFloor64(EmitContext& ctx, Id value) {
+    return ctx.OpFloor(ctx.F64[1], value);
 }
 
-void EmitFPCeil16(EmitContext&) {
-    throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPCeil16(EmitContext& ctx, Id value) {
+    return ctx.OpCeil(ctx.F16[1], value);
 }
 
-void EmitFPCeil32(EmitContext&) {
-    throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPCeil32(EmitContext& ctx, Id value) {
+    return ctx.OpCeil(ctx.F32[1], value);
 }
 
-void EmitFPCeil64(EmitContext&) {
-    throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPCeil64(EmitContext& ctx, Id value) {
+    return ctx.OpCeil(ctx.F64[1], value);
 }
 
-void EmitFPTrunc16(EmitContext&) {
-    throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPTrunc16(EmitContext& ctx, Id value) {
+    return ctx.OpTrunc(ctx.F16[1], value);
 }
 
-void EmitFPTrunc32(EmitContext&) {
-    throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPTrunc32(EmitContext& ctx, Id value) {
+    return ctx.OpTrunc(ctx.F32[1], value);
 }
 
-void EmitFPTrunc64(EmitContext&) {
-    throw NotImplementedException("SPIR-V Instruction");
+Id EmitFPTrunc64(EmitContext& ctx, Id value) {
+    return ctx.OpTrunc(ctx.F64[1], value);
 }
 
 } // namespace Shader::Backend::SPIRV
-- 
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