From 4f28861008e16557dfd3dfb2d35942365ab710b2 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sat, 29 Nov 2014 14:13:29 -0500 Subject: arm_dyncom_interpreter: Get rid of unused var warnings --- src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index f899e2e8a..aa2b271e7 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -94,9 +94,8 @@ typedef unsigned int (*shtop_fp_t)(arm_processor *cpu, unsigned int sht_oper); /* exclusive memory access */ static int exclusive_detect(ARMul_State* state, ARMword addr){ - int i; #if 0 - for(i = 0; i < 128; i++){ + for(int i = 0; i < 128; i++){ if(state->exclusive_tag_array[i] == addr) return 0; } @@ -108,9 +107,8 @@ static int exclusive_detect(ARMul_State* state, ARMword addr){ } static void add_exclusive_addr(ARMul_State* state, ARMword addr){ - int i; #if 0 - for(i = 0; i < 128; i++){ + for(int i = 0; i < 128; i++){ if(state->exclusive_tag_array[i] == 0xffffffff){ state->exclusive_tag_array[i] = addr; //DEBUG_LOG(ARM11, "In %s, add addr 0x%x\n", __func__, addr); -- cgit v1.2.3 From 4a68e91a6291b13b31156948d5189955b698b63b Mon Sep 17 00:00:00 2001 From: Yuri Kunde Schlesner Date: Sat, 29 Nov 2014 17:42:39 -0200 Subject: dyncom: Use unordered_map rather than the terrible 2-level bb_map Seems (probably just placebo/wishful thinking) to make it slightly faster. Also reduces memory usage and makes shutdown when debugging from MSVC fast. --- src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 48 ++++++++------------------ 1 file changed, 15 insertions(+), 33 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index f899e2e8a..04d534723 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -26,7 +26,7 @@ #define CITRA_IGNORE_EXIT(x) #include -#include +#include #include #include #include @@ -3309,9 +3309,8 @@ const transop_fp_t arm_instruction_trans[] = { INTERPRETER_TRANSLATE(blx_1_thumb) }; -typedef map bb_map; -bb_map CreamCache[65536]; -bb_map ProfileCache[65536]; +typedef std::unordered_map bb_map; +bb_map CreamCache; //#define USE_DUMMY_CACHE @@ -3319,14 +3318,12 @@ bb_map ProfileCache[65536]; unsigned int DummyCache[0x100000]; #endif -#define HASH(x) ((x + (x << 3) + (x >> 6)) % 65536) void insert_bb(unsigned int addr, int start) { #ifdef USE_DUMMY_CACHE DummyCache[addr] = start; #else -// CreamCache[addr] = start; - CreamCache[HASH(addr)][addr] = start; + CreamCache[addr] = start; #endif } @@ -3341,8 +3338,8 @@ int find_bb(unsigned int addr, int &start) } else ret = -1; #else - bb_map::const_iterator it = CreamCache[HASH(addr)].find(addr); - if (it != CreamCache[HASH(addr)].end()) { + bb_map::const_iterator it = CreamCache.find(addr); + if (it != CreamCache.end()) { start = static_cast(it->second); ret = 0; #if HYBRID_MODE @@ -3473,30 +3470,15 @@ void flush_bb(uint32_t addr) uint32_t start; addr &= 0xfffff000; - for (int i = 0; i < 65536; i ++) { - for (it = CreamCache[i].begin(); it != CreamCache[i].end(); ) { - start = static_cast(it->first); - //start = (start >> 12) << 12; - start &= 0xfffff000; - if (start == addr) { - //DEBUG_LOG(ARM11, "[ERASE][0x%08x]\n", static_cast(it->first)); - CreamCache[i].erase(it ++); - } else - ++it; - } - } - - for (int i = 0; i < 65536; i ++) { - for (it = ProfileCache[i].begin(); it != ProfileCache[i].end(); ) { - start = static_cast(it->first); - //start = (start >> 12) << 12; - start &= 0xfffff000; - if (start == addr) { - //DEBUG_LOG(ARM11, "[ERASE][0x%08x]\n", static_cast(it->first)); - ProfileCache[i].erase(it ++); - } else - ++it; - } + for (it = CreamCache.begin(); it != CreamCache.end(); ) { + start = static_cast(it->first); + //start = (start >> 12) << 12; + start &= 0xfffff000; + if (start == addr) { + //DEBUG_LOG(ARM11, "[ERASE][0x%08x]\n", static_cast(it->first)); + CreamCache.erase(it++); + } else + ++it; } //DEBUG_LOG(ARM11, "flush bb @ %x\n", addr); -- cgit v1.2.3 From b4256431aa148148182a00af205dc137b9833e41 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 7 Dec 2014 23:47:26 -0500 Subject: armemu: Fix parenthesis warnings regarding bitwise ops --- src/core/arm/interpreter/armemu.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 73223874e..cb7c27030 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -5724,7 +5724,7 @@ L_stm_s_takeabort: s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); s16 b1 = (state->Reg[src2] & 0xFFFF); s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); - state->Reg[tar] = (a1 - a2)&0xFFFF | (((b1 - b2)&0xFFFF)<< 0x10); + state->Reg[tar] = ((a1 - a2) & 0xFFFF) | (((b1 - b2)&0xFFFF)<< 0x10); return 1; } else if ((instr & 0xFF0) == 0xf10)//sadd16 @@ -5736,7 +5736,7 @@ L_stm_s_takeabort: s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); s16 b1 = (state->Reg[src2] & 0xFFFF); s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); - state->Reg[tar] = (a1 + a2)&0xFFFF | (((b1 + b2)&0xFFFF)<< 0x10); + state->Reg[tar] = ((a1 + a2) & 0xFFFF) | (((b1 + b2)&0xFFFF)<< 0x10); return 1; } else if ((instr & 0xFF0) == 0xf50)//ssax @@ -5748,7 +5748,7 @@ L_stm_s_takeabort: s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); s16 b1 = (state->Reg[src2] & 0xFFFF); s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); - state->Reg[tar] = (a1 - b2) & 0xFFFF | (((a2 + b1) & 0xFFFF) << 0x10); + state->Reg[tar] = ((a1 - b2) & 0xFFFF) | (((a2 + b1) & 0xFFFF) << 0x10); return 1; } else if ((instr & 0xFF0) == 0xf30)//sasx @@ -5760,7 +5760,7 @@ L_stm_s_takeabort: s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); s16 b1 = (state->Reg[src2] & 0xFFFF); s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); - state->Reg[tar] = (a2 - b1) & 0xFFFF | (((a2 + b1) & 0xFFFF) << 0x10); + state->Reg[tar] = ((a2 - b1) & 0xFFFF) | (((a2 + b1) & 0xFFFF) << 0x10); return 1; } else printf ("Unhandled v6 insn: sadd/ssub\n"); -- cgit v1.2.3 From 62fd564854b31f7e3203db3fb6f113231c30a3b7 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Mon, 8 Dec 2014 01:44:37 -0500 Subject: armemu: Fix SASX --- src/core/arm/interpreter/armemu.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index cb7c27030..d327252dc 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -5760,7 +5760,7 @@ L_stm_s_takeabort: s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); s16 b1 = (state->Reg[src2] & 0xFFFF); s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); - state->Reg[tar] = ((a2 - b1) & 0xFFFF) | (((a2 + b1) & 0xFFFF) << 0x10); + state->Reg[tar] = ((a1 - b2) & 0xFFFF) | (((a2 + b1) & 0xFFFF) << 0x10); return 1; } else printf ("Unhandled v6 insn: sadd/ssub\n"); -- cgit v1.2.3 From 905e3b616a70abfc2a68b519bc05a6b0f38151af Mon Sep 17 00:00:00 2001 From: Lioncash Date: Mon, 8 Dec 2014 15:47:20 -0500 Subject: armemu: Fix SSAX --- src/core/arm/interpreter/armemu.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index d327252dc..d717bd2c8 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -5748,7 +5748,7 @@ L_stm_s_takeabort: s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); s16 b1 = (state->Reg[src2] & 0xFFFF); s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); - state->Reg[tar] = ((a1 - b2) & 0xFFFF) | (((a2 + b1) & 0xFFFF) << 0x10); + state->Reg[tar] = ((a1 + b2) & 0xFFFF) | (((a2 - b1) & 0xFFFF) << 0x10); return 1; } else if ((instr & 0xFF0) == 0xf30)//sasx -- cgit v1.2.3 From 0600e2d8b5b30bd68c8b19cb1f2051e096e7caa9 Mon Sep 17 00:00:00 2001 From: Yuri Kunde Schlesner Date: Fri, 5 Dec 2014 23:53:49 -0200 Subject: Convert old logging calls to new logging macros --- src/citra/citra.cpp | 4 +- src/citra/config.cpp | 6 +- src/citra/emu_window/emu_window_glfw.cpp | 16 +- src/citra_qt/bootmanager.cpp | 8 +- src/citra_qt/debugger/graphics_breakpoints.cpp | 2 +- src/citra_qt/main.cpp | 6 +- src/citra_qt/util/spinbox.cpp | 2 +- src/common/break_points.cpp | 2 +- src/common/chunk_file.h | 35 +++- src/common/file_util.cpp | 84 ++++----- src/common/log.h | 16 +- src/common/mem_arena.cpp | 14 +- src/common/memory_util.cpp | 2 +- src/common/msg_handler.cpp | 2 +- src/common/string_util.cpp | 10 +- src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 200 +++++++++++---------- src/core/arm/interpreter/armemu.cpp | 4 +- src/core/arm/interpreter/armsupp.cpp | 8 +- src/core/arm/interpreter/thumbemu.cpp | 2 +- src/core/arm/skyeye_common/armemu.h | 4 +- src/core/core.cpp | 4 +- src/core/core_timing.cpp | 8 +- src/core/file_sys/archive.h | 12 +- src/core/file_sys/archive_romfs.cpp | 18 +- src/core/file_sys/archive_sdmc.cpp | 18 +- src/core/file_sys/directory_sdmc.cpp | 2 +- src/core/file_sys/file_sdmc.cpp | 2 +- src/core/hle/config_mem.cpp | 2 +- src/core/hle/hle.cpp | 12 +- src/core/hle/kernel/address_arbiter.cpp | 8 +- src/core/hle/kernel/archive.cpp | 50 ++---- src/core/hle/kernel/kernel.cpp | 8 +- src/core/hle/kernel/kernel.h | 17 +- src/core/hle/kernel/shared_memory.cpp | 10 +- src/core/hle/kernel/thread.cpp | 24 +-- src/core/hle/service/ac_u.cpp | 2 +- src/core/hle/service/apt_u.cpp | 20 +-- src/core/hle/service/cfg_u.cpp | 6 +- src/core/hle/service/dsp_dsp.cpp | 14 +- src/core/hle/service/fs_user.cpp | 54 ++---- src/core/hle/service/gsp_gpu.cpp | 18 +- src/core/hle/service/hid_user.cpp | 2 +- src/core/hle/service/ptm_u.cpp | 8 +- src/core/hle/service/service.cpp | 4 +- src/core/hle/service/service.h | 8 +- src/core/hle/service/srv.cpp | 8 +- src/core/hle/svc.cpp | 54 +++--- src/core/hw/gpu.cpp | 16 +- src/core/hw/hw.cpp | 8 +- src/core/loader/3dsx.cpp | 14 +- src/core/loader/elf.cpp | 16 +- src/core/loader/loader.cpp | 6 +- src/core/loader/ncch.cpp | 34 ++-- src/core/mem_map.cpp | 4 +- src/core/mem_map_funcs.cpp | 12 +- src/video_core/clipper.cpp | 2 +- src/video_core/command_processor.cpp | 6 +- src/video_core/debug_utils/debug_utils.cpp | 18 +- src/video_core/gpu_debugger.h | 2 +- src/video_core/primitive_assembly.cpp | 2 +- src/video_core/rasterizer.cpp | 12 +- src/video_core/renderer_opengl/gl_shader_util.cpp | 24 ++- src/video_core/renderer_opengl/renderer_opengl.cpp | 12 +- src/video_core/vertex_shader.cpp | 6 +- src/video_core/video_core.cpp | 4 +- 65 files changed, 502 insertions(+), 516 deletions(-) (limited to 'src/core/arm') diff --git a/src/citra/citra.cpp b/src/citra/citra.cpp index 7c031ce8d..d192428e9 100644 --- a/src/citra/citra.cpp +++ b/src/citra/citra.cpp @@ -27,7 +27,7 @@ int __cdecl main(int argc, char **argv) { }); if (argc < 2) { - ERROR_LOG(BOOT, "Failed to load ROM: No ROM specified"); + LOG_CRITICAL(Frontend, "Failed to load ROM: No ROM specified"); return -1; } @@ -40,7 +40,7 @@ int __cdecl main(int argc, char **argv) { Loader::ResultStatus load_result = Loader::LoadFile(boot_filename); if (Loader::ResultStatus::Success != load_result) { - ERROR_LOG(BOOT, "Failed to load ROM (Error %i)!", load_result); + LOG_CRITICAL(Frontend, "Failed to load ROM (Error %i)!", load_result); return -1; } diff --git a/src/citra/config.cpp b/src/citra/config.cpp index 1f8f5922b..fe0ebe5a8 100644 --- a/src/citra/config.cpp +++ b/src/citra/config.cpp @@ -22,17 +22,17 @@ Config::Config() { bool Config::LoadINI(INIReader* config, const char* location, const std::string& default_contents, bool retry) { if (config->ParseError() < 0) { if (retry) { - ERROR_LOG(CONFIG, "Failed to load %s. Creating file from defaults...", location); + LOG_WARNING(Config, "Failed to load %s. Creating file from defaults...", location); FileUtil::CreateFullPath(location); FileUtil::WriteStringToFile(true, default_contents, location); *config = INIReader(location); // Reopen file return LoadINI(config, location, default_contents, false); } - ERROR_LOG(CONFIG, "Failed."); + LOG_ERROR(Config, "Failed."); return false; } - INFO_LOG(CONFIG, "Successfully loaded %s", location); + LOG_INFO(Config, "Successfully loaded %s", location); return true; } diff --git a/src/citra/emu_window/emu_window_glfw.cpp b/src/citra/emu_window/emu_window_glfw.cpp index 982619126..929e09f43 100644 --- a/src/citra/emu_window/emu_window_glfw.cpp +++ b/src/citra/emu_window/emu_window_glfw.cpp @@ -36,15 +36,15 @@ const bool EmuWindow_GLFW::IsOpen() { } void EmuWindow_GLFW::OnFramebufferResizeEvent(GLFWwindow* win, int width, int height) { - _dbg_assert_(GUI, width > 0); - _dbg_assert_(GUI, height > 0); + _dbg_assert_(Frontend, width > 0); + _dbg_assert_(Frontend, height > 0); GetEmuWindow(win)->NotifyFramebufferSizeChanged(std::pair(width, height)); } void EmuWindow_GLFW::OnClientAreaResizeEvent(GLFWwindow* win, int width, int height) { - _dbg_assert_(GUI, width > 0); - _dbg_assert_(GUI, height > 0); + _dbg_assert_(Frontend, width > 0); + _dbg_assert_(Frontend, height > 0); // NOTE: GLFW provides no proper way to set a minimal window size. // Hence, we just ignore the corresponding EmuWindow hint. @@ -59,12 +59,12 @@ EmuWindow_GLFW::EmuWindow_GLFW() { ReloadSetKeymaps(); glfwSetErrorCallback([](int error, const char *desc){ - ERROR_LOG(GUI, "GLFW 0x%08x: %s", error, desc); + LOG_ERROR(Frontend, "GLFW 0x%08x: %s", error, desc); }); // Initialize the window if(glfwInit() != GL_TRUE) { - ERROR_LOG(GUI, "Failed to initialize GLFW! Exiting..."); + LOG_CRITICAL(Frontend, "Failed to initialize GLFW! Exiting..."); exit(1); } glfwWindowHint(GLFW_CONTEXT_VERSION_MAJOR, 3); @@ -79,7 +79,7 @@ EmuWindow_GLFW::EmuWindow_GLFW() { window_title.c_str(), nullptr, nullptr); if (m_render_window == nullptr) { - ERROR_LOG(GUI, "Failed to create GLFW window! Exiting..."); + LOG_CRITICAL(Frontend, "Failed to create GLFW window! Exiting..."); exit(1); } @@ -149,7 +149,7 @@ void EmuWindow_GLFW::OnMinimalClientAreaChangeRequest(const std::pair current_size; glfwGetWindowSize(m_render_window, ¤t_size.first, ¤t_size.second); - _dbg_assert_(GUI, (int)minimal_size.first > 0 && (int)minimal_size.second > 0); + _dbg_assert_(Frontend, (int)minimal_size.first > 0 && (int)minimal_size.second > 0); int new_width = std::max(current_size.first, (int)minimal_size.first); int new_height = std::max(current_size.second, (int)minimal_size.second); diff --git a/src/citra_qt/bootmanager.cpp b/src/citra_qt/bootmanager.cpp index b53206be6..6d08d6afc 100644 --- a/src/citra_qt/bootmanager.cpp +++ b/src/citra_qt/bootmanager.cpp @@ -62,7 +62,7 @@ void EmuThread::Stop() { if (!isRunning()) { - INFO_LOG(MASTER_LOG, "EmuThread::Stop called while emu thread wasn't running, returning..."); + LOG_WARNING(Frontend, "EmuThread::Stop called while emu thread wasn't running, returning..."); return; } stop_run = true; @@ -76,7 +76,7 @@ void EmuThread::Stop() wait(1000); if (isRunning()) { - WARN_LOG(MASTER_LOG, "EmuThread still running, terminating..."); + LOG_WARNING(Frontend, "EmuThread still running, terminating..."); quit(); // TODO: Waiting 50 seconds can be necessary if the logging subsystem has a lot of spam @@ -84,11 +84,11 @@ void EmuThread::Stop() wait(50000); if (isRunning()) { - WARN_LOG(MASTER_LOG, "EmuThread STILL running, something is wrong here..."); + LOG_CRITICAL(Frontend, "EmuThread STILL running, something is wrong here..."); terminate(); } } - INFO_LOG(MASTER_LOG, "EmuThread stopped"); + LOG_INFO(Frontend, "EmuThread stopped"); } diff --git a/src/citra_qt/debugger/graphics_breakpoints.cpp b/src/citra_qt/debugger/graphics_breakpoints.cpp index df5579e15..53394b6e6 100644 --- a/src/citra_qt/debugger/graphics_breakpoints.cpp +++ b/src/citra_qt/debugger/graphics_breakpoints.cpp @@ -45,7 +45,7 @@ QVariant BreakPointModel::data(const QModelIndex& index, int role) const map.insert({Pica::DebugContext::Event::IncomingPrimitiveBatch, tr("Incoming primitive batch")}); map.insert({Pica::DebugContext::Event::FinishedPrimitiveBatch, tr("Finished primitive batch")}); - _dbg_assert_(GUI, map.size() == static_cast(Pica::DebugContext::Event::NumEvents)); + _dbg_assert_(Debug_GPU, map.size() == static_cast(Pica::DebugContext::Event::NumEvents)); return map[event]; } diff --git a/src/citra_qt/main.cpp b/src/citra_qt/main.cpp index 2e3025295..5293263cd 100644 --- a/src/citra_qt/main.cpp +++ b/src/citra_qt/main.cpp @@ -158,18 +158,18 @@ GMainWindow::~GMainWindow() void GMainWindow::BootGame(std::string filename) { - NOTICE_LOG(MASTER_LOG, "Citra starting...\n"); + LOG_INFO(Frontend, "Citra starting...\n"); System::Init(render_window); if (Core::Init()) { - ERROR_LOG(MASTER_LOG, "Core initialization failed, exiting..."); + LOG_CRITICAL(Frontend, "Core initialization failed, exiting..."); Core::Stop(); exit(1); } // Load a game or die... if (Loader::ResultStatus::Success != Loader::LoadFile(filename)) { - ERROR_LOG(BOOT, "Failed to load ROM!"); + LOG_CRITICAL(Frontend, "Failed to load ROM!"); } disasmWidget->Init(); diff --git a/src/citra_qt/util/spinbox.cpp b/src/citra_qt/util/spinbox.cpp index 80dc67d7d..9672168f5 100644 --- a/src/citra_qt/util/spinbox.cpp +++ b/src/citra_qt/util/spinbox.cpp @@ -244,7 +244,7 @@ QValidator::State CSpinBox::validate(QString& input, int& pos) const if (strpos >= input.length() - HasSign() - suffix.length()) return QValidator::Intermediate; - _dbg_assert_(GUI, base <= 10 || base == 16); + _dbg_assert_(Frontend, base <= 10 || base == 16); QString regexp; // Demand sign character for negative ranges diff --git a/src/common/break_points.cpp b/src/common/break_points.cpp index 25528b864..587dbf40a 100644 --- a/src/common/break_points.cpp +++ b/src/common/break_points.cpp @@ -180,7 +180,7 @@ void TMemCheck::Action(DebugInterface *debug_interface, u32 iValue, u32 addr, { if (Log) { - INFO_LOG(MEMMAP, "CHK %08x (%s) %s%i %0*x at %08x (%s)", + LOG_DEBUG(Debug_Breakpoint, "CHK %08x (%s) %s%i %0*x at %08x (%s)", pc, debug_interface->getDescription(pc).c_str(), write ? "Write" : "Read", size*8, size*2, iValue, addr, debug_interface->getDescription(addr).c_str() diff --git a/src/common/chunk_file.h b/src/common/chunk_file.h index 32af74594..39a14dc81 100644 --- a/src/common/chunk_file.h +++ b/src/common/chunk_file.h @@ -154,7 +154,7 @@ public: Do(foundVersion); if (error == ERROR_FAILURE || foundVersion < minVer || foundVersion > ver) { - WARN_LOG(COMMON, "Savestate failure: wrong version %d found for %s", foundVersion, title); + LOG_ERROR(Common, "Savestate failure: wrong version %d found for %s", foundVersion, title); SetError(ERROR_FAILURE); return PointerWrapSection(*this, -1, title); } @@ -178,7 +178,14 @@ public: case MODE_READ: if (memcmp(data, *ptr, size) != 0) return false; break; case MODE_WRITE: memcpy(*ptr, data, size); break; case MODE_MEASURE: break; // MODE_MEASURE - don't need to do anything - case MODE_VERIFY: for(int i = 0; i < size; i++) _dbg_assert_msg_(COMMON, ((u8*)data)[i] == (*ptr)[i], "Savestate verification failure: %d (0x%X) (at %p) != %d (0x%X) (at %p).\n", ((u8*)data)[i], ((u8*)data)[i], &((u8*)data)[i], (*ptr)[i], (*ptr)[i], &(*ptr)[i]); break; + case MODE_VERIFY: + for (int i = 0; i < size; i++) { + _dbg_assert_msg_(Common, ((u8*)data)[i] == (*ptr)[i], + "Savestate verification failure: %d (0x%X) (at %p) != %d (0x%X) (at %p).\n", + ((u8*)data)[i], ((u8*)data)[i], &((u8*)data)[i], + (*ptr)[i], (*ptr)[i], &(*ptr)[i]); + } + break; default: break; // throw an error? } (*ptr) += size; @@ -191,7 +198,14 @@ public: case MODE_READ: memcpy(data, *ptr, size); break; case MODE_WRITE: memcpy(*ptr, data, size); break; case MODE_MEASURE: break; // MODE_MEASURE - don't need to do anything - case MODE_VERIFY: for(int i = 0; i < size; i++) _dbg_assert_msg_(COMMON, ((u8*)data)[i] == (*ptr)[i], "Savestate verification failure: %d (0x%X) (at %p) != %d (0x%X) (at %p).\n", ((u8*)data)[i], ((u8*)data)[i], &((u8*)data)[i], (*ptr)[i], (*ptr)[i], &(*ptr)[i]); break; + case MODE_VERIFY: + for (int i = 0; i < size; i++) { + _dbg_assert_msg_(Common, ((u8*)data)[i] == (*ptr)[i], + "Savestate verification failure: %d (0x%X) (at %p) != %d (0x%X) (at %p).\n", + ((u8*)data)[i], ((u8*)data)[i], &((u8*)data)[i], + (*ptr)[i], (*ptr)[i], &(*ptr)[i]); + } + break; default: break; // throw an error? } (*ptr) += size; @@ -476,7 +490,7 @@ public: break; default: - ERROR_LOG(COMMON, "Savestate error: invalid mode %d.", mode); + LOG_ERROR(Common, "Savestate error: invalid mode %d.", mode); } } @@ -490,7 +504,12 @@ public: case MODE_READ: x = (char*)*ptr; break; case MODE_WRITE: memcpy(*ptr, x.c_str(), stringLen); break; case MODE_MEASURE: break; - case MODE_VERIFY: _dbg_assert_msg_(COMMON, !strcmp(x.c_str(), (char*)*ptr), "Savestate verification failure: \"%s\" != \"%s\" (at %p).\n", x.c_str(), (char*)*ptr, ptr); break; + case MODE_VERIFY: + _dbg_assert_msg_(Common, + !strcmp(x.c_str(), (char*)*ptr), + "Savestate verification failure: \"%s\" != \"%s\" (at %p).\n", + x.c_str(), (char*)*ptr, ptr); + break; } (*ptr) += stringLen; } @@ -504,7 +523,11 @@ public: case MODE_READ: x = (wchar_t*)*ptr; break; case MODE_WRITE: memcpy(*ptr, x.c_str(), stringLen); break; case MODE_MEASURE: break; - case MODE_VERIFY: _dbg_assert_msg_(COMMON, x == (wchar_t*)*ptr, "Savestate verification failure: \"%ls\" != \"%ls\" (at %p).\n", x.c_str(), (wchar_t*)*ptr, ptr); break; + case MODE_VERIFY: + _dbg_assert_msg_(Common, x == (wchar_t*)*ptr, + "Savestate verification failure: \"%ls\" != \"%ls\" (at %p).\n", + x.c_str(), (wchar_t*)*ptr, ptr); + break; } (*ptr) += stringLen; } diff --git a/src/common/file_util.cpp b/src/common/file_util.cpp index 7579d8c0f..88c46c117 100644 --- a/src/common/file_util.cpp +++ b/src/common/file_util.cpp @@ -88,7 +88,7 @@ bool IsDirectory(const std::string &filename) #endif if (result < 0) { - WARN_LOG(COMMON, "IsDirectory: stat failed on %s: %s", + LOG_WARNING(Common_Filesystem, "stat failed on %s: %s", filename.c_str(), GetLastErrorMsg()); return false; } @@ -100,33 +100,33 @@ bool IsDirectory(const std::string &filename) // Doesn't supports deleting a directory bool Delete(const std::string &filename) { - INFO_LOG(COMMON, "Delete: file %s", filename.c_str()); + LOG_INFO(Common_Filesystem, "file %s", filename.c_str()); // Return true because we care about the file no // being there, not the actual delete. if (!Exists(filename)) { - WARN_LOG(COMMON, "Delete: %s does not exist", filename.c_str()); + LOG_WARNING(Common_Filesystem, "%s does not exist", filename.c_str()); return true; } // We can't delete a directory if (IsDirectory(filename)) { - WARN_LOG(COMMON, "Delete failed: %s is a directory", filename.c_str()); + LOG_ERROR(Common_Filesystem, "Failed: %s is a directory", filename.c_str()); return false; } #ifdef _WIN32 if (!DeleteFile(Common::UTF8ToTStr(filename).c_str())) { - WARN_LOG(COMMON, "Delete: DeleteFile failed on %s: %s", + LOG_ERROR(Common_Filesystem, "DeleteFile failed on %s: %s", filename.c_str(), GetLastErrorMsg()); return false; } #else if (unlink(filename.c_str()) == -1) { - WARN_LOG(COMMON, "Delete: unlink failed on %s: %s", + LOG_ERROR(Common_Filesystem, "unlink failed on %s: %s", filename.c_str(), GetLastErrorMsg()); return false; } @@ -138,17 +138,17 @@ bool Delete(const std::string &filename) // Returns true if successful, or path already exists. bool CreateDir(const std::string &path) { - INFO_LOG(COMMON, "CreateDir: directory %s", path.c_str()); + LOG_TRACE(Common_Filesystem, "directory %s", path.c_str()); #ifdef _WIN32 if (::CreateDirectory(Common::UTF8ToTStr(path).c_str(), nullptr)) return true; DWORD error = GetLastError(); if (error == ERROR_ALREADY_EXISTS) { - WARN_LOG(COMMON, "CreateDir: CreateDirectory failed on %s: already exists", path.c_str()); + LOG_WARNING(Common_Filesystem, "CreateDirectory failed on %s: already exists", path.c_str()); return true; } - ERROR_LOG(COMMON, "CreateDir: CreateDirectory failed on %s: %i", path.c_str(), error); + LOG_ERROR(Common_Filesystem, "CreateDirectory failed on %s: %i", path.c_str(), error); return false; #else if (mkdir(path.c_str(), 0755) == 0) @@ -158,11 +158,11 @@ bool CreateDir(const std::string &path) if (err == EEXIST) { - WARN_LOG(COMMON, "CreateDir: mkdir failed on %s: already exists", path.c_str()); + LOG_WARNING(Common_Filesystem, "mkdir failed on %s: already exists", path.c_str()); return true; } - ERROR_LOG(COMMON, "CreateDir: mkdir failed on %s: %s", path.c_str(), strerror(err)); + LOG_ERROR(Common_Filesystem, "mkdir failed on %s: %s", path.c_str(), strerror(err)); return false; #endif } @@ -171,11 +171,11 @@ bool CreateDir(const std::string &path) bool CreateFullPath(const std::string &fullPath) { int panicCounter = 100; - INFO_LOG(COMMON, "CreateFullPath: path %s", fullPath.c_str()); + LOG_TRACE(Common_Filesystem, "path %s", fullPath.c_str()); if (FileUtil::Exists(fullPath)) { - INFO_LOG(COMMON, "CreateFullPath: path exists %s", fullPath.c_str()); + LOG_WARNING(Common_Filesystem, "path exists %s", fullPath.c_str()); return true; } @@ -192,7 +192,7 @@ bool CreateFullPath(const std::string &fullPath) // Include the '/' so the first call is CreateDir("/") rather than CreateDir("") std::string const subPath(fullPath.substr(0, position + 1)); if (!FileUtil::IsDirectory(subPath) && !FileUtil::CreateDir(subPath)) { - ERROR_LOG(COMMON, "CreateFullPath: directory creation failed"); + LOG_ERROR(Common, "CreateFullPath: directory creation failed"); return false; } @@ -200,7 +200,7 @@ bool CreateFullPath(const std::string &fullPath) panicCounter--; if (panicCounter <= 0) { - ERROR_LOG(COMMON, "CreateFullPath: directory structure is too deep"); + LOG_ERROR(Common, "CreateFullPath: directory structure is too deep"); return false; } position++; @@ -211,12 +211,12 @@ bool CreateFullPath(const std::string &fullPath) // Deletes a directory filename, returns true on success bool DeleteDir(const std::string &filename) { - INFO_LOG(COMMON, "DeleteDir: directory %s", filename.c_str()); + LOG_INFO(Common_Filesystem, "directory %s", filename.c_str()); // check if a directory if (!FileUtil::IsDirectory(filename)) { - ERROR_LOG(COMMON, "DeleteDir: Not a directory %s", filename.c_str()); + LOG_ERROR(Common_Filesystem, "Not a directory %s", filename.c_str()); return false; } @@ -227,7 +227,7 @@ bool DeleteDir(const std::string &filename) if (rmdir(filename.c_str()) == 0) return true; #endif - ERROR_LOG(COMMON, "DeleteDir: %s: %s", filename.c_str(), GetLastErrorMsg()); + LOG_ERROR(Common_Filesystem, "failed %s: %s", filename.c_str(), GetLastErrorMsg()); return false; } @@ -235,11 +235,11 @@ bool DeleteDir(const std::string &filename) // renames file srcFilename to destFilename, returns true on success bool Rename(const std::string &srcFilename, const std::string &destFilename) { - INFO_LOG(COMMON, "Rename: %s --> %s", + LOG_TRACE(Common_Filesystem, "%s --> %s", srcFilename.c_str(), destFilename.c_str()); if (rename(srcFilename.c_str(), destFilename.c_str()) == 0) return true; - ERROR_LOG(COMMON, "Rename: failed %s --> %s: %s", + LOG_ERROR(Common_Filesystem, "failed %s --> %s: %s", srcFilename.c_str(), destFilename.c_str(), GetLastErrorMsg()); return false; } @@ -247,13 +247,13 @@ bool Rename(const std::string &srcFilename, const std::string &destFilename) // copies file srcFilename to destFilename, returns true on success bool Copy(const std::string &srcFilename, const std::string &destFilename) { - INFO_LOG(COMMON, "Copy: %s --> %s", + LOG_TRACE(Common_Filesystem, "%s --> %s", srcFilename.c_str(), destFilename.c_str()); #ifdef _WIN32 if (CopyFile(Common::UTF8ToTStr(srcFilename).c_str(), Common::UTF8ToTStr(destFilename).c_str(), FALSE)) return true; - ERROR_LOG(COMMON, "Copy: failed %s --> %s: %s", + LOG_ERROR(Common_Filesystem, "failed %s --> %s: %s", srcFilename.c_str(), destFilename.c_str(), GetLastErrorMsg()); return false; #else @@ -267,7 +267,7 @@ bool Copy(const std::string &srcFilename, const std::string &destFilename) FILE *input = fopen(srcFilename.c_str(), "rb"); if (!input) { - ERROR_LOG(COMMON, "Copy: input failed %s --> %s: %s", + LOG_ERROR(Common_Filesystem, "opening input failed %s --> %s: %s", srcFilename.c_str(), destFilename.c_str(), GetLastErrorMsg()); return false; } @@ -277,7 +277,7 @@ bool Copy(const std::string &srcFilename, const std::string &destFilename) if (!output) { fclose(input); - ERROR_LOG(COMMON, "Copy: output failed %s --> %s: %s", + LOG_ERROR(Common_Filesystem, "opening output failed %s --> %s: %s", srcFilename.c_str(), destFilename.c_str(), GetLastErrorMsg()); return false; } @@ -291,8 +291,8 @@ bool Copy(const std::string &srcFilename, const std::string &destFilename) { if (ferror(input) != 0) { - ERROR_LOG(COMMON, - "Copy: failed reading from source, %s --> %s: %s", + LOG_ERROR(Common_Filesystem, + "failed reading from source, %s --> %s: %s", srcFilename.c_str(), destFilename.c_str(), GetLastErrorMsg()); goto bail; } @@ -302,8 +302,8 @@ bool Copy(const std::string &srcFilename, const std::string &destFilename) int wnum = fwrite(buffer, sizeof(char), rnum, output); if (wnum != rnum) { - ERROR_LOG(COMMON, - "Copy: failed writing to output, %s --> %s: %s", + LOG_ERROR(Common_Filesystem, + "failed writing to output, %s --> %s: %s", srcFilename.c_str(), destFilename.c_str(), GetLastErrorMsg()); goto bail; } @@ -326,13 +326,13 @@ u64 GetSize(const std::string &filename) { if (!Exists(filename)) { - WARN_LOG(COMMON, "GetSize: failed %s: No such file", filename.c_str()); + LOG_ERROR(Common_Filesystem, "failed %s: No such file", filename.c_str()); return 0; } if (IsDirectory(filename)) { - WARN_LOG(COMMON, "GetSize: failed %s: is a directory", filename.c_str()); + LOG_ERROR(Common_Filesystem, "failed %s: is a directory", filename.c_str()); return 0; } @@ -343,12 +343,12 @@ u64 GetSize(const std::string &filename) if (stat64(filename.c_str(), &buf) == 0) #endif { - DEBUG_LOG(COMMON, "GetSize: %s: %lld", + LOG_TRACE(Common_Filesystem, "%s: %lld", filename.c_str(), (long long)buf.st_size); return buf.st_size; } - ERROR_LOG(COMMON, "GetSize: Stat failed %s: %s", + LOG_ERROR(Common_Filesystem, "Stat failed %s: %s", filename.c_str(), GetLastErrorMsg()); return 0; } @@ -358,7 +358,7 @@ u64 GetSize(const int fd) { struct stat64 buf; if (fstat64(fd, &buf) != 0) { - ERROR_LOG(COMMON, "GetSize: stat failed %i: %s", + LOG_ERROR(Common_Filesystem, "GetSize: stat failed %i: %s", fd, GetLastErrorMsg()); return 0; } @@ -371,13 +371,13 @@ u64 GetSize(FILE *f) // can't use off_t here because it can be 32-bit u64 pos = ftello(f); if (fseeko(f, 0, SEEK_END) != 0) { - ERROR_LOG(COMMON, "GetSize: seek failed %p: %s", + LOG_ERROR(Common_Filesystem, "GetSize: seek failed %p: %s", f, GetLastErrorMsg()); return 0; } u64 size = ftello(f); if ((size != pos) && (fseeko(f, pos, SEEK_SET) != 0)) { - ERROR_LOG(COMMON, "GetSize: seek failed %p: %s", + LOG_ERROR(Common_Filesystem, "GetSize: seek failed %p: %s", f, GetLastErrorMsg()); return 0; } @@ -387,11 +387,11 @@ u64 GetSize(FILE *f) // creates an empty file filename, returns true on success bool CreateEmptyFile(const std::string &filename) { - INFO_LOG(COMMON, "CreateEmptyFile: %s", filename.c_str()); + LOG_TRACE(Common_Filesystem, "%s", filename.c_str()); if (!FileUtil::IOFile(filename, "wb")) { - ERROR_LOG(COMMON, "CreateEmptyFile: failed %s: %s", + LOG_ERROR(Common_Filesystem, "failed %s: %s", filename.c_str(), GetLastErrorMsg()); return false; } @@ -404,7 +404,7 @@ bool CreateEmptyFile(const std::string &filename) // results into parentEntry. Returns the number of files+directories found u32 ScanDirectoryTree(const std::string &directory, FSTEntry& parentEntry) { - INFO_LOG(COMMON, "ScanDirectoryTree: directory %s", directory.c_str()); + LOG_TRACE(Common_Filesystem, "directory %s", directory.c_str()); // How many files + directories we found u32 foundEntries = 0; #ifdef _WIN32 @@ -474,7 +474,7 @@ u32 ScanDirectoryTree(const std::string &directory, FSTEntry& parentEntry) // Deletes the given directory and anything under it. Returns true on success. bool DeleteDirRecursively(const std::string &directory) { - INFO_LOG(COMMON, "DeleteDirRecursively: %s", directory.c_str()); + LOG_TRACE(Common_Filesystem, "%s", directory.c_str()); #ifdef _WIN32 // Find the first file in the directory. WIN32_FIND_DATA ffd; @@ -588,7 +588,7 @@ std::string GetCurrentDir() // Get the current working directory (getcwd uses malloc) if (!(dir = __getcwd(nullptr, 0))) { - ERROR_LOG(COMMON, "GetCurrentDirectory failed: %s", + LOG_ERROR(Common_Filesystem, "GetCurrentDirectory failed: %s", GetLastErrorMsg()); return nullptr; } @@ -647,7 +647,7 @@ std::string GetSysDirectory() #endif sysDir += DIR_SEP; - INFO_LOG(COMMON, "GetSysDirectory: Setting to %s:", sysDir.c_str()); + LOG_DEBUG(Common_Filesystem, "Setting to %s:", sysDir.c_str()); return sysDir; } @@ -695,7 +695,7 @@ const std::string& GetUserPath(const unsigned int DirIDX, const std::string &new { if (!FileUtil::IsDirectory(newPath)) { - WARN_LOG(COMMON, "Invalid path specified %s", newPath.c_str()); + LOG_ERROR(Common_Filesystem, "Invalid path specified %s", newPath.c_str()); return paths[DirIDX]; } else diff --git a/src/common/log.h b/src/common/log.h index 105db9802..c0f7ca2df 100644 --- a/src/common/log.h +++ b/src/common/log.h @@ -126,23 +126,23 @@ void GenericLog(LOGTYPES_LEVELS level, LOGTYPES_TYPE type, const char*file, int //#define INFO_LOG(t,...) do { GENERIC_LOG(LogTypes::t, LogTypes::LINFO, __VA_ARGS__) } while (0) //#define DEBUG_LOG(t,...) do { GENERIC_LOG(LogTypes::t, LogTypes::LDEBUG, __VA_ARGS__) } while (0) -#define OS_LOG(t,...) LOG_INFO(Common, __VA_ARGS__) -#define ERROR_LOG(t,...) LOG_ERROR(Common_Filesystem, __VA_ARGS__) -#define WARN_LOG(t,...) LOG_WARNING(Kernel_SVC, __VA_ARGS__) -#define NOTICE_LOG(t,...) LOG_INFO(Service, __VA_ARGS__) -#define INFO_LOG(t,...) LOG_INFO(Service_FS, __VA_ARGS__) -#define DEBUG_LOG(t,...) LOG_DEBUG(Common, __VA_ARGS__) +//#define OS_LOG(t,...) LOG_INFO(Common, __VA_ARGS__) +//#define ERROR_LOG(t,...) LOG_ERROR(Common_Filesystem, __VA_ARGS__) +//#define WARN_LOG(t,...) LOG_WARNING(Kernel_SVC, __VA_ARGS__) +//#define NOTICE_LOG(t,...) LOG_INFO(Service, __VA_ARGS__) +//#define INFO_LOG(t,...) LOG_INFO(Service_FS, __VA_ARGS__) +//#define DEBUG_LOG(t,...) LOG_DEBUG(Common, __VA_ARGS__) #if MAX_LOGLEVEL >= DEBUG_LEVEL #define _dbg_assert_(_t_, _a_) \ if (!(_a_)) {\ - ERROR_LOG(_t_, "Error...\n\n Line: %d\n File: %s\n Time: %s\n\nIgnore and continue?", \ + LOG_CRITICAL(_t_, "Error...\n\n Line: %d\n File: %s\n Time: %s\n\nIgnore and continue?", \ __LINE__, __FILE__, __TIME__); \ if (!PanicYesNo("*** Assertion (see log)***\n")) {Crash();} \ } #define _dbg_assert_msg_(_t_, _a_, ...)\ if (!(_a_)) {\ - ERROR_LOG(_t_, __VA_ARGS__); \ + LOG_CRITICAL(_t_, __VA_ARGS__); \ if (!PanicYesNo(__VA_ARGS__)) {Crash();} \ } #define _dbg_update_() Host_UpdateLogDisplay(); diff --git a/src/common/mem_arena.cpp b/src/common/mem_arena.cpp index 7d4fda0e2..9904d2472 100644 --- a/src/common/mem_arena.cpp +++ b/src/common/mem_arena.cpp @@ -71,7 +71,7 @@ int ashmem_create_region(const char *name, size_t size) return fd; error: - ERROR_LOG(MEMMAP, "NASTY ASHMEM ERROR: ret = %08x", ret); + LOG_ERROR(Common_Memory, "NASTY ASHMEM ERROR: ret = %08x", ret); close(fd); return ret; } @@ -130,7 +130,7 @@ void MemArena::GrabLowMemSpace(size_t size) // Note that it appears that ashmem is pinned by default, so no need to pin. if (fd < 0) { - ERROR_LOG(MEMMAP, "Failed to grab ashmem space of size: %08x errno: %d", (int)size, (int)(errno)); + LOG_ERROR(Common_Memory, "Failed to grab ashmem space of size: %08x errno: %d", (int)size, (int)(errno)); return; } #else @@ -148,12 +148,12 @@ void MemArena::GrabLowMemSpace(size_t size) } else if (errno != EEXIST) { - ERROR_LOG(MEMMAP, "shm_open failed: %s", strerror(errno)); + LOG_ERROR(Common_Memory, "shm_open failed: %s", strerror(errno)); return; } } if (ftruncate(fd, size) < 0) - ERROR_LOG(MEMMAP, "Failed to allocate low memory space"); + LOG_ERROR(Common_Memory, "Failed to allocate low memory space"); #endif } @@ -197,7 +197,7 @@ void *MemArena::CreateView(s64 offset, size_t size, void *base) if (retval == MAP_FAILED) { - NOTICE_LOG(MEMMAP, "mmap failed"); + LOG_ERROR(Common_Memory, "mmap failed"); return nullptr; } return retval; @@ -423,7 +423,7 @@ u8 *MemoryMap_Setup(const MemoryView *views, int num_views, u32 flags, MemArena base = (u8 *)base_addr; if (Memory_TryBase(base, views, num_views, flags, arena)) { - INFO_LOG(MEMMAP, "Found valid memory base at %p after %i tries.", base, base_attempts); + LOG_DEBUG(Common_Memory, "Found valid memory base at %p after %i tries.", base, base_attempts); base_attempts = 0; break; } @@ -442,7 +442,7 @@ u8 *MemoryMap_Setup(const MemoryView *views, int num_views, u32 flags, MemArena u8 *base = MemArena::Find4GBBase(); if (!Memory_TryBase(base, views, num_views, flags, arena)) { - ERROR_LOG(MEMMAP, "MemoryMap_Setup: Failed finding a memory base."); + LOG_ERROR(Common_Memory, "MemoryMap_Setup: Failed finding a memory base."); PanicAlert("MemoryMap_Setup: Failed finding a memory base."); return 0; } diff --git a/src/common/memory_util.cpp b/src/common/memory_util.cpp index 93da5500b..ca8a2a9e4 100644 --- a/src/common/memory_util.cpp +++ b/src/common/memory_util.cpp @@ -109,7 +109,7 @@ void* AllocateAlignedMemory(size_t size,size_t alignment) ptr = memalign(alignment, size); #else if (posix_memalign(&ptr, alignment, size) != 0) - ERROR_LOG(MEMMAP, "Failed to allocate aligned memory"); + LOG_ERROR(Common_Memory, "Failed to allocate aligned memory"); #endif #endif diff --git a/src/common/msg_handler.cpp b/src/common/msg_handler.cpp index b3556aaa8..7ffedc45a 100644 --- a/src/common/msg_handler.cpp +++ b/src/common/msg_handler.cpp @@ -75,7 +75,7 @@ bool MsgAlert(bool yes_no, int Style, const char* format, ...) Common::CharArrayFromFormatV(buffer, sizeof(buffer)-1, str_translator(format).c_str(), args); va_end(args); - ERROR_LOG(MASTER_LOG, "%s: %s", caption.c_str(), buffer); + LOG_INFO(Common, "%s: %s", caption.c_str(), buffer); // Don't ignore questions, especially AskYesNo, PanicYesNo could be ignored if (msg_handler && (AlertEnabled || Style == QUESTION || Style == CRITICAL)) diff --git a/src/common/string_util.cpp b/src/common/string_util.cpp index 7a8274a91..6d9612fb5 100644 --- a/src/common/string_util.cpp +++ b/src/common/string_util.cpp @@ -107,7 +107,7 @@ std::string StringFromFormat(const char* format, ...) #else va_start(args, format); if (vasprintf(&buf, format, args) < 0) - ERROR_LOG(COMMON, "Unable to allocate memory for string"); + LOG_ERROR(Common, "Unable to allocate memory for string"); va_end(args); std::string temp = buf; @@ -475,7 +475,7 @@ static std::string CodeToUTF8(const char* fromcode, const std::basic_string& iconv_t const conv_desc = iconv_open("UTF-8", fromcode); if ((iconv_t)(-1) == conv_desc) { - ERROR_LOG(COMMON, "Iconv initialization failure [%s]: %s", fromcode, strerror(errno)); + LOG_ERROR(Common, "Iconv initialization failure [%s]: %s", fromcode, strerror(errno)); iconv_close(conv_desc); return {}; } @@ -510,7 +510,7 @@ static std::string CodeToUTF8(const char* fromcode, const std::basic_string& } else { - ERROR_LOG(COMMON, "iconv failure [%s]: %s", fromcode, strerror(errno)); + LOG_ERROR(Common, "iconv failure [%s]: %s", fromcode, strerror(errno)); break; } } @@ -531,7 +531,7 @@ std::u16string UTF8ToUTF16(const std::string& input) iconv_t const conv_desc = iconv_open("UTF-16LE", "UTF-8"); if ((iconv_t)(-1) == conv_desc) { - ERROR_LOG(COMMON, "Iconv initialization failure [UTF-8]: %s", strerror(errno)); + LOG_ERROR(Common, "Iconv initialization failure [UTF-8]: %s", strerror(errno)); iconv_close(conv_desc); return {}; } @@ -566,7 +566,7 @@ std::u16string UTF8ToUTF16(const std::string& input) } else { - ERROR_LOG(COMMON, "iconv failure [UTF-8]: %s", strerror(errno)); + LOG_ERROR(Common, "iconv failure [UTF-8]: %s", strerror(errno)); break; } } diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 233cd3e3a..68012bffd 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -433,9 +433,7 @@ typedef struct _ldst_inst { unsigned int inst; get_addr_fp_t get_addr; } ldst_inst; -#define DEBUG_MSG DEBUG_LOG(ARM11, "in %s %d\n", __FUNCTION__, __LINE__); \ - DEBUG_LOG(ARM11, "inst is %x\n", inst); \ - CITRA_IGNORE_EXIT(0) +#define DEBUG_MSG LOG_DEBUG(Core_ARM11, "inst is %x", inst); CITRA_IGNORE_EXIT(0) int CondPassed(arm_processor *cpu, unsigned int cond); #define LnSWoUB(s) glue(LnSWoUB, s) @@ -1423,7 +1421,7 @@ inline void *AllocBuffer(unsigned int size) int start = top; top += size; if (top > CACHE_BUFFER_SIZE) { - DEBUG_LOG(ARM11, "inst_buf is full\n"); + LOG_ERROR(Core_ARM11, "inst_buf is full"); CITRA_IGNORE_EXIT(-1); } return (void *)&inst_buf[start]; @@ -1609,6 +1607,10 @@ get_addr_fp_t get_calc_addr_op(unsigned int inst) #define CHECK_RM (inst_cream->Rm == 15) #define CHECK_RS (inst_cream->Rs == 15) +#define UNIMPLEMENTED_INSTRUCTION(mnemonic) \ + LOG_ERROR(Core_ARM11, "unimplemented instruction: %s", mnemonic); \ + CITRA_IGNORE_EXIT(-1); \ + return nullptr; ARM_INST_PTR INTERPRETER_TRANSLATE(adc)(unsigned int inst, int index) { @@ -1723,7 +1725,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(bic)(unsigned int inst, int index) inst_base->br = INDIRECT_BRANCH; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(bkpt)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} +ARM_INST_PTR INTERPRETER_TRANSLATE(bkpt)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("BKPT"); } ARM_INST_PTR INTERPRETER_TRANSLATE(blx)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(blx_inst)); @@ -1758,7 +1760,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(bx)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(bxj)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} +ARM_INST_PTR INTERPRETER_TRANSLATE(bxj)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("BXJ"); } ARM_INST_PTR INTERPRETER_TRANSLATE(cdp)(unsigned int inst, int index){ arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cdp_inst)); cdp_inst *inst_cream = (cdp_inst *)inst_base->component; @@ -1775,7 +1777,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(cdp)(unsigned int inst, int index){ inst_cream->opcode_1 = BITS(inst, 20, 23); inst_cream->inst = inst; - DEBUG_LOG(ARM11, "in func %s inst %x index %x\n", __FUNCTION__, inst, index); + LOG_TRACE(Core_ARM11, "inst %x index %x", inst, index); return inst_base; } ARM_INST_PTR INTERPRETER_TRANSLATE(clrex)(unsigned int inst, int index) @@ -2205,7 +2207,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(mcr)(unsigned int inst, int index) inst_cream->inst = inst; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(mcrr)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} +ARM_INST_PTR INTERPRETER_TRANSLATE(mcrr)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("MCRR"); } ARM_INST_PTR INTERPRETER_TRANSLATE(mla)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mla_inst)); @@ -2264,7 +2266,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(mrc)(unsigned int inst, int index) inst_cream->inst = inst; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(mrrc)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} +ARM_INST_PTR INTERPRETER_TRANSLATE(mrrc)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("MRRC"); } ARM_INST_PTR INTERPRETER_TRANSLATE(mrs)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mrs_inst)); @@ -2358,8 +2360,8 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(orr)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(pkhbt)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(pkhtb)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} +ARM_INST_PTR INTERPRETER_TRANSLATE(pkhbt)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("PKHBT"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(pkhtb)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("PKHTB"); } ARM_INST_PTR INTERPRETER_TRANSLATE(pld)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(pld_inst)); @@ -2371,16 +2373,16 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(pld)(unsigned int inst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(qadd)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(qadd16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(qadd8)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(qaddsubx)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(qdadd)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(qdsub)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(qsub)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(qsub16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(qsub8)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(qsubaddx)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} +ARM_INST_PTR INTERPRETER_TRANSLATE(qadd)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QADD"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(qadd16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QADD16"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(qadd8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QADD8"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(qaddsubx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QADDSUBX"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(qdadd)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QDADD"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(qdsub)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QDSUB"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(qsub)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QSUB"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(qsub16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QSUB16"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(qsub8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QSUB8"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(qsubaddx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QSUBADDX"); } ARM_INST_PTR INTERPRETER_TRANSLATE(rev)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(rev_inst)); @@ -2410,8 +2412,8 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(rev16)(unsigned int inst, int index){ return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(revsh)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(rfe)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} +ARM_INST_PTR INTERPRETER_TRANSLATE(revsh)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("REVSH"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(rfe)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("RFE"); } ARM_INST_PTR INTERPRETER_TRANSLATE(rsb)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(rsb_inst)); @@ -2460,9 +2462,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(rsc)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(sadd16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(sadd8)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(saddsubx)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} +ARM_INST_PTR INTERPRETER_TRANSLATE(sadd16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SADD16"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(sadd8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SADD8"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(saddsubx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SADDSUBX"); } ARM_INST_PTR INTERPRETER_TRANSLATE(sbc)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sbc_inst)); @@ -2487,14 +2489,14 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(sbc)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(sel)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(setend)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(shadd16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(shadd8)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(shaddsubx)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(shsub16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(shsub8)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(shsubaddx)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} +ARM_INST_PTR INTERPRETER_TRANSLATE(sel)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SEL"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(setend)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SETEND"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(shadd16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SHADD16"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(shadd8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SHADD8"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(shaddsubx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SHADDSUBX"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(shsub16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SHSUB16"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(shsub8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SHSUB8"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(shsubaddx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SHSUBADDX"); } ARM_INST_PTR INTERPRETER_TRANSLATE(smla)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smla_inst)); @@ -2553,15 +2555,15 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(smlal)(unsigned int inst, int index) inst_base->load_r15 = 1; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(smlalxy)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(smlald)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(smlaw)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(smlsd)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(smlsld)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(smmla)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(smmls)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(smmul)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(smuad)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} +ARM_INST_PTR INTERPRETER_TRANSLATE(smlalxy)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SMLALXY"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(smlald)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SMLALD"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(smlaw)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SMLAW"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(smlsd)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SMLSD"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(smlsld)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SMLSLD"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(smmla)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SMMLA"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(smmls)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SMMLS"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(smmul)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SMMUL"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(smuad)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SMUAD"); } ARM_INST_PTR INTERPRETER_TRANSLATE(smul)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smul_inst)); @@ -2624,13 +2626,13 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(smulw)(unsigned int inst, int index) inst_base->load_r15 = 1; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(smusd)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(srs)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(ssat)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(ssat16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(ssub16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(ssub8)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(ssubaddx)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} +ARM_INST_PTR INTERPRETER_TRANSLATE(smusd)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SMUSD"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(srs)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SRS"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(ssat)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SSAT"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(ssat16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SSAT16"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(ssub16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SSUB16"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(ssub8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SSUB8"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(ssubaddx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SSUBADDX"); } ARM_INST_PTR INTERPRETER_TRANSLATE(stc)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(stc_inst)); @@ -2937,9 +2939,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab)(unsigned int inst, int index){ return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} +ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SXTAB16"); } ARM_INST_PTR INTERPRETER_TRANSLATE(sxtah)(unsigned int inst, int index){ - DEBUG_LOG(ARM11, "in func %s, SXTAH untested\n", __func__); + LOG_WARNING(Core_ARM11, "SXTAH untested"); arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtah_inst)); sxtah_inst *inst_cream = (sxtah_inst *)inst_base->component; @@ -2955,7 +2957,7 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(sxtah)(unsigned int inst, int index){ return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} +ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SXTB16"); } ARM_INST_PTR INTERPRETER_TRANSLATE(teq)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(teq_inst)); @@ -2999,16 +3001,16 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(tst)(unsigned int inst, int index) inst_base->load_r15 = 1; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(uadd16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(uadd8)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(uaddsubx)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd8)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(uhaddsubx)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub8)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(uhsubaddx)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(umaal)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} +ARM_INST_PTR INTERPRETER_TRANSLATE(uadd16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UADD16"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uadd8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UADD8"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uaddsubx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UADDSUBX"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UHADD16"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UHADD8"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uhaddsubx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UHADDSUBX"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UHSUB16"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UHSUB8"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uhsubaddx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UHSUBADDX"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(umaal)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UMAAL"); } ARM_INST_PTR INTERPRETER_TRANSLATE(umlal)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umlal_inst)); @@ -3111,21 +3113,21 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(blx_1_thumb)(unsigned int tinst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd8)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(uqaddsubx)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub8)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(uqsubaddx)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(usad8)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(usada8)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(usat)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(usat16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(usub16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(usub8)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(usubaddx)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} -ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb16)(unsigned int inst, int index){DEBUG_LOG(ARM11, "in func %s\n", __FUNCTION__);CITRA_IGNORE_EXIT(-1); return nullptr;} +ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UQADD16"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UQADD8"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uqaddsubx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UQADDSUBX"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UQSUB16"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UQSUB8"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uqsubaddx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UQSUBADDX"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(usad8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("USAD8"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(usada8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("USADA8"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(usat)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("USAT"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(usat16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("USAT16"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(usub16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("USUB16"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(usub8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("USUB8"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(usubaddx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("USUBADDX"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UXTAB16"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UXTB16"); } @@ -3391,7 +3393,7 @@ static tdstate decode_thumb_instr(arm_processor *cpu, uint32_t inst, addr_t addr } else{ /* something wrong */ - DEBUG_LOG(ARM11, "In %s, thumb decoder error\n", __FUNCTION__); + LOG_ERROR(Core_ARM11, "thumb decoder error"); } break; case 28: @@ -3599,7 +3601,7 @@ int InterpreterTranslate(arm_processor *cpu, int &bb_start, addr_t addr) bank->bank_read(32, phys_addr, &inst); } else { - DEBUG_LOG(ARM11, "SKYEYE: Read physical addr 0x%x error!!\n", phys_addr); + LOG_ERROR(Core_ARM11, "SKYEYE: Read physical addr 0x%x error!!\n", phys_addr); return FETCH_FAILURE; } #else @@ -3629,8 +3631,8 @@ int InterpreterTranslate(arm_processor *cpu, int &bb_start, addr_t addr) ret = decode_arm_instr(inst, &idx); if (ret == DECODE_FAILURE) { - DEBUG_LOG(ARM11, "[info] : Decode failure.\tPC : [0x%x]\tInstruction : [%x]\n", phys_addr, inst); - DEBUG_LOG(ARM11, "cpsr=0x%x, cpu->TFlag=%d, r15=0x%x\n", cpu->Cpsr, cpu->TFlag, cpu->Reg[15]); + LOG_ERROR(Core_ARM11, "Decode failure.\tPC : [0x%x]\tInstruction : [%x]", phys_addr, inst); + LOG_ERROR(Core_ARM11, "cpsr=0x%x, cpu->TFlag=%d, r15=0x%x", cpu->Cpsr, cpu->TFlag, cpu->Reg[15]); CITRA_IGNORE_EXIT(-1); } // DEBUG_LOG(ARM11, "PC : [0x%x] INST : %s\n", cpu->translate_pc, arm_instruction[idx].name); @@ -3674,7 +3676,7 @@ void InterpreterInitInstLength(unsigned long long int *ptr, size_t size) } } for (int i = 0; i < array_size - 4; i ++) - DEBUG_LOG(ARM11, "[%d]:%d\n", i, InstLength[i]); + LOG_DEBUG(Core_ARM11, "[%d]:%d", i, InstLength[i]); } int clz(unsigned int x) @@ -3721,7 +3723,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) //if (debug_function(core)) \ if (core->check_int_flag) \ goto END - //DEBUG_LOG(ARM11, "icounter is %llx line is %d pc is %x\n", cpu->icounter, __LINE__, cpu->Reg[15]) + //LOG_TRACE(Core_ARM11, "icounter is %llx pc is %x\n", cpu->icounter, cpu->Reg[15]) #else #define INC_ICOUNTER ; #endif @@ -4348,7 +4350,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) bx_inst *inst_cream = (bx_inst *)inst_base->component; if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) { if (inst_cream->Rm == 15) - DEBUG_LOG(ARM11, "In %s, BX at pc %x: use of Rm = R15 is discouraged\n", __FUNCTION__, cpu->Reg[15]); + LOG_WARNING(Core_ARM11, "BX at pc %x: use of Rm = R15 is discouraged", cpu->Reg[15]); cpu->TFlag = cpu->Reg[inst_cream->Rm] & 0x1; cpu->Reg[15] = cpu->Reg[inst_cream->Rm] & 0xfffffffe; // cpu->TFlag = cpu->Reg[inst_cream->Rm] & 0x1; @@ -4373,10 +4375,10 @@ unsigned InterpreterMainLoop(ARMul_State* state) cpu->NumInstrsToExecute = 0; return num_instrs; } - ERROR_LOG(ARM11, "CDP insn inst=0x%x, pc=0x%x\n", inst_cream->inst, cpu->Reg[15]); + LOG_ERROR(Core_ARM11, "CDP insn inst=0x%x, pc=0x%x\n", inst_cream->inst, cpu->Reg[15]); unsigned cpab = (cpu->CDP[inst_cream->cp_num]) (cpu, ARMul_FIRST, inst_cream->inst); if(cpab != ARMul_DONE){ - ERROR_LOG(ARM11, "CDP insn wrong, inst=0x%x, cp_num=0x%x\n", inst_cream->inst, inst_cream->cp_num); + LOG_ERROR(Core_ARM11, "CDP insn wrong, inst=0x%x, cp_num=0x%x\n", inst_cream->inst, inst_cream->cp_num); //CITRA_IGNORE_EXIT(-1); } } @@ -4803,7 +4805,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) & 0xffff; RD = RN + operand2; if (inst_cream->Rn == 15 || inst_cream->Rm == 15) { - DEBUG_LOG(ARM11, "in line %d\n", __LINE__); + LOG_ERROR(Core_ARM11, "invalid operands for UXTAH"); CITRA_IGNORE_EXIT(-1); } } @@ -4866,7 +4868,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) uint32_t rear_phys_addr; fault = check_address_validity(cpu, addr + 4, &rear_phys_addr, 1); if(fault){ - ERROR_LOG(ARM11, "mmu fault , should rollback the above get_addr\n"); + LOG_ERROR(Core_ARM11, "mmu fault , should rollback the above get_addr\n"); CITRA_IGNORE_EXIT(-1); goto MMU_EXCEPTION; } @@ -5089,7 +5091,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) switch(OPCODE_2){ case 0: /* invalidate all */ //invalidate_all_tlb(state); - DEBUG_LOG(ARM11, "{TLB} [INSN] invalidate all\n"); + LOG_DEBUG(Core_ARM11, "{TLB} [INSN] invalidate all"); //remove_tlb(INSN_TLB); //erase_all(core, INSN_TLB); break; @@ -5115,7 +5117,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) //invalidate_all_tlb(state); //remove_tlb(DATA_TLB); //erase_all(core, DATA_TLB); - DEBUG_LOG(ARM11, "{TLB} [DATA] invalidate all\n"); + LOG_DEBUG(Core_ARM11, "{TLB} [DATA] invalidate all"); break; case 1: /* invalidate by MVA */ //invalidate_by_mva(state, value); @@ -5147,13 +5149,13 @@ unsigned InterpreterMainLoop(ARMul_State* state) //invalidate_by_mva(state, value); //erase_by_mva(core, RD, DATA_TLB); //erase_by_mva(core, RD, INSN_TLB); - DEBUG_LOG(ARM11, "{TLB} [UNIFILED] invalidate by mva\n"); + LOG_DEBUG(Core_ARM11, "{TLB} [UNIFILED] invalidate by mva"); break; case 2: /* invalidate by asid */ //invalidate_by_asid(state, value); //erase_by_asid(core, RD, DATA_TLB); //erase_by_asid(core, RD, INSN_TLB); - DEBUG_LOG(ARM11, "{TLB} [UNIFILED] invalidate by asid\n"); + LOG_DEBUG(Core_ARM11, "{TLB} [UNIFILED] invalidate by asid"); break; default: break; @@ -5175,7 +5177,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) } } else { - DEBUG_LOG(ARM11, "mcr is not implementated. CRn is %d, CRm is %d, OPCODE_2 is %d\n", CRn, CRm, OPCODE_2); + LOG_ERROR(Core_ARM11, "mcr CRn=%d, CRm=%d OP2=%d is not implemented", CRn, CRm, OPCODE_2); } } } @@ -5195,7 +5197,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) uint64_t rs = RS; uint64_t rn = RN; if (inst_cream->Rm == 15 || inst_cream->Rs == 15 || inst_cream->Rn == 15) { - DEBUG_LOG(ARM11, "in __line__\n", __LINE__); + LOG_ERROR(Core_ARM11, "invalid operands for MLA"); CITRA_IGNORE_EXIT(-1); } // RD = dst = RM * RS + RN; @@ -5309,7 +5311,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) } } else { - DEBUG_LOG(ARM11, "mrc is not implementated. CRn is %d, CRm is %d, OPCODE_2 is %d\n", CRn, CRm, OPCODE_2); + LOG_ERROR(Core_ARM11, "mrc CRn=%d, CRm=%d, OP2=%d is not implemented", CRn, CRm, OPCODE_2); } } //DEBUG_LOG(ARM11, "mrc is not implementated. CRn is %d, CRm is %d, OPCODE_2 is %d\n", CRn, CRm, OPCODE_2); @@ -5500,7 +5502,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) (((RM >> 16) & 0xff) << 8) | ((RM >> 24) & 0xff); if (inst_cream->Rm == 15) { - DEBUG_LOG(ARM11, "in line %d\n", __LINE__); + LOG_ERROR(Core_ARM11, "invalid operand for REV"); CITRA_IGNORE_EXIT(-1); } } @@ -5953,7 +5955,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) sxtb_inst *inst_cream = (sxtb_inst *)inst_base->component; if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) { if (inst_cream->Rm == 15) { - DEBUG_LOG(ARM11, "line is %d\n", __LINE__); + LOG_ERROR(Core_ARM11, "invalid operand for SXTB"); CITRA_IGNORE_EXIT(-1); } unsigned int operand2 = ROTATE_RIGHT_32(RM, 8 * inst_cream->rotate); @@ -6059,7 +6061,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) uint32_t rear_phys_addr; fault = check_address_validity(cpu, addr + 4, &rear_phys_addr, 0); if (fault){ - ERROR_LOG(ARM11, "mmu fault , should rollback the above get_addr\n"); + LOG_ERROR(Core_ARM11, "mmu fault , should rollback the above get_addr\n"); CITRA_IGNORE_EXIT(-1); goto MMU_EXCEPTION; } diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index d717bd2c8..825955ade 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -949,7 +949,7 @@ ARMul_Emulate26 (ARMul_State * state) //printf("t decode %04lx -> %08lx\n", instr & 0xffff, armOp); if (armOp == 0xDEADC0DE) { - DEBUG("Failed to decode thumb opcode %04X at %08X\n", instr, pc); + LOG_ERROR(Core_ARM11, "Failed to decode thumb opcode %04X at %08X", instr, pc); } instr = armOp; @@ -3437,7 +3437,7 @@ mainswitch: case 0x7f: /* Load Byte, WriteBack, Pre Inc, Reg. */ if (BIT (4)) { - DEBUG("got unhandled special breakpoint\n"); + LOG_DEBUG(Core_ARM11, "got unhandled special breakpoint"); return 1; } UNDEF_LSRBaseEQOffWb; diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp index 2568b93ef..30519f216 100644 --- a/src/core/arm/interpreter/armsupp.cpp +++ b/src/core/arm/interpreter/armsupp.cpp @@ -665,7 +665,7 @@ ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source) //if (!CP_ACCESS_ALLOWED (state, CPNum)) { if (!state->MCR[CPNum]) { //chy 2004-07-19 should fix in the future ????!!!! - DEBUG("SKYEYE ARMul_MCR, ACCESS_not ALLOWed, UndefinedInstr CPnum is %x, source %x\n",CPNum, source); + LOG_ERROR(Core_ARM11, "SKYEYE ARMul_MCR, ACCESS_not ALLOWed, UndefinedInstr CPnum is %x, source %x",CPNum, source); ARMul_UndefInstr (state, instr); return; } @@ -690,7 +690,7 @@ ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source) } if (cpab == ARMul_CANT) { - DEBUG("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source); //ichfly todo + LOG_ERROR(Core_ARM11, "SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x", instr, CPNum, source); //ichfly todo //ARMul_Abort (state, ARMul_UndefinedInstrV); } else { BUSUSEDINCPCN; @@ -762,7 +762,7 @@ ARMword ARMul_MRC (ARMul_State * state, ARMword instr) //if (!CP_ACCESS_ALLOWED (state, CPNum)) { if (!state->MRC[CPNum]) { //chy 2004-07-19 should fix in the future????!!!! - DEBUG("SKYEYE ARMul_MRC,NOT ALLOWed UndefInstr CPnum is %x, instr %x\n", CPNum, instr); + LOG_ERROR(Core_ARM11, "SKYEYE ARMul_MRC,NOT ALLOWed UndefInstr CPnum is %x, instr %x", CPNum, instr); ARMul_UndefInstr (state, instr); return -1; } @@ -865,7 +865,7 @@ void ARMul_UndefInstr (ARMul_State * state, ARMword instr) { std::string disasm = ARM_Disasm::Disassemble(state->pc, instr); - ERROR_LOG(ARM11, "Undefined instruction!! Disasm: %s Opcode: 0x%x", disasm.c_str(), instr); + LOG_ERROR(Core_ARM11, "Undefined instruction!! Disasm: %s Opcode: 0x%x", disasm.c_str(), instr); ARMul_Abort (state, ARMul_UndefinedInstrV); } diff --git a/src/core/arm/interpreter/thumbemu.cpp b/src/core/arm/interpreter/thumbemu.cpp index f7f11f714..9cf80672d 100644 --- a/src/core/arm/interpreter/thumbemu.cpp +++ b/src/core/arm/interpreter/thumbemu.cpp @@ -467,7 +467,7 @@ ARMul_ThumbDecode ( (state->Reg[14] + ((tinstr & 0x07FF) << 1)) & 0xFFFFFFFC; state->Reg[14] = (tmp | 1); CLEART; - DEBUG_LOG(ARM11, "In %s, After BLX(1),LR=0x%x,PC=0x%x, offset=0x%x\n", __FUNCTION__, state->Reg[14], state->Reg[15], (tinstr &0x7FF) << 1); + LOG_DEBUG(Core_ARM11, "After BLX(1),LR=0x%x,PC=0x%x, offset=0x%x", state->Reg[14], state->Reg[15], (tinstr &0x7FF) << 1); valid = t_branch; FLUSHPIPE; } diff --git a/src/core/arm/skyeye_common/armemu.h b/src/core/arm/skyeye_common/armemu.h index 075fc7e9e..7f7c0e682 100644 --- a/src/core/arm/skyeye_common/armemu.h +++ b/src/core/arm/skyeye_common/armemu.h @@ -23,8 +23,6 @@ //extern ARMword isize; -#define DEBUG(...) DEBUG_LOG(ARM11, __VA_ARGS__) - /* Shift Opcodes. */ #define LSL 0 #define LSR 1 @@ -485,7 +483,7 @@ tdstate; * out-of-updated with the newer ISA. * -- Michael.Kang ********************************************************************************/ -#define UNDEF_WARNING WARN_LOG(ARM11, "undefined or unpredicted behavior for arm instruction.\n"); +#define UNDEF_WARNING LOG_WARNING(Core_ARM11, "undefined or unpredicted behavior for arm instruction."); /* Macros to scrutinize instructions. */ #define UNDEF_Test UNDEF_WARNING diff --git a/src/core/core.cpp b/src/core/core.cpp index 865898b24..64de0cbba 100644 --- a/src/core/core.cpp +++ b/src/core/core.cpp @@ -47,7 +47,7 @@ void Stop() { /// Initialize the core int Init() { - NOTICE_LOG(MASTER_LOG, "initialized OK"); + LOG_DEBUG(Core, "initialized OK"); disasm = new ARM_Disasm(); g_sys_core = new ARM_Interpreter(); @@ -72,7 +72,7 @@ void Shutdown() { delete g_app_core; delete g_sys_core; - NOTICE_LOG(MASTER_LOG, "shutdown OK"); + LOG_DEBUG(Core, "shutdown OK"); } } // namespace diff --git a/src/core/core_timing.cpp b/src/core/core_timing.cpp index bf8acf41f..1a0b2724a 100644 --- a/src/core/core_timing.cpp +++ b/src/core/core_timing.cpp @@ -124,7 +124,7 @@ int RegisterEvent(const char *name, TimedCallback callback) void AntiCrashCallback(u64 userdata, int cyclesLate) { - ERROR_LOG(TIME, "Savestate broken: an unregistered event was called."); + LOG_CRITICAL(Core, "Savestate broken: an unregistered event was called."); Core::Halt("invalid timing events"); } @@ -176,7 +176,7 @@ void Shutdown() u64 GetTicks() { - ERROR_LOG(TIME, "Unimplemented function!"); + LOG_ERROR(Core, "Unimplemented function!"); return 0; //return (u64)globalTimer + slicelength - currentMIPS->downcount; } @@ -510,7 +510,7 @@ void MoveEvents() void Advance() { - ERROR_LOG(TIME, "Unimplemented function!"); + LOG_ERROR(Core, "Unimplemented function!"); //int cyclesExecuted = slicelength - currentMIPS->downcount; //globalTimer += cyclesExecuted; //currentMIPS->downcount = slicelength; @@ -547,7 +547,7 @@ void LogPendingEvents() void Idle(int maxIdle) { - ERROR_LOG(TIME, "Unimplemented function!"); + LOG_ERROR(Core, "Unimplemented function!"); //int cyclesDown = currentMIPS->downcount; //if (maxIdle != 0 && cyclesDown > maxIdle) // cyclesDown = maxIdle; diff --git a/src/core/file_sys/archive.h b/src/core/file_sys/archive.h index f3cb11133..27ed23cd0 100644 --- a/src/core/file_sys/archive.h +++ b/src/core/file_sys/archive.h @@ -100,7 +100,8 @@ public: case Wchar: return "[Wchar: " + AsString() + ']'; default: - ERROR_LOG(KERNEL, "LowPathType cannot be converted to string!"); + // TODO(yuriks): Add assert + LOG_ERROR(Service_FS, "LowPathType cannot be converted to string!"); return {}; } } @@ -114,7 +115,8 @@ public: case Empty: return {}; default: - ERROR_LOG(KERNEL, "LowPathType cannot be converted to string!"); + // TODO(yuriks): Add assert + LOG_ERROR(Service_FS, "LowPathType cannot be converted to string!"); return {}; } } @@ -128,7 +130,8 @@ public: case Empty: return {}; default: - ERROR_LOG(KERNEL, "LowPathType cannot be converted to u16string!"); + // TODO(yuriks): Add assert + LOG_ERROR(Service_FS, "LowPathType cannot be converted to u16string!"); return {}; } } @@ -144,7 +147,8 @@ public: case Empty: return {}; default: - ERROR_LOG(KERNEL, "LowPathType cannot be converted to binary!"); + // TODO(yuriks): Add assert + LOG_ERROR(Service_FS, "LowPathType cannot be converted to binary!"); return {}; } } diff --git a/src/core/file_sys/archive_romfs.cpp b/src/core/file_sys/archive_romfs.cpp index 8c2dbeda5..74974c2df 100644 --- a/src/core/file_sys/archive_romfs.cpp +++ b/src/core/file_sys/archive_romfs.cpp @@ -16,7 +16,7 @@ namespace FileSys { Archive_RomFS::Archive_RomFS(const Loader::AppLoader& app_loader) { // Load the RomFS from the app if (Loader::ResultStatus::Success != app_loader.ReadRomFS(raw_data)) { - WARN_LOG(FILESYS, "Unable to read RomFS!"); + LOG_ERROR(Service_FS, "Unable to read RomFS!"); } } @@ -39,12 +39,12 @@ std::unique_ptr Archive_RomFS::OpenFile(const Path& path, const Mode mode) * @return Whether the file could be deleted */ bool Archive_RomFS::DeleteFile(const FileSys::Path& path) const { - ERROR_LOG(FILESYS, "Attempted to delete a file from ROMFS."); + LOG_WARNING(Service_FS, "Attempted to delete a file from ROMFS."); return false; } bool Archive_RomFS::RenameFile(const FileSys::Path& src_path, const FileSys::Path& dest_path) const { - ERROR_LOG(FILESYS, "Attempted to rename a file within ROMFS."); + LOG_WARNING(Service_FS, "Attempted to rename a file within ROMFS."); return false; } @@ -54,7 +54,7 @@ bool Archive_RomFS::RenameFile(const FileSys::Path& src_path, const FileSys::Pat * @return Whether the directory could be deleted */ bool Archive_RomFS::DeleteDirectory(const FileSys::Path& path) const { - ERROR_LOG(FILESYS, "Attempted to delete a directory from ROMFS."); + LOG_WARNING(Service_FS, "Attempted to delete a directory from ROMFS."); return false; } @@ -64,12 +64,12 @@ bool Archive_RomFS::DeleteDirectory(const FileSys::Path& path) const { * @return Whether the directory could be created */ bool Archive_RomFS::CreateDirectory(const Path& path) const { - ERROR_LOG(FILESYS, "Attempted to create a directory in ROMFS."); + LOG_WARNING(Service_FS, "Attempted to create a directory in ROMFS."); return false; } bool Archive_RomFS::RenameDirectory(const FileSys::Path& src_path, const FileSys::Path& dest_path) const { - ERROR_LOG(FILESYS, "Attempted to rename a file within ROMFS."); + LOG_WARNING(Service_FS, "Attempted to rename a file within ROMFS."); return false; } @@ -90,7 +90,7 @@ std::unique_ptr Archive_RomFS::OpenDirectory(const Path& path) const * @return Number of bytes read */ size_t Archive_RomFS::Read(const u64 offset, const u32 length, u8* buffer) const { - DEBUG_LOG(FILESYS, "called offset=%llu, length=%d", offset, length); + LOG_TRACE(Service_FS, "called offset=%llu, length=%d", offset, length); memcpy(buffer, &raw_data[(u32)offset], length); return length; } @@ -104,7 +104,7 @@ size_t Archive_RomFS::Read(const u64 offset, const u32 length, u8* buffer) const * @return Number of bytes written */ size_t Archive_RomFS::Write(const u64 offset, const u32 length, const u32 flush, u8* buffer) { - ERROR_LOG(FILESYS, "Attempted to write to ROMFS."); + LOG_WARNING(Service_FS, "Attempted to write to ROMFS."); return 0; } @@ -120,7 +120,7 @@ size_t Archive_RomFS::GetSize() const { * Set the size of the archive in bytes */ void Archive_RomFS::SetSize(const u64 size) { - ERROR_LOG(FILESYS, "Attempted to set the size of ROMFS"); + LOG_WARNING(Service_FS, "Attempted to set the size of ROMFS"); } } // namespace FileSys diff --git a/src/core/file_sys/archive_sdmc.cpp b/src/core/file_sys/archive_sdmc.cpp index fc0b9b72d..9e524b60e 100644 --- a/src/core/file_sys/archive_sdmc.cpp +++ b/src/core/file_sys/archive_sdmc.cpp @@ -19,7 +19,7 @@ namespace FileSys { Archive_SDMC::Archive_SDMC(const std::string& mount_point) { this->mount_point = mount_point; - DEBUG_LOG(FILESYS, "Directory %s set as SDMC.", mount_point.c_str()); + LOG_INFO(Service_FS, "Directory %s set as SDMC.", mount_point.c_str()); } Archive_SDMC::~Archive_SDMC() { @@ -31,12 +31,12 @@ Archive_SDMC::~Archive_SDMC() { */ bool Archive_SDMC::Initialize() { if (!Settings::values.use_virtual_sd) { - WARN_LOG(FILESYS, "SDMC disabled by config."); + LOG_WARNING(Service_FS, "SDMC disabled by config."); return false; } if (!FileUtil::CreateFullPath(mount_point)) { - WARN_LOG(FILESYS, "Unable to create SDMC path."); + LOG_ERROR(Service_FS, "Unable to create SDMC path."); return false; } @@ -50,7 +50,7 @@ bool Archive_SDMC::Initialize() { * @return Opened file, or nullptr */ std::unique_ptr Archive_SDMC::OpenFile(const Path& path, const Mode mode) const { - DEBUG_LOG(FILESYS, "called path=%s mode=%u", path.DebugStr().c_str(), mode.hex); + LOG_DEBUG(Service_FS, "called path=%s mode=%u", path.DebugStr().c_str(), mode.hex); File_SDMC* file = new File_SDMC(this, path, mode); if (!file->Open()) return nullptr; @@ -98,7 +98,7 @@ bool Archive_SDMC::RenameDirectory(const FileSys::Path& src_path, const FileSys: * @return Opened directory, or nullptr */ std::unique_ptr Archive_SDMC::OpenDirectory(const Path& path) const { - DEBUG_LOG(FILESYS, "called path=%s", path.DebugStr().c_str()); + LOG_DEBUG(Service_FS, "called path=%s", path.DebugStr().c_str()); Directory_SDMC* directory = new Directory_SDMC(this, path); if (!directory->Open()) return nullptr; @@ -113,7 +113,7 @@ std::unique_ptr Archive_SDMC::OpenDirectory(const Path& path) const { * @return Number of bytes read */ size_t Archive_SDMC::Read(const u64 offset, const u32 length, u8* buffer) const { - ERROR_LOG(FILESYS, "(UNIMPLEMENTED)"); + LOG_ERROR(Service_FS, "(UNIMPLEMENTED)"); return -1; } @@ -126,7 +126,7 @@ size_t Archive_SDMC::Read(const u64 offset, const u32 length, u8* buffer) const * @return Number of bytes written */ size_t Archive_SDMC::Write(const u64 offset, const u32 length, const u32 flush, u8* buffer) { - ERROR_LOG(FILESYS, "(UNIMPLEMENTED)"); + LOG_ERROR(Service_FS, "(UNIMPLEMENTED)"); return -1; } @@ -135,7 +135,7 @@ size_t Archive_SDMC::Write(const u64 offset, const u32 length, const u32 flush, * @return Size of the archive in bytes */ size_t Archive_SDMC::GetSize() const { - ERROR_LOG(FILESYS, "(UNIMPLEMENTED)"); + LOG_ERROR(Service_FS, "(UNIMPLEMENTED)"); return 0; } @@ -143,7 +143,7 @@ size_t Archive_SDMC::GetSize() const { * Set the size of the archive in bytes */ void Archive_SDMC::SetSize(const u64 size) { - ERROR_LOG(FILESYS, "(UNIMPLEMENTED)"); + LOG_ERROR(Service_FS, "(UNIMPLEMENTED)"); } /** diff --git a/src/core/file_sys/directory_sdmc.cpp b/src/core/file_sys/directory_sdmc.cpp index 0f156a127..519787641 100644 --- a/src/core/file_sys/directory_sdmc.cpp +++ b/src/core/file_sys/directory_sdmc.cpp @@ -49,7 +49,7 @@ u32 Directory_SDMC::Read(const u32 count, Entry* entries) { const std::string& filename = file.virtualName; Entry& entry = entries[entries_read]; - WARN_LOG(FILESYS, "File %s: size=%llu dir=%d", filename.c_str(), file.size, file.isDirectory); + LOG_TRACE(Service_FS, "File %s: size=%llu dir=%d", filename.c_str(), file.size, file.isDirectory); // TODO(Link Mauve): use a proper conversion to UTF-16. for (size_t j = 0; j < FILENAME_LENGTH; ++j) { diff --git a/src/core/file_sys/file_sdmc.cpp b/src/core/file_sys/file_sdmc.cpp index b01d96e3d..46c29900b 100644 --- a/src/core/file_sys/file_sdmc.cpp +++ b/src/core/file_sys/file_sdmc.cpp @@ -33,7 +33,7 @@ File_SDMC::~File_SDMC() { */ bool File_SDMC::Open() { if (!mode.create_flag && !FileUtil::Exists(path)) { - ERROR_LOG(FILESYS, "Non-existing file %s can’t be open without mode create.", path.c_str()); + LOG_ERROR(Service_FS, "Non-existing file %s can’t be open without mode create.", path.c_str()); return false; } diff --git a/src/core/hle/config_mem.cpp b/src/core/hle/config_mem.cpp index 1c9b89227..d8ba9e6cf 100644 --- a/src/core/hle/config_mem.cpp +++ b/src/core/hle/config_mem.cpp @@ -55,7 +55,7 @@ inline void Read(T &var, const u32 addr) { break; default: - ERROR_LOG(HLE, "unknown addr=0x%08X", addr); + LOG_ERROR(Kernel, "unknown addr=0x%08X", addr); } } diff --git a/src/core/hle/hle.cpp b/src/core/hle/hle.cpp index b8ac186f6..3f73b5538 100644 --- a/src/core/hle/hle.cpp +++ b/src/core/hle/hle.cpp @@ -20,7 +20,7 @@ bool g_reschedule = false; ///< If true, immediately reschedules the CPU to a n const FunctionDef* GetSVCInfo(u32 opcode) { u32 func_num = opcode & 0xFFFFFF; // 8 bits if (func_num > 0xFF) { - ERROR_LOG(HLE,"unknown svc=0x%02X", func_num); + LOG_ERROR(Kernel_SVC,"unknown svc=0x%02X", func_num); return nullptr; } return &g_module_db[0].func_table[func_num]; @@ -35,14 +35,12 @@ void CallSVC(u32 opcode) { if (info->func) { info->func(); } else { - ERROR_LOG(HLE, "unimplemented SVC function %s(..)", info->name.c_str()); + LOG_ERROR(Kernel_SVC, "unimplemented SVC function %s(..)", info->name.c_str()); } } void Reschedule(const char *reason) { -#ifdef _DEBUG - _dbg_assert_msg_(HLE, reason != 0 && strlen(reason) < 256, "Reschedule: Invalid or too long reason."); -#endif + _dbg_assert_msg_(Kernel, reason != 0 && strlen(reason) < 256, "Reschedule: Invalid or too long reason."); Core::g_app_core->PrepareReschedule(); g_reschedule = true; } @@ -61,7 +59,7 @@ void Init() { RegisterAllModules(); - NOTICE_LOG(HLE, "initialized OK"); + LOG_DEBUG(Kernel, "initialized OK"); } void Shutdown() { @@ -69,7 +67,7 @@ void Shutdown() { g_module_db.clear(); - NOTICE_LOG(HLE, "shutdown OK"); + LOG_DEBUG(Kernel, "shutdown OK"); } } // namespace diff --git a/src/core/hle/kernel/address_arbiter.cpp b/src/core/hle/kernel/address_arbiter.cpp index ce4f3c854..9a921108d 100644 --- a/src/core/hle/kernel/address_arbiter.cpp +++ b/src/core/hle/kernel/address_arbiter.cpp @@ -24,12 +24,6 @@ public: Kernel::HandleType GetHandleType() const override { return HandleType::AddressArbiter; } std::string name; ///< Name of address arbiter object (optional) - - ResultVal WaitSynchronization() override { - // TODO(bunnei): ImplementMe - ERROR_LOG(OSHLE, "(UNIMPLEMENTED)"); - return UnimplementedFunction(ErrorModule::OS); - } }; //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -59,7 +53,7 @@ ResultCode ArbitrateAddress(Handle handle, ArbitrationType type, u32 address, s3 break; default: - ERROR_LOG(KERNEL, "unknown type=%d", type); + LOG_ERROR(Kernel, "unknown type=%d", type); return ResultCode(ErrorDescription::InvalidEnumValue, ErrorModule::Kernel, ErrorSummary::WrongArgument, ErrorLevel::Usage); } return RESULT_SUCCESS; diff --git a/src/core/hle/kernel/archive.cpp b/src/core/hle/kernel/archive.cpp index a875fa7ff..ddc09e13b 100644 --- a/src/core/hle/kernel/archive.cpp +++ b/src/core/hle/kernel/archive.cpp @@ -94,26 +94,20 @@ public: } case FileCommand::Close: { - DEBUG_LOG(KERNEL, "Close %s %s", GetTypeName().c_str(), GetName().c_str()); + LOG_TRACE(Service_FS, "Close %s %s", GetTypeName().c_str(), GetName().c_str()); CloseArchive(backend->GetIdCode()); break; } // Unknown command... default: { - ERROR_LOG(KERNEL, "Unknown command=0x%08X!", cmd); + LOG_ERROR(Service_FS, "Unknown command=0x%08X", cmd); return UnimplementedFunction(ErrorModule::FS); } } cmd_buff[1] = 0; // No error return MakeResult(false); } - - ResultVal WaitSynchronization() override { - // TODO(bunnei): ImplementMe - ERROR_LOG(OSHLE, "(UNIMPLEMENTED)"); - return UnimplementedFunction(ErrorModule::FS); - } }; class File : public Object { @@ -138,7 +132,7 @@ public: u64 offset = cmd_buff[1] | ((u64) cmd_buff[2]) << 32; u32 length = cmd_buff[3]; u32 address = cmd_buff[5]; - DEBUG_LOG(KERNEL, "Read %s %s: offset=0x%llx length=%d address=0x%x", + LOG_TRACE(Service_FS, "Read %s %s: offset=0x%llx length=%d address=0x%x", GetTypeName().c_str(), GetName().c_str(), offset, length, address); cmd_buff[2] = backend->Read(offset, length, Memory::GetPointer(address)); break; @@ -151,7 +145,7 @@ public: u32 length = cmd_buff[3]; u32 flush = cmd_buff[4]; u32 address = cmd_buff[6]; - DEBUG_LOG(KERNEL, "Write %s %s: offset=0x%llx length=%d address=0x%x, flush=0x%x", + LOG_TRACE(Service_FS, "Write %s %s: offset=0x%llx length=%d address=0x%x, flush=0x%x", GetTypeName().c_str(), GetName().c_str(), offset, length, address, flush); cmd_buff[2] = backend->Write(offset, length, flush, Memory::GetPointer(address)); break; @@ -159,7 +153,7 @@ public: case FileCommand::GetSize: { - DEBUG_LOG(KERNEL, "GetSize %s %s", GetTypeName().c_str(), GetName().c_str()); + LOG_TRACE(Service_FS, "GetSize %s %s", GetTypeName().c_str(), GetName().c_str()); u64 size = backend->GetSize(); cmd_buff[2] = (u32)size; cmd_buff[3] = size >> 32; @@ -169,7 +163,7 @@ public: case FileCommand::SetSize: { u64 size = cmd_buff[1] | ((u64)cmd_buff[2] << 32); - DEBUG_LOG(KERNEL, "SetSize %s %s size=%llu", + LOG_TRACE(Service_FS, "SetSize %s %s size=%llu", GetTypeName().c_str(), GetName().c_str(), size); backend->SetSize(size); break; @@ -177,14 +171,14 @@ public: case FileCommand::Close: { - DEBUG_LOG(KERNEL, "Close %s %s", GetTypeName().c_str(), GetName().c_str()); + LOG_TRACE(Service_FS, "Close %s %s", GetTypeName().c_str(), GetName().c_str()); Kernel::g_object_pool.Destroy(GetHandle()); break; } // Unknown command... default: - ERROR_LOG(KERNEL, "Unknown command=0x%08X!", cmd); + LOG_ERROR(Service_FS, "Unknown command=0x%08X!", cmd); ResultCode error = UnimplementedFunction(ErrorModule::FS); cmd_buff[1] = error.raw; // TODO(Link Mauve): use the correct error code for that. return error; @@ -192,12 +186,6 @@ public: cmd_buff[1] = 0; // No error return MakeResult(false); } - - ResultVal WaitSynchronization() override { - // TODO(bunnei): ImplementMe - ERROR_LOG(OSHLE, "(UNIMPLEMENTED)"); - return UnimplementedFunction(ErrorModule::FS); - } }; class Directory : public Object { @@ -222,7 +210,7 @@ public: u32 count = cmd_buff[1]; u32 address = cmd_buff[3]; auto entries = reinterpret_cast(Memory::GetPointer(address)); - DEBUG_LOG(KERNEL, "Read %s %s: count=%d", + LOG_TRACE(Service_FS, "Read %s %s: count=%d", GetTypeName().c_str(), GetName().c_str(), count); // Number of entries actually read @@ -232,14 +220,14 @@ public: case DirectoryCommand::Close: { - DEBUG_LOG(KERNEL, "Close %s %s", GetTypeName().c_str(), GetName().c_str()); + LOG_TRACE(Service_FS, "Close %s %s", GetTypeName().c_str(), GetName().c_str()); Kernel::g_object_pool.Destroy(GetHandle()); break; } // Unknown command... default: - ERROR_LOG(KERNEL, "Unknown command=0x%08X!", cmd); + LOG_ERROR(Service_FS, "Unknown command=0x%08X!", cmd); ResultCode error = UnimplementedFunction(ErrorModule::FS); cmd_buff[1] = error.raw; // TODO(Link Mauve): use the correct error code for that. return error; @@ -247,12 +235,6 @@ public: cmd_buff[1] = 0; // No error return MakeResult(false); } - - ResultVal WaitSynchronization() override { - // TODO(bunnei): ImplementMe - ERROR_LOG(OSHLE, "(UNIMPLEMENTED)"); - return UnimplementedFunction(ErrorModule::FS); - } }; //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -272,11 +254,11 @@ ResultVal OpenArchive(FileSys::Archive::IdCode id_code) { ResultCode CloseArchive(FileSys::Archive::IdCode id_code) { auto itr = g_archive_map.find(id_code); if (itr == g_archive_map.end()) { - ERROR_LOG(KERNEL, "Cannot close archive %d, does not exist!", (int)id_code); + LOG_ERROR(Service_FS, "Cannot close archive %d, does not exist!", (int)id_code); return InvalidHandle(ErrorModule::FS); } - INFO_LOG(KERNEL, "Closed archive %d", (int) id_code); + LOG_TRACE(Service_FS, "Closed archive %d", (int) id_code); return RESULT_SUCCESS; } @@ -288,11 +270,11 @@ ResultCode MountArchive(Archive* archive) { FileSys::Archive::IdCode id_code = archive->backend->GetIdCode(); ResultVal archive_handle = OpenArchive(id_code); if (archive_handle.Succeeded()) { - ERROR_LOG(KERNEL, "Cannot mount two archives with the same ID code! (%d)", (int) id_code); + LOG_ERROR(Service_FS, "Cannot mount two archives with the same ID code! (%d)", (int) id_code); return archive_handle.Code(); } g_archive_map[id_code] = archive->GetHandle(); - INFO_LOG(KERNEL, "Mounted archive %s", archive->GetName().c_str()); + LOG_TRACE(Service_FS, "Mounted archive %s", archive->GetName().c_str()); return RESULT_SUCCESS; } @@ -442,7 +424,7 @@ void ArchiveInit() { if (archive->Initialize()) CreateArchive(archive, "SDMC"); else - ERROR_LOG(KERNEL, "Can't instantiate SDMC archive with path %s", sdmc_directory.c_str()); + LOG_ERROR(Service_FS, "Can't instantiate SDMC archive with path %s", sdmc_directory.c_str()); } /// Shutdown archives diff --git a/src/core/hle/kernel/kernel.cpp b/src/core/hle/kernel/kernel.cpp index 80a34c2d5..b38be0a49 100644 --- a/src/core/hle/kernel/kernel.cpp +++ b/src/core/hle/kernel/kernel.cpp @@ -35,7 +35,7 @@ Handle ObjectPool::Create(Object* obj, int range_bottom, int range_top) { return i + HANDLE_OFFSET; } } - ERROR_LOG(HLE, "Unable to allocate kernel object, too many objects slots in use."); + LOG_ERROR(Kernel, "Unable to allocate kernel object, too many objects slots in use."); return 0; } @@ -62,7 +62,7 @@ void ObjectPool::Clear() { Object* &ObjectPool::operator [](Handle handle) { - _dbg_assert_msg_(KERNEL, IsValid(handle), "GRABBING UNALLOCED KERNEL OBJ"); + _dbg_assert_msg_(Kernel, IsValid(handle), "GRABBING UNALLOCED KERNEL OBJ"); return pool[handle - HANDLE_OFFSET]; } @@ -70,7 +70,7 @@ void ObjectPool::List() { for (int i = 0; i < MAX_COUNT; i++) { if (occupied[i]) { if (pool[i]) { - INFO_LOG(KERNEL, "KO %i: %s \"%s\"", i + HANDLE_OFFSET, pool[i]->GetTypeName().c_str(), + LOG_DEBUG(Kernel, "KO %i: %s \"%s\"", i + HANDLE_OFFSET, pool[i]->GetTypeName().c_str(), pool[i]->GetName().c_str()); } } @@ -82,7 +82,7 @@ int ObjectPool::GetCount() const { } Object* ObjectPool::CreateByIDType(int type) { - ERROR_LOG(COMMON, "Unimplemented: %d.", type); + LOG_ERROR(Kernel, "Unimplemented: %d.", type); return nullptr; } diff --git a/src/core/hle/kernel/kernel.h b/src/core/hle/kernel/kernel.h index 00a2228bf..00f9b57fc 100644 --- a/src/core/hle/kernel/kernel.h +++ b/src/core/hle/kernel/kernel.h @@ -57,7 +57,7 @@ public: * @return True if the current thread should wait as a result of the sync */ virtual ResultVal SyncRequest() { - ERROR_LOG(KERNEL, "(UNIMPLEMENTED)"); + LOG_ERROR(Kernel, "(UNIMPLEMENTED)"); return UnimplementedFunction(ErrorModule::Kernel); } @@ -65,7 +65,10 @@ public: * Wait for kernel object to synchronize. * @return True if the current thread should wait as a result of the wait */ - virtual ResultVal WaitSynchronization() = 0; + virtual ResultVal WaitSynchronization() { + LOG_ERROR(Kernel, "(UNIMPLEMENTED)"); + return UnimplementedFunction(ErrorModule::Kernel); + } }; class ObjectPool : NonCopyable { @@ -92,13 +95,13 @@ public: T* Get(Handle handle) { if (handle < HANDLE_OFFSET || handle >= HANDLE_OFFSET + MAX_COUNT || !occupied[handle - HANDLE_OFFSET]) { if (handle != 0) { - WARN_LOG(KERNEL, "Kernel: Bad object handle %i (%08x)", handle, handle); + LOG_ERROR(Kernel, "Bad object handle %08x", handle, handle); } return nullptr; } else { Object* t = pool[handle - HANDLE_OFFSET]; if (t->GetHandleType() != T::GetStaticHandleType()) { - WARN_LOG(KERNEL, "Kernel: Wrong object type for %i (%08x)", handle, handle); + LOG_ERROR(Kernel, "Wrong object type for %08x", handle, handle); return nullptr; } return static_cast(t); @@ -109,7 +112,7 @@ public: template T *GetFast(Handle handle) { const Handle realHandle = handle - HANDLE_OFFSET; - _dbg_assert_(KERNEL, realHandle >= 0 && realHandle < MAX_COUNT && occupied[realHandle]); + _dbg_assert_(Kernel, realHandle >= 0 && realHandle < MAX_COUNT && occupied[realHandle]); return static_cast(pool[realHandle]); } @@ -130,8 +133,8 @@ public: bool GetIDType(Handle handle, HandleType* type) const { if ((handle < HANDLE_OFFSET) || (handle >= HANDLE_OFFSET + MAX_COUNT) || - !occupied[handle - HANDLE_OFFSET]) { - ERROR_LOG(KERNEL, "Kernel: Bad object handle %i (%08x)", handle, handle); + !occupied[handle - HANDLE_OFFSET]) { + LOG_ERROR(Kernel, "Bad object handle %08X", handle, handle); return false; } Object* t = pool[handle - HANDLE_OFFSET]; diff --git a/src/core/hle/kernel/shared_memory.cpp b/src/core/hle/kernel/shared_memory.cpp index cfcc0e0b7..3c8c502c6 100644 --- a/src/core/hle/kernel/shared_memory.cpp +++ b/src/core/hle/kernel/shared_memory.cpp @@ -16,12 +16,6 @@ public: static Kernel::HandleType GetStaticHandleType() { return Kernel::HandleType::SharedMemory; } Kernel::HandleType GetHandleType() const override { return Kernel::HandleType::SharedMemory; } - ResultVal WaitSynchronization() override { - // TODO(bunnei): ImplementMe - ERROR_LOG(OSHLE, "(UNIMPLEMENTED)"); - return UnimplementedFunction(ErrorModule::OS); - } - u32 base_address; ///< Address of shared memory block in RAM MemoryPermission permissions; ///< Permissions of shared memory block (SVC field) MemoryPermission other_permissions; ///< Other permissions of shared memory block (SVC field) @@ -61,7 +55,7 @@ ResultCode MapSharedMemory(u32 handle, u32 address, MemoryPermission permissions MemoryPermission other_permissions) { if (address < Memory::SHARED_MEMORY_VADDR || address >= Memory::SHARED_MEMORY_VADDR_END) { - ERROR_LOG(KERNEL, "cannot map handle=0x%08X, address=0x%08X outside of shared mem bounds!", + LOG_ERROR(Kernel_SVC, "cannot map handle=0x%08X, address=0x%08X outside of shared mem bounds!", handle, address); return ResultCode(ErrorDescription::InvalidAddress, ErrorModule::Kernel, ErrorSummary::InvalidArgument, ErrorLevel::Permanent); @@ -83,7 +77,7 @@ ResultVal GetSharedMemoryPointer(Handle handle, u32 offset) { if (0 != shared_memory->base_address) return MakeResult(Memory::GetPointer(shared_memory->base_address + offset)); - ERROR_LOG(KERNEL, "memory block handle=0x%08X not mapped!", handle); + LOG_ERROR(Kernel_SVC, "memory block handle=0x%08X not mapped!", handle); // TODO(yuriks): Verify error code. return ResultCode(ErrorDescription::InvalidAddress, ErrorModule::Kernel, ErrorSummary::InvalidState, ErrorLevel::Permanent); diff --git a/src/core/hle/kernel/thread.cpp b/src/core/hle/kernel/thread.cpp index 492b917e1..1c04701de 100644 --- a/src/core/hle/kernel/thread.cpp +++ b/src/core/hle/kernel/thread.cpp @@ -150,13 +150,13 @@ void ChangeReadyState(Thread* t, bool ready) { /// Verify that a thread has not been released from waiting static bool VerifyWait(const Thread* thread, WaitType type, Handle wait_handle) { - _dbg_assert_(KERNEL, thread != nullptr); + _dbg_assert_(Kernel, thread != nullptr); return (type == thread->wait_type) && (wait_handle == thread->wait_handle) && (thread->IsWaiting()); } /// Verify that a thread has not been released from waiting (with wait address) static bool VerifyWait(const Thread* thread, WaitType type, Handle wait_handle, VAddr wait_address) { - _dbg_assert_(KERNEL, thread != nullptr); + _dbg_assert_(Kernel, thread != nullptr); return VerifyWait(thread, type, wait_handle) && (wait_address == thread->wait_address); } @@ -196,7 +196,7 @@ void ChangeThreadState(Thread* t, ThreadStatus new_status) { if (new_status == THREADSTATUS_WAIT) { if (t->wait_type == WAITTYPE_NONE) { - ERROR_LOG(KERNEL, "Waittype none not allowed"); + LOG_ERROR(Kernel, "Waittype none not allowed"); } } } @@ -318,12 +318,12 @@ void DebugThreadQueue() { if (!thread) { return; } - INFO_LOG(KERNEL, "0x%02X 0x%08X (current)", thread->current_priority, GetCurrentThreadHandle()); + LOG_DEBUG(Kernel, "0x%02X 0x%08X (current)", thread->current_priority, GetCurrentThreadHandle()); for (u32 i = 0; i < thread_queue.size(); i++) { Handle handle = thread_queue[i]; s32 priority = thread_ready_queue.contains(handle); if (priority != -1) { - INFO_LOG(KERNEL, "0x%02X 0x%08X", priority, handle); + LOG_DEBUG(Kernel, "0x%02X 0x%08X", priority, handle); } } } @@ -333,7 +333,7 @@ Thread* CreateThread(Handle& handle, const char* name, u32 entry_point, s32 prio s32 processor_id, u32 stack_top, int stack_size) { _assert_msg_(KERNEL, (priority >= THREADPRIO_HIGHEST && priority <= THREADPRIO_LOWEST), - "CreateThread priority=%d, outside of allowable range!", priority) + "priority=%d, outside of allowable range!", priority) Thread* thread = new Thread; @@ -362,24 +362,24 @@ Handle CreateThread(const char* name, u32 entry_point, s32 priority, u32 arg, s3 u32 stack_top, int stack_size) { if (name == nullptr) { - ERROR_LOG(KERNEL, "CreateThread(): nullptr name"); + LOG_ERROR(Kernel_SVC, "nullptr name"); return -1; } if ((u32)stack_size < 0x200) { - ERROR_LOG(KERNEL, "CreateThread(name=%s): invalid stack_size=0x%08X", name, + LOG_ERROR(Kernel_SVC, "(name=%s): invalid stack_size=0x%08X", name, stack_size); return -1; } if (priority < THREADPRIO_HIGHEST || priority > THREADPRIO_LOWEST) { s32 new_priority = CLAMP(priority, THREADPRIO_HIGHEST, THREADPRIO_LOWEST); - WARN_LOG(KERNEL, "CreateThread(name=%s): invalid priority=0x%08X, clamping to %08X", + LOG_WARNING(Kernel_SVC, "(name=%s): invalid priority=%d, clamping to %d", name, priority, new_priority); // TODO(bunnei): Clamping to a valid priority is not necessarily correct behavior... Confirm // validity of this priority = new_priority; } if (!Memory::GetPointer(entry_point)) { - ERROR_LOG(KERNEL, "CreateThread(name=%s): invalid entry %08x", name, entry_point); + LOG_ERROR(Kernel_SVC, "(name=%s): invalid entry %08x", name, entry_point); return -1; } Handle handle; @@ -416,7 +416,7 @@ ResultCode SetThreadPriority(Handle handle, s32 priority) { // If priority is invalid, clamp to valid range if (priority < THREADPRIO_HIGHEST || priority > THREADPRIO_LOWEST) { s32 new_priority = CLAMP(priority, THREADPRIO_HIGHEST, THREADPRIO_LOWEST); - WARN_LOG(KERNEL, "invalid priority=0x%08X, clamping to %08X", priority, new_priority); + LOG_WARNING(Kernel_SVC, "invalid priority=%d, clamping to %d", priority, new_priority); // TODO(bunnei): Clamping to a valid priority is not necessarily correct behavior... Confirm // validity of this priority = new_priority; @@ -470,7 +470,7 @@ void Reschedule() { Thread* next = NextThread(); HLE::g_reschedule = false; if (next > 0) { - INFO_LOG(KERNEL, "context switch 0x%08X -> 0x%08X", prev->GetHandle(), next->GetHandle()); + LOG_TRACE(Kernel, "context switch 0x%08X -> 0x%08X", prev->GetHandle(), next->GetHandle()); SwitchContext(next); diff --git a/src/core/hle/service/ac_u.cpp b/src/core/hle/service/ac_u.cpp index 46aee40d6..4130feb9d 100644 --- a/src/core/hle/service/ac_u.cpp +++ b/src/core/hle/service/ac_u.cpp @@ -26,7 +26,7 @@ void GetWifiStatus(Service::Interface* self) { cmd_buff[1] = 0; // No error cmd_buff[2] = 0; // Connection type set to none - WARN_LOG(KERNEL, "(STUBBED) called"); + LOG_WARNING(Service_AC, "(STUBBED) called"); } const Interface::FunctionInfo FunctionTable[] = { diff --git a/src/core/hle/service/apt_u.cpp b/src/core/hle/service/apt_u.cpp index 181763724..b6d5d101f 100644 --- a/src/core/hle/service/apt_u.cpp +++ b/src/core/hle/service/apt_u.cpp @@ -53,7 +53,7 @@ void Initialize(Service::Interface* self) { cmd_buff[1] = 0; // No error - DEBUG_LOG(KERNEL, "called"); + LOG_DEBUG(Service_APT, "called"); } void GetLockHandle(Service::Interface* self) { @@ -74,14 +74,14 @@ void GetLockHandle(Service::Interface* self) { cmd_buff[4] = 0; cmd_buff[5] = lock_handle; - DEBUG_LOG(KERNEL, "called handle=0x%08X", cmd_buff[5]); + LOG_TRACE(Service_APT, "called handle=0x%08X", cmd_buff[5]); } void Enable(Service::Interface* self) { u32* cmd_buff = Service::GetCommandBuffer(); u32 unk = cmd_buff[1]; // TODO(bunnei): What is this field used for? cmd_buff[1] = 0; // No error - WARN_LOG(KERNEL, "(STUBBED) called unk=0x%08X", unk); + LOG_WARNING(Service_APT, "(STUBBED) called unk=0x%08X", unk); } void InquireNotification(Service::Interface* self) { @@ -89,7 +89,7 @@ void InquireNotification(Service::Interface* self) { u32 app_id = cmd_buff[2]; cmd_buff[1] = 0; // No error cmd_buff[2] = static_cast(SignalType::None); // Signal type - WARN_LOG(KERNEL, "(STUBBED) called app_id=0x%08X", app_id); + LOG_WARNING(Service_APT, "(STUBBED) called app_id=0x%08X", app_id); } /** @@ -122,7 +122,7 @@ void ReceiveParameter(Service::Interface* self) { cmd_buff[5] = 0; cmd_buff[6] = 0; cmd_buff[7] = 0; - WARN_LOG(KERNEL, "(STUBBED) called app_id=0x%08X, buffer_size=0x%08X", app_id, buffer_size); + LOG_WARNING(Service_APT, "(STUBBED) called app_id=0x%08X, buffer_size=0x%08X", app_id, buffer_size); } /** @@ -155,7 +155,7 @@ void GlanceParameter(Service::Interface* self) { cmd_buff[6] = 0; cmd_buff[7] = 0; - WARN_LOG(KERNEL, "(STUBBED) called app_id=0x%08X, buffer_size=0x%08X", app_id, buffer_size); + LOG_WARNING(Service_APT, "(STUBBED) called app_id=0x%08X, buffer_size=0x%08X", app_id, buffer_size); } /** @@ -181,7 +181,7 @@ void AppletUtility(Service::Interface* self) { cmd_buff[1] = 0; // No error - WARN_LOG(KERNEL, "(STUBBED) called unk=0x%08X, buffer1_size=0x%08x, buffer2_size=0x%08x, " + LOG_WARNING(Service_APT, "(STUBBED) called unk=0x%08X, buffer1_size=0x%08x, buffer2_size=0x%08x, " "buffer1_addr=0x%08x, buffer2_addr=0x%08x", unk, buffer1_size, buffer2_size, buffer1_addr, buffer2_addr); } @@ -194,7 +194,7 @@ void AppletUtility(Service::Interface* self) { * 4 : Handle to shared font memory */ void GetSharedFont(Service::Interface* self) { - DEBUG_LOG(KERNEL, "called"); + LOG_TRACE(Kernel_SVC, "called"); u32* cmd_buff = Service::GetCommandBuffer(); @@ -210,7 +210,7 @@ void GetSharedFont(Service::Interface* self) { cmd_buff[4] = shared_font_mem; } else { cmd_buff[1] = -1; // Generic error (not really possible to verify this on hardware) - ERROR_LOG(KERNEL, "called, but %s has not been loaded!", SHARED_FONT); + LOG_ERROR(Kernel_SVC, "called, but %s has not been loaded!", SHARED_FONT); } } @@ -321,7 +321,7 @@ Interface::Interface() { // Create shared font memory object shared_font_mem = Kernel::CreateSharedMemory("APT_U:shared_font_mem"); } else { - WARN_LOG(KERNEL, "Unable to load shared font: %s", filepath.c_str()); + LOG_WARNING(Service_APT, "Unable to load shared font: %s", filepath.c_str()); shared_font_mem = 0; } diff --git a/src/core/hle/service/cfg_u.cpp b/src/core/hle/service/cfg_u.cpp index 82bab5797..972cc0534 100644 --- a/src/core/hle/service/cfg_u.cpp +++ b/src/core/hle/service/cfg_u.cpp @@ -56,7 +56,7 @@ static void GetCountryCodeString(Service::Interface* self) { u32 country_code_id = cmd_buffer[1]; if (country_code_id >= country_codes.size() || 0 == country_codes[country_code_id]) { - ERROR_LOG(KERNEL, "requested country code id=%d is invalid", country_code_id); + LOG_ERROR(Service_CFG, "requested country code id=%d is invalid", country_code_id); cmd_buffer[1] = ResultCode(ErrorDescription::NotFound, ErrorModule::Config, ErrorSummary::WrongArgument, ErrorLevel::Permanent).raw; return; } @@ -79,7 +79,7 @@ static void GetCountryCodeID(Service::Interface* self) { u16 country_code_id = 0; // The following algorithm will fail if the first country code isn't 0. - _dbg_assert_(HLE, country_codes[0] == 0); + _dbg_assert_(Service_CFG, country_codes[0] == 0); for (size_t id = 0; id < country_codes.size(); ++id) { if (country_codes[id] == country_code) { @@ -89,7 +89,7 @@ static void GetCountryCodeID(Service::Interface* self) { } if (0 == country_code_id) { - ERROR_LOG(KERNEL, "requested country code name=%c%c is invalid", country_code & 0xff, country_code >> 8); + LOG_ERROR(Service_CFG, "requested country code name=%c%c is invalid", country_code & 0xff, country_code >> 8); cmd_buffer[1] = ResultCode(ErrorDescription::NotFound, ErrorModule::Config, ErrorSummary::WrongArgument, ErrorLevel::Permanent).raw; cmd_buffer[2] = 0xFFFF; return; diff --git a/src/core/hle/service/dsp_dsp.cpp b/src/core/hle/service/dsp_dsp.cpp index e89c8aae3..ce1c9938d 100644 --- a/src/core/hle/service/dsp_dsp.cpp +++ b/src/core/hle/service/dsp_dsp.cpp @@ -32,7 +32,7 @@ void ConvertProcessAddressFromDspDram(Service::Interface* self) { cmd_buff[1] = 0; // No error cmd_buff[2] = (addr << 1) + (Memory::DSP_MEMORY_VADDR + 0x40000); - DEBUG_LOG(KERNEL, "(STUBBED) called with address %u", addr); + LOG_WARNING(Service_DSP, "(STUBBED) called with address %u", addr); } /** @@ -55,7 +55,7 @@ void LoadComponent(Service::Interface* self) { // TODO(bunnei): Implement real DSP firmware loading - DEBUG_LOG(KERNEL, "(STUBBED) called"); + LOG_WARNING(Service_DSP, "(STUBBED) called"); } /** @@ -70,7 +70,7 @@ void GetSemaphoreEventHandle(Service::Interface* self) { cmd_buff[1] = 0; // No error cmd_buff[3] = semaphore_event; // Event handle - DEBUG_LOG(KERNEL, "(STUBBED) called"); + LOG_WARNING(Service_DSP, "(STUBBED) called"); } /** @@ -89,7 +89,7 @@ void RegisterInterruptEvents(Service::Interface* self) { cmd_buff[1] = 0; // No error - DEBUG_LOG(KERNEL, "(STUBBED) called"); + LOG_WARNING(Service_DSP, "(STUBBED) called"); } /** @@ -106,7 +106,7 @@ void WriteReg0x10(Service::Interface* self) { cmd_buff[1] = 0; // No error - DEBUG_LOG(KERNEL, "(STUBBED) called"); + LOG_WARNING(Service_DSP, "(STUBBED) called"); } /** @@ -140,7 +140,7 @@ void ReadPipeIfPossible(Service::Interface* self) { Memory::Write16(addr + offset, canned_read_pipe[read_pipe_count]); read_pipe_count++; } else { - ERROR_LOG(KERNEL, "canned read pipe log exceeded!"); + LOG_ERROR(Service_DSP, "canned read pipe log exceeded!"); break; } } @@ -148,7 +148,7 @@ void ReadPipeIfPossible(Service::Interface* self) { cmd_buff[1] = 0; // No error cmd_buff[2] = (read_pipe_count - initial_size) * sizeof(u16); - DEBUG_LOG(KERNEL, "(STUBBED) called size=0x%08X, buffer=0x%08X", size, addr); + LOG_WARNING(Service_DSP, "(STUBBED) called size=0x%08X, buffer=0x%08X", size, addr); } const Interface::FunctionInfo FunctionTable[] = { diff --git a/src/core/hle/service/fs_user.cpp b/src/core/hle/service/fs_user.cpp index 51e8b579e..9bda4fe8a 100644 --- a/src/core/hle/service/fs_user.cpp +++ b/src/core/hle/service/fs_user.cpp @@ -23,7 +23,7 @@ static void Initialize(Service::Interface* self) { // http://3dbrew.org/wiki/FS:Initialize#Request cmd_buff[1] = RESULT_SUCCESS.raw; - DEBUG_LOG(KERNEL, "called"); + LOG_DEBUG(Service_FS, "called"); } /** @@ -55,17 +55,15 @@ static void OpenFile(Service::Interface* self) { u32 filename_ptr = cmd_buff[9]; FileSys::Path file_path(filename_type, filename_size, filename_ptr); - DEBUG_LOG(KERNEL, "path=%s, mode=%d attrs=%u", file_path.DebugStr().c_str(), mode.hex, attributes); + LOG_DEBUG(Service_FS, "path=%s, mode=%d attrs=%u", file_path.DebugStr().c_str(), mode.hex, attributes); ResultVal handle = Kernel::OpenFileFromArchive(archive_handle, file_path, mode); cmd_buff[1] = handle.Code().raw; if (handle.Succeeded()) { cmd_buff[3] = *handle; } else { - ERROR_LOG(KERNEL, "failed to get a handle for file %s", file_path.DebugStr().c_str()); + LOG_ERROR(Service_FS, "failed to get a handle for file %s", file_path.DebugStr().c_str()); } - - DEBUG_LOG(KERNEL, "called"); } /** @@ -102,11 +100,11 @@ static void OpenFileDirectly(Service::Interface* self) { FileSys::Path archive_path(archivename_type, archivename_size, archivename_ptr); FileSys::Path file_path(filename_type, filename_size, filename_ptr); - DEBUG_LOG(KERNEL, "archive_path=%s file_path=%s, mode=%u attributes=%d", + LOG_DEBUG(Service_FS, "archive_path=%s file_path=%s, mode=%u attributes=%d", archive_path.DebugStr().c_str(), file_path.DebugStr().c_str(), mode.hex, attributes); if (archive_path.GetType() != FileSys::Empty) { - ERROR_LOG(KERNEL, "archive LowPath type other than empty is currently unsupported"); + LOG_ERROR(Service_FS, "archive LowPath type other than empty is currently unsupported"); cmd_buff[1] = UnimplementedFunction(ErrorModule::FS).raw; return; } @@ -116,7 +114,7 @@ static void OpenFileDirectly(Service::Interface* self) { ResultVal archive_handle = Kernel::OpenArchive(archive_id); cmd_buff[1] = archive_handle.Code().raw; if (archive_handle.Failed()) { - ERROR_LOG(KERNEL, "failed to get a handle for archive"); + LOG_ERROR(Service_FS, "failed to get a handle for archive"); return; } // cmd_buff[2] isn't used according to 3dmoo's implementation. @@ -127,10 +125,8 @@ static void OpenFileDirectly(Service::Interface* self) { if (handle.Succeeded()) { cmd_buff[3] = *handle; } else { - ERROR_LOG(KERNEL, "failed to get a handle for file %s", file_path.DebugStr().c_str()); + LOG_ERROR(Service_FS, "failed to get a handle for file %s", file_path.DebugStr().c_str()); } - - DEBUG_LOG(KERNEL, "called"); } /* @@ -156,12 +152,10 @@ void DeleteFile(Service::Interface* self) { FileSys::Path file_path(filename_type, filename_size, filename_ptr); - DEBUG_LOG(KERNEL, "type=%d size=%d data=%s", + LOG_DEBUG(Service_FS, "type=%d size=%d data=%s", filename_type, filename_size, file_path.DebugStr().c_str()); cmd_buff[1] = Kernel::DeleteFileFromArchive(archive_handle, file_path).raw; - - DEBUG_LOG(KERNEL, "called"); } /* @@ -197,13 +191,11 @@ void RenameFile(Service::Interface* self) { FileSys::Path src_file_path(src_filename_type, src_filename_size, src_filename_ptr); FileSys::Path dest_file_path(dest_filename_type, dest_filename_size, dest_filename_ptr); - DEBUG_LOG(KERNEL, "src_type=%d src_size=%d src_data=%s dest_type=%d dest_size=%d dest_data=%s", + LOG_DEBUG(Service_FS, "src_type=%d src_size=%d src_data=%s dest_type=%d dest_size=%d dest_data=%s", src_filename_type, src_filename_size, src_file_path.DebugStr().c_str(), dest_filename_type, dest_filename_size, dest_file_path.DebugStr().c_str()); cmd_buff[1] = Kernel::RenameFileBetweenArchives(src_archive_handle, src_file_path, dest_archive_handle, dest_file_path).raw; - - DEBUG_LOG(KERNEL, "called"); } /* @@ -229,12 +221,10 @@ void DeleteDirectory(Service::Interface* self) { FileSys::Path dir_path(dirname_type, dirname_size, dirname_ptr); - DEBUG_LOG(KERNEL, "type=%d size=%d data=%s", + LOG_DEBUG(Service_FS, "type=%d size=%d data=%s", dirname_type, dirname_size, dir_path.DebugStr().c_str()); cmd_buff[1] = Kernel::DeleteDirectoryFromArchive(archive_handle, dir_path).raw; - - DEBUG_LOG(KERNEL, "called"); } /* @@ -260,11 +250,9 @@ static void CreateDirectory(Service::Interface* self) { FileSys::Path dir_path(dirname_type, dirname_size, dirname_ptr); - DEBUG_LOG(KERNEL, "type=%d size=%d data=%s", dirname_type, dirname_size, dir_path.DebugStr().c_str()); + LOG_DEBUG(Service_FS, "type=%d size=%d data=%s", dirname_type, dirname_size, dir_path.DebugStr().c_str()); cmd_buff[1] = Kernel::CreateDirectoryFromArchive(archive_handle, dir_path).raw; - - DEBUG_LOG(KERNEL, "called"); } /* @@ -300,13 +288,11 @@ void RenameDirectory(Service::Interface* self) { FileSys::Path src_dir_path(src_dirname_type, src_dirname_size, src_dirname_ptr); FileSys::Path dest_dir_path(dest_dirname_type, dest_dirname_size, dest_dirname_ptr); - DEBUG_LOG(KERNEL, "src_type=%d src_size=%d src_data=%s dest_type=%d dest_size=%d dest_data=%s", + LOG_DEBUG(Service_FS, "src_type=%d src_size=%d src_data=%s dest_type=%d dest_size=%d dest_data=%s", src_dirname_type, src_dirname_size, src_dir_path.DebugStr().c_str(), dest_dirname_type, dest_dirname_size, dest_dir_path.DebugStr().c_str()); cmd_buff[1] = Kernel::RenameDirectoryBetweenArchives(src_archive_handle, src_dir_path, dest_archive_handle, dest_dir_path).raw; - - DEBUG_LOG(KERNEL, "called"); } static void OpenDirectory(Service::Interface* self) { @@ -321,17 +307,15 @@ static void OpenDirectory(Service::Interface* self) { FileSys::Path dir_path(dirname_type, dirname_size, dirname_ptr); - DEBUG_LOG(KERNEL, "type=%d size=%d data=%s", dirname_type, dirname_size, dir_path.DebugStr().c_str()); + LOG_DEBUG(Service_FS, "type=%d size=%d data=%s", dirname_type, dirname_size, dir_path.DebugStr().c_str()); ResultVal handle = Kernel::OpenDirectoryFromArchive(archive_handle, dir_path); cmd_buff[1] = handle.Code().raw; if (handle.Succeeded()) { cmd_buff[3] = *handle; } else { - ERROR_LOG(KERNEL, "failed to get a handle for directory"); + LOG_ERROR(Service_FS, "failed to get a handle for directory"); } - - DEBUG_LOG(KERNEL, "called"); } /** @@ -356,10 +340,10 @@ static void OpenArchive(Service::Interface* self) { u32 archivename_ptr = cmd_buff[5]; FileSys::Path archive_path(archivename_type, archivename_size, archivename_ptr); - DEBUG_LOG(KERNEL, "archive_path=%s", archive_path.DebugStr().c_str()); + LOG_DEBUG(Service_FS, "archive_path=%s", archive_path.DebugStr().c_str()); if (archive_path.GetType() != FileSys::Empty) { - ERROR_LOG(KERNEL, "archive LowPath type other than empty is currently unsupported"); + LOG_ERROR(Service_FS, "archive LowPath type other than empty is currently unsupported"); cmd_buff[1] = UnimplementedFunction(ErrorModule::FS).raw; return; } @@ -370,10 +354,8 @@ static void OpenArchive(Service::Interface* self) { // cmd_buff[2] isn't used according to 3dmoo's implementation. cmd_buff[3] = *handle; } else { - ERROR_LOG(KERNEL, "failed to get a handle for archive"); + LOG_ERROR(Service_FS, "failed to get a handle for archive"); } - - DEBUG_LOG(KERNEL, "called"); } /* @@ -388,7 +370,7 @@ static void IsSdmcDetected(Service::Interface* self) { cmd_buff[1] = 0; cmd_buff[2] = Settings::values.use_virtual_sd ? 1 : 0; - DEBUG_LOG(KERNEL, "called"); + LOG_DEBUG(Service_FS, "called"); } const Interface::FunctionInfo FunctionTable[] = { diff --git a/src/core/hle/service/gsp_gpu.cpp b/src/core/hle/service/gsp_gpu.cpp index 34eabac45..223800560 100644 --- a/src/core/hle/service/gsp_gpu.cpp +++ b/src/core/hle/service/gsp_gpu.cpp @@ -33,7 +33,7 @@ static inline u8* GetCommandBuffer(u32 thread_id) { } static inline FrameBufferUpdate* GetFrameBufferInfo(u32 thread_id, u32 screen_index) { - _dbg_assert_msg_(GSP, screen_index < 2, "Invalid screen index"); + _dbg_assert_msg_(Service_GSP, screen_index < 2, "Invalid screen index"); // For each thread there are two FrameBufferUpdate fields u32 offset = 0x200 + (2 * thread_id + screen_index) * sizeof(FrameBufferUpdate); @@ -50,14 +50,14 @@ static inline InterruptRelayQueue* GetInterruptRelayQueue(u32 thread_id) { static void WriteHWRegs(u32 base_address, u32 size_in_bytes, const u32* data) { // TODO: Return proper error codes if (base_address + size_in_bytes >= 0x420000) { - ERROR_LOG(GPU, "Write address out of range! (address=0x%08x, size=0x%08x)", + LOG_ERROR(Service_GSP, "Write address out of range! (address=0x%08x, size=0x%08x)", base_address, size_in_bytes); return; } // size should be word-aligned if ((size_in_bytes % 4) != 0) { - ERROR_LOG(GPU, "Invalid size 0x%08x", size_in_bytes); + LOG_ERROR(Service_GSP, "Invalid size 0x%08x", size_in_bytes); return; } @@ -89,13 +89,13 @@ static void ReadHWRegs(Service::Interface* self) { // TODO: Return proper error codes if (reg_addr + size >= 0x420000) { - ERROR_LOG(GPU, "Read address out of range! (address=0x%08x, size=0x%08x)", reg_addr, size); + LOG_ERROR(Service_GSP, "Read address out of range! (address=0x%08x, size=0x%08x)", reg_addr, size); return; } // size should be word-aligned if ((size % 4) != 0) { - ERROR_LOG(GPU, "Invalid size 0x%08x", size); + LOG_ERROR(Service_GSP, "Invalid size 0x%08x", size); return; } @@ -177,11 +177,11 @@ static void RegisterInterruptRelayQueue(Service::Interface* self) { */ void SignalInterrupt(InterruptId interrupt_id) { if (0 == g_interrupt_event) { - WARN_LOG(GSP, "cannot synchronize until GSP event has been created!"); + LOG_WARNING(Service_GSP, "cannot synchronize until GSP event has been created!"); return; } if (0 == g_shared_memory) { - WARN_LOG(GSP, "cannot synchronize until GSP shared memory has been created!"); + LOG_WARNING(Service_GSP, "cannot synchronize until GSP shared memory has been created!"); return; } for (int thread_id = 0; thread_id < 0x4; ++thread_id) { @@ -298,14 +298,14 @@ static void ExecuteCommand(const Command& command, u32 thread_id) { } default: - ERROR_LOG(GSP, "unknown command 0x%08X", (int)command.id.Value()); + LOG_ERROR(Service_GSP, "unknown command 0x%08X", (int)command.id.Value()); } } /// This triggers handling of the GX command written to the command buffer in shared memory. static void TriggerCmdReqQueue(Service::Interface* self) { - DEBUG_LOG(GSP, "called"); + LOG_TRACE(Service_GSP, "called"); // Iterate through each thread's command queue... for (unsigned thread_id = 0; thread_id < 0x4; ++thread_id) { diff --git a/src/core/hle/service/hid_user.cpp b/src/core/hle/service/hid_user.cpp index 2abaf0f2f..5772199d4 100644 --- a/src/core/hle/service/hid_user.cpp +++ b/src/core/hle/service/hid_user.cpp @@ -163,7 +163,7 @@ static void GetIPCHandles(Service::Interface* self) { cmd_buff[7] = event_gyroscope; cmd_buff[8] = event_debug_pad; - DEBUG_LOG(KERNEL, "called"); + LOG_TRACE(Service_HID, "called"); } const Interface::FunctionInfo FunctionTable[] = { diff --git a/src/core/hle/service/ptm_u.cpp b/src/core/hle/service/ptm_u.cpp index 941df467b..559f148dd 100644 --- a/src/core/hle/service/ptm_u.cpp +++ b/src/core/hle/service/ptm_u.cpp @@ -42,7 +42,7 @@ static void GetAdapterState(Service::Interface* self) { cmd_buff[1] = 0; // No error cmd_buff[2] = battery_is_charging ? 1 : 0; - WARN_LOG(KERNEL, "(STUBBED) called"); + LOG_WARNING(Service_PTM, "(STUBBED) called"); } /* @@ -57,7 +57,7 @@ static void GetShellState(Service::Interface* self) { cmd_buff[1] = 0; cmd_buff[2] = shell_open ? 1 : 0; - DEBUG_LOG(KERNEL, "PTM_U::GetShellState called"); + LOG_TRACE(Service_PTM, "PTM_U::GetShellState called"); } /** @@ -76,7 +76,7 @@ static void GetBatteryLevel(Service::Interface* self) { cmd_buff[1] = 0; // No error cmd_buff[2] = static_cast(ChargeLevels::CompletelyFull); // Set to a completely full battery - WARN_LOG(KERNEL, "(STUBBED) called"); + LOG_WARNING(Service_PTM, "(STUBBED) called"); } /** @@ -94,7 +94,7 @@ static void GetBatteryChargeState(Service::Interface* self) { cmd_buff[1] = 0; // No error cmd_buff[2] = battery_is_charging ? 1 : 0; - WARN_LOG(KERNEL, "(STUBBED) called"); + LOG_WARNING(Service_PTM, "(STUBBED) called"); } const Interface::FunctionInfo FunctionTable[] = { diff --git a/src/core/hle/service/service.cpp b/src/core/hle/service/service.cpp index fed2268a0..e6973572b 100644 --- a/src/core/hle/service/service.cpp +++ b/src/core/hle/service/service.cpp @@ -106,13 +106,13 @@ void Init() { g_manager->AddService(new SOC_U::Interface); g_manager->AddService(new SSL_C::Interface); - NOTICE_LOG(HLE, "initialized OK"); + LOG_DEBUG(Service, "initialized OK"); } /// Shutdown ServiceManager void Shutdown() { delete g_manager; - NOTICE_LOG(HLE, "shutdown OK"); + LOG_DEBUG(Service, "shutdown OK"); } diff --git a/src/core/hle/service/service.h b/src/core/hle/service/service.h index 3a7d6c469..baae910a1 100644 --- a/src/core/hle/service/service.h +++ b/src/core/hle/service/service.h @@ -91,7 +91,7 @@ public: std::string name = (itr == m_functions.end()) ? Common::StringFromFormat("0x%08X", cmd_buff[0]) : itr->second.name; - ERROR_LOG(OSHLE, error.c_str(), name.c_str(), GetPortName().c_str()); + LOG_ERROR(Service, error.c_str(), name.c_str(), GetPortName().c_str()); // TODO(bunnei): Hack - ignore error cmd_buff[1] = 0; @@ -103,12 +103,6 @@ public: return MakeResult(false); // TODO: Implement return from actual function } - ResultVal WaitSynchronization() override { - // TODO(bunnei): ImplementMe - ERROR_LOG(OSHLE, "unimplemented function"); - return UnimplementedFunction(ErrorModule::OS); - } - protected: /** diff --git a/src/core/hle/service/srv.cpp b/src/core/hle/service/srv.cpp index 0e7fa9e3b..24a846533 100644 --- a/src/core/hle/service/srv.cpp +++ b/src/core/hle/service/srv.cpp @@ -14,7 +14,7 @@ namespace SRV { static Handle g_event_handle = 0; static void Initialize(Service::Interface* self) { - DEBUG_LOG(OSHLE, "called"); + LOG_DEBUG(Service_SRV, "called"); u32* cmd_buff = Service::GetCommandBuffer(); @@ -22,7 +22,7 @@ static void Initialize(Service::Interface* self) { } static void GetProcSemaphore(Service::Interface* self) { - DEBUG_LOG(OSHLE, "called"); + LOG_TRACE(Service_SRV, "called"); u32* cmd_buff = Service::GetCommandBuffer(); @@ -43,9 +43,9 @@ static void GetServiceHandle(Service::Interface* self) { if (nullptr != service) { cmd_buff[3] = service->GetHandle(); - DEBUG_LOG(OSHLE, "called port=%s, handle=0x%08X", port_name.c_str(), cmd_buff[3]); + LOG_TRACE(Service_SRV, "called port=%s, handle=0x%08X", port_name.c_str(), cmd_buff[3]); } else { - ERROR_LOG(OSHLE, "(UNIMPLEMENTED) called port=%s", port_name.c_str()); + LOG_ERROR(Service_SRV, "(UNIMPLEMENTED) called port=%s", port_name.c_str()); res = UnimplementedFunction(ErrorModule::SRV); } cmd_buff[1] = res.raw; diff --git a/src/core/hle/svc.cpp b/src/core/hle/svc.cpp index b99c301d4..db0c42e74 100644 --- a/src/core/hle/svc.cpp +++ b/src/core/hle/svc.cpp @@ -31,7 +31,7 @@ enum ControlMemoryOperation { /// Map application or GSP heap memory static Result ControlMemory(u32* out_addr, u32 operation, u32 addr0, u32 addr1, u32 size, u32 permissions) { - DEBUG_LOG(SVC,"called operation=0x%08X, addr0=0x%08X, addr1=0x%08X, size=%08X, permissions=0x%08X", + LOG_TRACE(Kernel_SVC,"called operation=0x%08X, addr0=0x%08X, addr1=0x%08X, size=%08X, permissions=0x%08X", operation, addr0, addr1, size, permissions); switch (operation) { @@ -48,14 +48,14 @@ static Result ControlMemory(u32* out_addr, u32 operation, u32 addr0, u32 addr1, // Unknown ControlMemory operation default: - ERROR_LOG(SVC, "unknown operation=0x%08X", operation); + LOG_ERROR(Kernel_SVC, "unknown operation=0x%08X", operation); } return 0; } /// Maps a memory block to specified address static Result MapMemoryBlock(Handle handle, u32 addr, u32 permissions, u32 other_permissions) { - DEBUG_LOG(SVC, "called memblock=0x%08X, addr=0x%08X, mypermissions=0x%08X, otherpermission=%d", + LOG_TRACE(Kernel_SVC, "called memblock=0x%08X, addr=0x%08X, mypermissions=0x%08X, otherpermission=%d", handle, addr, permissions, other_permissions); Kernel::MemoryPermission permissions_type = static_cast(permissions); @@ -68,7 +68,7 @@ static Result MapMemoryBlock(Handle handle, u32 addr, u32 permissions, u32 other static_cast(other_permissions)); break; default: - ERROR_LOG(OSHLE, "unknown permissions=0x%08X", permissions); + LOG_ERROR(Kernel_SVC, "unknown permissions=0x%08X", permissions); } return 0; } @@ -77,7 +77,7 @@ static Result MapMemoryBlock(Handle handle, u32 addr, u32 permissions, u32 other static Result ConnectToPort(Handle* out, const char* port_name) { Service::Interface* service = Service::g_manager->FetchFromPortName(port_name); - DEBUG_LOG(SVC, "called port_name=%s", port_name); + LOG_TRACE(Kernel_SVC, "called port_name=%s", port_name); _assert_msg_(KERNEL, (service != nullptr), "called, but service is not implemented!"); *out = service->GetHandle(); @@ -95,7 +95,7 @@ static Result SendSyncRequest(Handle handle) { Kernel::Object* object = Kernel::g_object_pool.GetFast(handle); _assert_msg_(KERNEL, (object != nullptr), "called, but kernel object is nullptr!"); - DEBUG_LOG(SVC, "called handle=0x%08X(%s)", handle, object->GetTypeName().c_str()); + LOG_TRACE(Kernel_SVC, "called handle=0x%08X(%s)", handle, object->GetTypeName().c_str()); ResultVal wait = object->SyncRequest(); if (wait.Succeeded() && *wait) { @@ -108,7 +108,7 @@ static Result SendSyncRequest(Handle handle) { /// Close a handle static Result CloseHandle(Handle handle) { // ImplementMe - ERROR_LOG(SVC, "(UNIMPLEMENTED) called handle=0x%08X", handle); + LOG_ERROR(Kernel_SVC, "(UNIMPLEMENTED) called handle=0x%08X", handle); return 0; } @@ -121,9 +121,9 @@ static Result WaitSynchronization1(Handle handle, s64 nano_seconds) { return InvalidHandle(ErrorModule::Kernel).raw; } Kernel::Object* object = Kernel::g_object_pool.GetFast(handle); - _dbg_assert_(KERNEL, object != nullptr); + _dbg_assert_(Kernel, object != nullptr); - DEBUG_LOG(SVC, "called handle=0x%08X(%s:%s), nanoseconds=%lld", handle, object->GetTypeName().c_str(), + LOG_TRACE(Kernel_SVC, "called handle=0x%08X(%s:%s), nanoseconds=%lld", handle, object->GetTypeName().c_str(), object->GetName().c_str(), nano_seconds); ResultVal wait = object->WaitSynchronization(); @@ -143,7 +143,7 @@ static Result WaitSynchronizationN(s32* out, Handle* handles, s32 handle_count, bool unlock_all = true; bool wait_infinite = (nano_seconds == -1); // Used to wait until a thread has terminated - DEBUG_LOG(SVC, "called handle_count=%d, wait_all=%s, nanoseconds=%lld", + LOG_TRACE(Kernel_SVC, "called handle_count=%d, wait_all=%s, nanoseconds=%lld", handle_count, (wait_all ? "true" : "false"), nano_seconds); // Iterate through each handle, synchronize kernel object @@ -153,7 +153,7 @@ static Result WaitSynchronizationN(s32* out, Handle* handles, s32 handle_count, } Kernel::Object* object = Kernel::g_object_pool.GetFast(handles[i]); - DEBUG_LOG(SVC, "\thandle[%d] = 0x%08X(%s:%s)", i, handles[i], object->GetTypeName().c_str(), + LOG_TRACE(Kernel_SVC, "\thandle[%d] = 0x%08X(%s:%s)", i, handles[i], object->GetTypeName().c_str(), object->GetName().c_str()); // TODO(yuriks): Verify how the real function behaves when an error happens here @@ -181,7 +181,7 @@ static Result WaitSynchronizationN(s32* out, Handle* handles, s32 handle_count, /// Create an address arbiter (to allocate access to shared resources) static Result CreateAddressArbiter(u32* arbiter) { - DEBUG_LOG(SVC, "called"); + LOG_TRACE(Kernel_SVC, "called"); Handle handle = Kernel::CreateAddressArbiter(); *arbiter = handle; return 0; @@ -189,7 +189,7 @@ static Result CreateAddressArbiter(u32* arbiter) { /// Arbitrate address static Result ArbitrateAddress(Handle arbiter, u32 address, u32 type, u32 value, s64 nanoseconds) { - DEBUG_LOG(SVC, "called handle=0x%08X, address=0x%08X, type=0x%08X, value=0x%08X", arbiter, + LOG_TRACE(Kernel_SVC, "called handle=0x%08X, address=0x%08X, type=0x%08X, value=0x%08X", arbiter, address, type, value); return Kernel::ArbitrateAddress(arbiter, static_cast(type), address, value).raw; @@ -197,7 +197,7 @@ static Result ArbitrateAddress(Handle arbiter, u32 address, u32 type, u32 value, /// Used to output a message on a debug hardware unit - does nothing on a retail unit static void OutputDebugString(const char* string) { - OS_LOG(SVC, "%s", string); + LOG_DEBUG(Debug_Emulated, "%s", string); } /// Get resource limit @@ -206,14 +206,14 @@ static Result GetResourceLimit(Handle* resource_limit, Handle process) { // 0xFFFF8001 is a handle alias for the current KProcess, and 0xFFFF8000 is a handle alias for // the current KThread. *resource_limit = 0xDEADBEEF; - ERROR_LOG(SVC, "(UNIMPLEMENTED) called process=0x%08X", process); + LOG_ERROR(Kernel_SVC, "(UNIMPLEMENTED) called process=0x%08X", process); return 0; } /// Get resource limit current values static Result GetResourceLimitCurrentValues(s64* values, Handle resource_limit, void* names, s32 name_count) { - ERROR_LOG(SVC, "(UNIMPLEMENTED) called resource_limit=%08X, names=%s, name_count=%d", + LOG_ERROR(Kernel_SVC, "(UNIMPLEMENTED) called resource_limit=%08X, names=%s, name_count=%d", resource_limit, names, name_count); Memory::Write32(Core::g_app_core->GetReg(0), 0); // Normmatt: Set used memory to 0 for now return 0; @@ -234,7 +234,7 @@ static Result CreateThread(u32 priority, u32 entry_point, u32 arg, u32 stack_top Core::g_app_core->SetReg(1, thread); - DEBUG_LOG(SVC, "called entrypoint=0x%08X (%s), arg=0x%08X, stacktop=0x%08X, " + LOG_TRACE(Kernel_SVC, "called entrypoint=0x%08X (%s), arg=0x%08X, stacktop=0x%08X, " "threadpriority=0x%08X, processorid=0x%08X : created handle=0x%08X", entry_point, name.c_str(), arg, stack_top, priority, processor_id, thread); @@ -245,7 +245,7 @@ static Result CreateThread(u32 priority, u32 entry_point, u32 arg, u32 stack_top static u32 ExitThread() { Handle thread = Kernel::GetCurrentThreadHandle(); - DEBUG_LOG(SVC, "called, pc=0x%08X", Core::g_app_core->GetPC()); // PC = 0x0010545C + LOG_TRACE(Kernel_SVC, "called, pc=0x%08X", Core::g_app_core->GetPC()); // PC = 0x0010545C Kernel::StopThread(thread, __func__); HLE::Reschedule(__func__); @@ -269,42 +269,42 @@ static Result SetThreadPriority(Handle handle, s32 priority) { /// Create a mutex static Result CreateMutex(Handle* mutex, u32 initial_locked) { *mutex = Kernel::CreateMutex((initial_locked != 0)); - DEBUG_LOG(SVC, "called initial_locked=%s : created handle=0x%08X", + LOG_TRACE(Kernel_SVC, "called initial_locked=%s : created handle=0x%08X", initial_locked ? "true" : "false", *mutex); return 0; } /// Release a mutex static Result ReleaseMutex(Handle handle) { - DEBUG_LOG(SVC, "called handle=0x%08X", handle); + LOG_TRACE(Kernel_SVC, "called handle=0x%08X", handle); ResultCode res = Kernel::ReleaseMutex(handle); return res.raw; } /// Get the ID for the specified thread. static Result GetThreadId(u32* thread_id, Handle handle) { - DEBUG_LOG(SVC, "called thread=0x%08X", handle); + LOG_TRACE(Kernel_SVC, "called thread=0x%08X", handle); ResultCode result = Kernel::GetThreadId(thread_id, handle); return result.raw; } /// Query memory static Result QueryMemory(void* info, void* out, u32 addr) { - ERROR_LOG(SVC, "(UNIMPLEMENTED) called addr=0x%08X", addr); + LOG_ERROR(Kernel_SVC, "(UNIMPLEMENTED) called addr=0x%08X", addr); return 0; } /// Create an event static Result CreateEvent(Handle* evt, u32 reset_type) { *evt = Kernel::CreateEvent((ResetType)reset_type); - DEBUG_LOG(SVC, "called reset_type=0x%08X : created handle=0x%08X", + LOG_TRACE(Kernel_SVC, "called reset_type=0x%08X : created handle=0x%08X", reset_type, *evt); return 0; } /// Duplicates a kernel handle static Result DuplicateHandle(Handle* out, Handle handle) { - DEBUG_LOG(SVC, "called handle=0x%08X", handle); + LOG_WARNING(Kernel_SVC, "(STUBBED) called handle=0x%08X", handle); // Translate kernel handles -> real handles if (handle == Kernel::CurrentThread) { @@ -321,19 +321,19 @@ static Result DuplicateHandle(Handle* out, Handle handle) { /// Signals an event static Result SignalEvent(Handle evt) { - DEBUG_LOG(SVC, "called event=0x%08X", evt); + LOG_TRACE(Kernel_SVC, "called event=0x%08X", evt); return Kernel::SignalEvent(evt).raw; } /// Clears an event static Result ClearEvent(Handle evt) { - DEBUG_LOG(SVC, "called event=0x%08X", evt); + LOG_TRACE(Kernel_SVC, "called event=0x%08X", evt); return Kernel::ClearEvent(evt).raw; } /// Sleep the current thread static void SleepThread(s64 nanoseconds) { - DEBUG_LOG(SVC, "called nanoseconds=%lld", nanoseconds); + LOG_TRACE(Kernel_SVC, "called nanoseconds=%lld", nanoseconds); // Check for next thread to schedule HLE::Reschedule(__func__); diff --git a/src/core/hw/gpu.cpp b/src/core/hw/gpu.cpp index 77557e582..da78b85e5 100644 --- a/src/core/hw/gpu.cpp +++ b/src/core/hw/gpu.cpp @@ -35,7 +35,7 @@ inline void Read(T &var, const u32 raw_addr) { // Reads other than u32 are untested, so I'd rather have them abort than silently fail if (index >= Regs::NumIds() || !std::is_same::value) { - ERROR_LOG(GPU, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, addr); + LOG_ERROR(HW_GPU, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, addr); return; } @@ -49,7 +49,7 @@ inline void Write(u32 addr, const T data) { // Writes other than u32 are untested, so I'd rather have them abort than silently fail if (index >= Regs::NumIds() || !std::is_same::value) { - ERROR_LOG(GPU, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32)data, addr); + LOG_ERROR(HW_GPU, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32)data, addr); return; } @@ -73,7 +73,7 @@ inline void Write(u32 addr, const T data) { for (u32* ptr = start; ptr < end; ++ptr) *ptr = bswap32(config.value); // TODO: This is just a workaround to missing framebuffer format emulation - DEBUG_LOG(GPU, "MemoryFill from 0x%08x to 0x%08x", config.GetStartAddress(), config.GetEndAddress()); + LOG_TRACE(HW_GPU, "MemoryFill from 0x%08x to 0x%08x", config.GetStartAddress(), config.GetEndAddress()); } break; } @@ -105,7 +105,7 @@ inline void Write(u32 addr, const T data) { } default: - ERROR_LOG(GPU, "Unknown source framebuffer format %x", config.input_format.Value()); + LOG_ERROR(HW_GPU, "Unknown source framebuffer format %x", config.input_format.Value()); break; } @@ -132,13 +132,13 @@ inline void Write(u32 addr, const T data) { } default: - ERROR_LOG(GPU, "Unknown destination framebuffer format %x", config.output_format.Value()); + LOG_ERROR(HW_GPU, "Unknown destination framebuffer format %x", config.output_format.Value()); break; } } } - DEBUG_LOG(GPU, "DisplayTriggerTransfer: 0x%08x bytes from 0x%08x(%ux%u)-> 0x%08x(%ux%u), dst format %x", + LOG_TRACE(HW_GPU, "DisplayTriggerTransfer: 0x%08x bytes from 0x%08x(%ux%u)-> 0x%08x(%ux%u), dst format %x", config.output_height * config.output_width * 4, config.GetPhysicalInputAddress(), (u32)config.input_width, (u32)config.input_height, config.GetPhysicalOutputAddress(), (u32)config.output_width, (u32)config.output_height, @@ -251,12 +251,12 @@ void Init() { framebuffer_sub.color_format = Regs::PixelFormat::RGB8; framebuffer_sub.active_fb = 0; - NOTICE_LOG(GPU, "initialized OK"); + LOG_DEBUG(HW_GPU, "initialized OK"); } /// Shutdown hardware void Shutdown() { - NOTICE_LOG(GPU, "shutdown OK"); + LOG_DEBUG(HW_GPU, "shutdown OK"); } } // namespace diff --git a/src/core/hw/hw.cpp b/src/core/hw/hw.cpp index 73a4f1e53..af42b41fb 100644 --- a/src/core/hw/hw.cpp +++ b/src/core/hw/hw.cpp @@ -44,7 +44,7 @@ inline void Read(T &var, const u32 addr) { break; default: - ERROR_LOG(HW, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, addr); + LOG_ERROR(HW_Memory, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, addr); } } @@ -57,7 +57,7 @@ inline void Write(u32 addr, const T data) { break; default: - ERROR_LOG(HW, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32)data, addr); + LOG_ERROR(HW_Memory, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32)data, addr); } } @@ -81,12 +81,12 @@ void Update() { /// Initialize hardware void Init() { GPU::Init(); - NOTICE_LOG(HW, "initialized OK"); + LOG_DEBUG(HW, "initialized OK"); } /// Shutdown hardware void Shutdown() { - NOTICE_LOG(HW, "shutdown OK"); + LOG_DEBUG(HW, "shutdown OK"); } } \ No newline at end of file diff --git a/src/core/loader/3dsx.cpp b/src/core/loader/3dsx.cpp index 7ef146359..f48d13530 100644 --- a/src/core/loader/3dsx.cpp +++ b/src/core/loader/3dsx.cpp @@ -174,14 +174,14 @@ int THREEDSXReader::Load3DSXFile(const std::string& filename, u32 base_addr) return ERROR_READ; for (u32 current_inprogress = 0; current_inprogress < remaining && pos < end_pos; current_inprogress++) { - DEBUG_LOG(LOADER, "(t=%d,skip=%u,patch=%u)\n", + LOG_TRACE(Loader, "(t=%d,skip=%u,patch=%u)\n", current_segment_reloc_table, (u32)reloc_table[current_inprogress].skip, (u32)reloc_table[current_inprogress].patch); pos += reloc_table[current_inprogress].skip; s32 num_patches = reloc_table[current_inprogress].patch; while (0 < num_patches && pos < end_pos) { u32 in_addr = (char*)pos - (char*)&all_mem[0]; u32 addr = TranslateAddr(*pos, &loadinfo, offsets); - DEBUG_LOG(LOADER, "Patching %08X <-- rel(%08X,%d) (%08X)\n", + LOG_TRACE(Loader, "Patching %08X <-- rel(%08X,%d) (%08X)\n", base_addr + in_addr, addr, current_segment_reloc_table, *pos); switch (current_segment_reloc_table) { case 0: *pos = (addr); break; @@ -199,10 +199,10 @@ int THREEDSXReader::Load3DSXFile(const std::string& filename, u32 base_addr) // Write the data memcpy(Memory::GetPointer(base_addr), &all_mem[0], loadinfo.seg_sizes[0] + loadinfo.seg_sizes[1] + loadinfo.seg_sizes[2]); - DEBUG_LOG(LOADER, "CODE: %u pages\n", loadinfo.seg_sizes[0] / 0x1000); - DEBUG_LOG(LOADER, "RODATA: %u pages\n", loadinfo.seg_sizes[1] / 0x1000); - DEBUG_LOG(LOADER, "DATA: %u pages\n", data_load_size / 0x1000); - DEBUG_LOG(LOADER, "BSS: %u pages\n", bss_load_size / 0x1000); + LOG_DEBUG(Loader, "CODE: %u pages\n", loadinfo.seg_sizes[0] / 0x1000); + LOG_DEBUG(Loader, "RODATA: %u pages\n", loadinfo.seg_sizes[1] / 0x1000); + LOG_DEBUG(Loader, "DATA: %u pages\n", data_load_size / 0x1000); + LOG_DEBUG(Loader, "BSS: %u pages\n", bss_load_size / 0x1000); return ERROR_NONE; } @@ -220,7 +220,7 @@ int THREEDSXReader::Load3DSXFile(const std::string& filename, u32 base_addr) * @return Success on success, otherwise Error */ ResultStatus AppLoader_THREEDSX::Load() { - INFO_LOG(LOADER, "Loading 3DSX file %s...", filename.c_str()); + LOG_INFO(Loader, "Loading 3DSX file %s...", filename.c_str()); FileUtil::IOFile file(filename, "rb"); if (file.IsOpen()) { diff --git a/src/core/loader/elf.cpp b/src/core/loader/elf.cpp index 63d2496ed..c95882f4a 100644 --- a/src/core/loader/elf.cpp +++ b/src/core/loader/elf.cpp @@ -254,18 +254,18 @@ const char *ElfReader::GetSectionName(int section) const { } bool ElfReader::LoadInto(u32 vaddr) { - DEBUG_LOG(MASTER_LOG, "String section: %i", header->e_shstrndx); + LOG_DEBUG(Loader, "String section: %i", header->e_shstrndx); // Should we relocate? relocate = (header->e_type != ET_EXEC); if (relocate) { - DEBUG_LOG(MASTER_LOG, "Relocatable module"); + LOG_DEBUG(Loader, "Relocatable module"); entryPoint += vaddr; } else { - DEBUG_LOG(MASTER_LOG, "Prerelocated executable"); + LOG_DEBUG(Loader, "Prerelocated executable"); } - INFO_LOG(MASTER_LOG, "%i segments:", header->e_phnum); + LOG_DEBUG(Loader, "%i segments:", header->e_phnum); // First pass : Get the bits into RAM u32 segment_addr[32]; @@ -273,17 +273,17 @@ bool ElfReader::LoadInto(u32 vaddr) { for (int i = 0; i < header->e_phnum; i++) { Elf32_Phdr *p = segments + i; - INFO_LOG(MASTER_LOG, "Type: %i Vaddr: %08x Filesz: %i Memsz: %i ", p->p_type, p->p_vaddr, + LOG_DEBUG(Loader, "Type: %i Vaddr: %08x Filesz: %i Memsz: %i ", p->p_type, p->p_vaddr, p->p_filesz, p->p_memsz); if (p->p_type == PT_LOAD) { segment_addr[i] = base_addr + p->p_vaddr; memcpy(Memory::GetPointer(segment_addr[i]), GetSegmentPtr(i), p->p_filesz); - INFO_LOG(MASTER_LOG, "Loadable Segment Copied to %08x, size %08x", segment_addr[i], + LOG_DEBUG(Loader, "Loadable Segment Copied to %08x, size %08x", segment_addr[i], p->p_memsz); } } - INFO_LOG(MASTER_LOG, "Done loading."); + LOG_DEBUG(Loader, "Done loading."); return true; } @@ -346,7 +346,7 @@ AppLoader_ELF::~AppLoader_ELF() { * @return True on success, otherwise false */ ResultStatus AppLoader_ELF::Load() { - INFO_LOG(LOADER, "Loading ELF file %s...", filename.c_str()); + LOG_INFO(Loader, "Loading ELF file %s...", filename.c_str()); if (is_loaded) return ResultStatus::ErrorAlreadyLoaded; diff --git a/src/core/loader/loader.cpp b/src/core/loader/loader.cpp index 174397b05..3883e1307 100644 --- a/src/core/loader/loader.cpp +++ b/src/core/loader/loader.cpp @@ -23,7 +23,7 @@ namespace Loader { */ FileType IdentifyFile(const std::string &filename) { if (filename.size() == 0) { - ERROR_LOG(LOADER, "invalid filename %s", filename.c_str()); + LOG_ERROR(Loader, "invalid filename %s", filename.c_str()); return FileType::Error; } @@ -55,7 +55,7 @@ FileType IdentifyFile(const std::string &filename) { * @return ResultStatus result of function */ ResultStatus LoadFile(const std::string& filename) { - INFO_LOG(LOADER, "Loading file %s...", filename.c_str()); + LOG_INFO(Loader, "Loading file %s...", filename.c_str()); switch (IdentifyFile(filename)) { @@ -83,7 +83,7 @@ ResultStatus LoadFile(const std::string& filename) { // Raw BIN file format... case FileType::BIN: { - INFO_LOG(LOADER, "Loading BIN file %s...", filename.c_str()); + LOG_INFO(Loader, "Loading BIN file %s...", filename.c_str()); FileUtil::IOFile file(filename, "rb"); diff --git a/src/core/loader/ncch.cpp b/src/core/loader/ncch.cpp index 343bb7523..ba9ba00c0 100644 --- a/src/core/loader/ncch.cpp +++ b/src/core/loader/ncch.cpp @@ -140,13 +140,13 @@ ResultStatus AppLoader_NCCH::LoadSectionExeFS(const char* name, std::vector& // Iterate through the ExeFs archive until we find the .code file... FileUtil::IOFile file(filename, "rb"); if (file.IsOpen()) { + LOG_DEBUG(Loader, "%d sections:", kMaxSections); for (int i = 0; i < kMaxSections; i++) { // Load the specified section... if (strcmp((const char*)exefs_header.section[i].name, name) == 0) { - INFO_LOG(LOADER, "ExeFS section %d:", i); - INFO_LOG(LOADER, " name: %s", exefs_header.section[i].name); - INFO_LOG(LOADER, " offset: 0x%08X", exefs_header.section[i].offset); - INFO_LOG(LOADER, " size: 0x%08X", exefs_header.section[i].size); + LOG_DEBUG(Loader, "%d - offset: 0x%08X, size: 0x%08X, name: %s", i, + exefs_header.section[i].offset, exefs_header.section[i].size, + exefs_header.section[i].name); s64 section_offset = (exefs_header.section[i].offset + exefs_offset + sizeof(ExeFs_Header)+ncch_offset); @@ -181,7 +181,7 @@ ResultStatus AppLoader_NCCH::LoadSectionExeFS(const char* name, std::vector& } } } else { - ERROR_LOG(LOADER, "Unable to read file %s!", filename.c_str()); + LOG_ERROR(Loader, "Unable to read file %s!", filename.c_str()); return ResultStatus::Error; } return ResultStatus::ErrorNotUsed; @@ -194,7 +194,7 @@ ResultStatus AppLoader_NCCH::LoadSectionExeFS(const char* name, std::vector& * @return True on success, otherwise false */ ResultStatus AppLoader_NCCH::Load() { - INFO_LOG(LOADER, "Loading NCCH file %s...", filename.c_str()); + LOG_INFO(Loader, "Loading NCCH file %s...", filename.c_str()); if (is_loaded) return ResultStatus::ErrorAlreadyLoaded; @@ -205,7 +205,7 @@ ResultStatus AppLoader_NCCH::Load() { // Skip NCSD header and load first NCCH (NCSD is just a container of NCCH files)... if (0 == memcmp(&ncch_header.magic, "NCSD", 4)) { - WARN_LOG(LOADER, "Only loading the first (bootable) NCCH within the NCSD file!"); + LOG_WARNING(Loader, "Only loading the first (bootable) NCCH within the NCSD file!"); ncch_offset = 0x4000; file.Seek(ncch_offset, 0); file.ReadBytes(&ncch_header, sizeof(NCCH_Header)); @@ -222,17 +222,17 @@ ResultStatus AppLoader_NCCH::Load() { is_compressed = (exheader_header.codeset_info.flags.flag & 1) == 1; entry_point = exheader_header.codeset_info.text.address; - INFO_LOG(LOADER, "Name: %s", exheader_header.codeset_info.name); - INFO_LOG(LOADER, "Code compressed: %s", is_compressed ? "yes" : "no"); - INFO_LOG(LOADER, "Entry point: 0x%08X", entry_point); + LOG_INFO(Loader, "Name: %s", exheader_header.codeset_info.name); + LOG_DEBUG(Loader, "Code compressed: %s", is_compressed ? "yes" : "no"); + LOG_DEBUG(Loader, "Entry point: 0x%08X", entry_point); // Read ExeFS... exefs_offset = ncch_header.exefs_offset * kBlockSize; u32 exefs_size = ncch_header.exefs_size * kBlockSize; - INFO_LOG(LOADER, "ExeFS offset: 0x%08X", exefs_offset); - INFO_LOG(LOADER, "ExeFS size: 0x%08X", exefs_size); + LOG_DEBUG(Loader, "ExeFS offset: 0x%08X", exefs_offset); + LOG_DEBUG(Loader, "ExeFS size: 0x%08X", exefs_size); file.Seek(exefs_offset + ncch_offset, 0); file.ReadBytes(&exefs_header, sizeof(ExeFs_Header)); @@ -243,7 +243,7 @@ ResultStatus AppLoader_NCCH::Load() { return ResultStatus::Success; } else { - ERROR_LOG(LOADER, "Unable to read file %s!", filename.c_str()); + LOG_ERROR(Loader, "Unable to read file %s!", filename.c_str()); } return ResultStatus::Error; } @@ -297,8 +297,8 @@ ResultStatus AppLoader_NCCH::ReadRomFS(std::vector& buffer) const { u32 romfs_offset = ncch_offset + (ncch_header.romfs_offset * kBlockSize) + 0x1000; u32 romfs_size = (ncch_header.romfs_size * kBlockSize) - 0x1000; - INFO_LOG(LOADER, "RomFS offset: 0x%08X", romfs_offset); - INFO_LOG(LOADER, "RomFS size: 0x%08X", romfs_size); + LOG_DEBUG(Loader, "RomFS offset: 0x%08X", romfs_offset); + LOG_DEBUG(Loader, "RomFS size: 0x%08X", romfs_size); buffer.resize(romfs_size); @@ -307,10 +307,10 @@ ResultStatus AppLoader_NCCH::ReadRomFS(std::vector& buffer) const { return ResultStatus::Success; } - NOTICE_LOG(LOADER, "RomFS unused"); + LOG_DEBUG(Loader, "NCCH has no RomFS"); return ResultStatus::ErrorNotUsed; } else { - ERROR_LOG(LOADER, "Unable to read file %s!", filename.c_str()); + LOG_ERROR(Loader, "Unable to read file %s!", filename.c_str()); } return ResultStatus::Error; } diff --git a/src/core/mem_map.cpp b/src/core/mem_map.cpp index e1c2580ff..d1c44ed24 100644 --- a/src/core/mem_map.cpp +++ b/src/core/mem_map.cpp @@ -71,7 +71,7 @@ void Init() { g_base = MemoryMap_Setup(g_views, kNumMemViews, flags, &arena); - NOTICE_LOG(MEMMAP, "initialized OK, RAM at %p (mirror at 0 @ %p)", g_heap, + LOG_DEBUG(HW_Memory, "initialized OK, RAM at %p (mirror at 0 @ %p)", g_heap, physical_fcram); } @@ -82,7 +82,7 @@ void Shutdown() { arena.ReleaseSpace(); g_base = nullptr; - NOTICE_LOG(MEMMAP, "shutdown OK"); + LOG_DEBUG(HW_Memory, "shutdown OK"); } } // namespace diff --git a/src/core/mem_map_funcs.cpp b/src/core/mem_map_funcs.cpp index b78821a3b..7f7e77233 100644 --- a/src/core/mem_map_funcs.cpp +++ b/src/core/mem_map_funcs.cpp @@ -28,7 +28,7 @@ VAddr PhysicalToVirtualAddress(const PAddr addr) { return addr - FCRAM_PADDR + FCRAM_VADDR; } - ERROR_LOG(MEMMAP, "Unknown physical address @ 0x%08x", addr); + LOG_ERROR(HW_Memory, "Unknown physical address @ 0x%08x", addr); return addr; } @@ -44,7 +44,7 @@ PAddr VirtualToPhysicalAddress(const VAddr addr) { return addr - FCRAM_VADDR + FCRAM_PADDR; } - ERROR_LOG(MEMMAP, "Unknown virtual address @ 0x%08x", addr); + LOG_ERROR(HW_Memory, "Unknown virtual address @ 0x%08x", addr); return addr; } @@ -92,7 +92,7 @@ inline void Read(T &var, const VAddr vaddr) { var = *((const T*)&g_vram[vaddr - VRAM_VADDR]); } else { - ERROR_LOG(MEMMAP, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, vaddr); + LOG_ERROR(HW_Memory, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, vaddr); } } @@ -141,7 +141,7 @@ inline void Write(const VAddr vaddr, const T data) { // Error out... } else { - ERROR_LOG(MEMMAP, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32)data, vaddr); + LOG_ERROR(HW_Memory, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32)data, vaddr); } } @@ -175,7 +175,7 @@ u8 *GetPointer(const VAddr vaddr) { return g_vram + (vaddr - VRAM_VADDR); } else { - ERROR_LOG(MEMMAP, "unknown GetPointer @ 0x%08x", vaddr); + LOG_ERROR(HW_Memory, "unknown GetPointer @ 0x%08x", vaddr); return 0; } } @@ -239,7 +239,7 @@ u16 Read16(const VAddr addr) { // Check for 16-bit unaligned memory reads... if (addr & 1) { // TODO(bunnei): Implement 16-bit unaligned memory reads - ERROR_LOG(MEMMAP, "16-bit unaligned memory reads are not implemented!"); + LOG_ERROR(HW_Memory, "16-bit unaligned memory reads are not implemented!"); } return (u16)data; diff --git a/src/video_core/clipper.cpp b/src/video_core/clipper.cpp index fbe4047ce..632fb959a 100644 --- a/src/video_core/clipper.cpp +++ b/src/video_core/clipper.cpp @@ -157,7 +157,7 @@ void ProcessTriangle(OutputVertex &v0, OutputVertex &v1, OutputVertex &v2) { InitScreenCoordinates(vtx2); - DEBUG_LOG(GPU, + LOG_TRACE(Render_Software, "Triangle %lu/%lu (%lu buffer vertices) at position (%.3f, %.3f, %.3f, %.3f), " "(%.3f, %.3f, %.3f, %.3f), (%.3f, %.3f, %.3f, %.3f) and " "screen position (%.2f, %.2f, %.2f), (%.2f, %.2f, %.2f), (%.2f, %.2f, %.2f)", diff --git a/src/video_core/command_processor.cpp b/src/video_core/command_processor.cpp index 431139cc2..b74cd3261 100644 --- a/src/video_core/command_processor.cpp +++ b/src/video_core/command_processor.cpp @@ -114,7 +114,7 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) { (vertex_attribute_formats[i] == 2) ? *(s16*)srcdata : *(float*)srcdata; input.attr[i][comp] = float24::FromFloat32(srcval); - DEBUG_LOG(GPU, "Loaded component %x of attribute %x for vertex %x (index %x) from 0x%08x + 0x%08lx + 0x%04lx: %f", + LOG_TRACE(HW_GPU, "Loaded component %x of attribute %x for vertex %x (index %x) from 0x%08x + 0x%08lx + 0x%04lx: %f", comp, i, vertex, index, attribute_config.GetBaseAddress(), vertex_attribute_sources[i] - base_address, @@ -176,7 +176,7 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) { auto& uniform = VertexShader::GetFloatUniform(uniform_setup.index); if (uniform_setup.index > 95) { - ERROR_LOG(GPU, "Invalid VS uniform index %d", (int)uniform_setup.index); + LOG_ERROR(HW_GPU, "Invalid VS uniform index %d", (int)uniform_setup.index); break; } @@ -192,7 +192,7 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) { uniform.x = float24::FromRawFloat24(uniform_write_buffer[2] & 0xFFFFFF); } - DEBUG_LOG(GPU, "Set uniform %x to (%f %f %f %f)", (int)uniform_setup.index, + LOG_TRACE(HW_GPU, "Set uniform %x to (%f %f %f %f)", (int)uniform_setup.index, uniform.x.ToFloat32(), uniform.y.ToFloat32(), uniform.z.ToFloat32(), uniform.w.ToFloat32()); diff --git a/src/video_core/debug_utils/debug_utils.cpp b/src/video_core/debug_utils/debug_utils.cpp index 71b03f31c..1a20f19ec 100644 --- a/src/video_core/debug_utils/debug_utils.cpp +++ b/src/video_core/debug_utils/debug_utils.cpp @@ -248,8 +248,8 @@ void DumpShader(const u32* binary_data, u32 binary_size, const u32* swizzle_data it->component_mask = it->component_mask | component_mask; } } catch (const std::out_of_range& ) { - _dbg_assert_msg_(GPU, 0, "Unknown output attribute mapping"); - ERROR_LOG(GPU, "Unknown output attribute mapping: %03x, %03x, %03x, %03x", + _dbg_assert_msg_(HW_GPU, 0, "Unknown output attribute mapping"); + LOG_ERROR(HW_GPU, "Unknown output attribute mapping: %03x, %03x, %03x, %03x", (int)output_attributes[i].map_x.Value(), (int)output_attributes[i].map_y.Value(), (int)output_attributes[i].map_z.Value(), @@ -309,7 +309,7 @@ static int is_pica_tracing = false; void StartPicaTracing() { if (is_pica_tracing) { - ERROR_LOG(GPU, "StartPicaTracing called even though tracing already running!"); + LOG_WARNING(HW_GPU, "StartPicaTracing called even though tracing already running!"); return; } @@ -342,7 +342,7 @@ void OnPicaRegWrite(u32 id, u32 value) std::unique_ptr FinishPicaTracing() { if (!is_pica_tracing) { - ERROR_LOG(GPU, "FinishPicaTracing called even though tracing already running!"); + LOG_WARNING(HW_GPU, "FinishPicaTracing called even though tracing isn't running!"); return {}; } @@ -357,7 +357,7 @@ std::unique_ptr FinishPicaTracing() } const Math::Vec4 LookupTexture(const u8* source, int x, int y, const TextureInfo& info) { - _dbg_assert_(GPU, info.format == Pica::Regs::TextureFormat::RGB8); + _dbg_assert_(Debug_GPU, info.format == Pica::Regs::TextureFormat::RGB8); // Cf. rasterizer code for an explanation of this algorithm. int texel_index_within_tile = 0; @@ -421,7 +421,7 @@ void DumpTexture(const Pica::Regs::TextureConfig& texture_config, u8* data) { // Initialize write structure png_ptr = png_create_write_struct(PNG_LIBPNG_VER_STRING, nullptr, nullptr, nullptr); if (png_ptr == nullptr) { - ERROR_LOG(GPU, "Could not allocate write struct\n"); + LOG_ERROR(Debug_GPU, "Could not allocate write struct\n"); goto finalise; } @@ -429,13 +429,13 @@ void DumpTexture(const Pica::Regs::TextureConfig& texture_config, u8* data) { // Initialize info structure info_ptr = png_create_info_struct(png_ptr); if (info_ptr == nullptr) { - ERROR_LOG(GPU, "Could not allocate info struct\n"); + LOG_ERROR(Debug_GPU, "Could not allocate info struct\n"); goto finalise; } // Setup Exception handling if (setjmp(png_jmpbuf(png_ptr))) { - ERROR_LOG(GPU, "Error during png creation\n"); + LOG_ERROR(Debug_GPU, "Error during png creation\n"); goto finalise; } @@ -582,7 +582,7 @@ void DumpTevStageConfig(const std::array& stages) stage_info += "Stage " + std::to_string(index) + ": " + GetColorCombinerStr(tev_stage) + " " + GetAlphaCombinerStr(tev_stage) + "\n"; } - DEBUG_LOG(GPU, "%s", stage_info.c_str()); + LOG_TRACE(HW_GPU, "%s", stage_info.c_str()); } } // namespace diff --git a/src/video_core/gpu_debugger.h b/src/video_core/gpu_debugger.h index 1242eb58f..16b1656bb 100644 --- a/src/video_core/gpu_debugger.h +++ b/src/video_core/gpu_debugger.h @@ -39,7 +39,7 @@ public: virtual void GXCommandProcessed(int total_command_count) { const GSP_GPU::Command& cmd = observed->ReadGXCommandHistory(total_command_count-1); - ERROR_LOG(GSP, "Received command: id=%x", (int)cmd.id.Value()); + LOG_TRACE(Debug_GPU, "Received command: id=%x", (int)cmd.id.Value()); } protected: diff --git a/src/video_core/primitive_assembly.cpp b/src/video_core/primitive_assembly.cpp index dabf2d1a3..102693ed9 100644 --- a/src/video_core/primitive_assembly.cpp +++ b/src/video_core/primitive_assembly.cpp @@ -43,7 +43,7 @@ void PrimitiveAssembler::SubmitVertex(VertexType& vtx, TriangleHandl break; default: - ERROR_LOG(GPU, "Unknown triangle topology %x:", (int)topology); + LOG_ERROR(Render_Software, "Unknown triangle topology %x:", (int)topology); break; } } diff --git a/src/video_core/rasterizer.cpp b/src/video_core/rasterizer.cpp index a35f0c0d8..b7e04a560 100644 --- a/src/video_core/rasterizer.cpp +++ b/src/video_core/rasterizer.cpp @@ -252,7 +252,7 @@ void ProcessTriangle(const VertexShader::OutputVertex& v0, return combiner_output.rgb(); default: - ERROR_LOG(GPU, "Unknown color combiner source %d\n", (int)source); + LOG_ERROR(HW_GPU, "Unknown color combiner source %d\n", (int)source); return {}; } }; @@ -272,7 +272,7 @@ void ProcessTriangle(const VertexShader::OutputVertex& v0, return combiner_output.a(); default: - ERROR_LOG(GPU, "Unknown alpha combiner source %d\n", (int)source); + LOG_ERROR(HW_GPU, "Unknown alpha combiner source %d\n", (int)source); return 0; } }; @@ -283,7 +283,7 @@ void ProcessTriangle(const VertexShader::OutputVertex& v0, case ColorModifier::SourceColor: return values; default: - ERROR_LOG(GPU, "Unknown color factor %d\n", (int)factor); + LOG_ERROR(HW_GPU, "Unknown color factor %d\n", (int)factor); return {}; } }; @@ -293,7 +293,7 @@ void ProcessTriangle(const VertexShader::OutputVertex& v0, case AlphaModifier::SourceAlpha: return value; default: - ERROR_LOG(GPU, "Unknown color factor %d\n", (int)factor); + LOG_ERROR(HW_GPU, "Unknown color factor %d\n", (int)factor); return 0; } }; @@ -307,7 +307,7 @@ void ProcessTriangle(const VertexShader::OutputVertex& v0, return ((input[0] * input[1]) / 255).Cast(); default: - ERROR_LOG(GPU, "Unknown color combiner operation %d\n", (int)op); + LOG_ERROR(HW_GPU, "Unknown color combiner operation %d\n", (int)op); return {}; } }; @@ -321,7 +321,7 @@ void ProcessTriangle(const VertexShader::OutputVertex& v0, return input[0] * input[1] / 255; default: - ERROR_LOG(GPU, "Unknown alpha combiner operation %d\n", (int)op); + LOG_ERROR(HW_GPU, "Unknown alpha combiner operation %d\n", (int)op); return 0; } }; diff --git a/src/video_core/renderer_opengl/gl_shader_util.cpp b/src/video_core/renderer_opengl/gl_shader_util.cpp index fdac9ae1a..d0f82e6cd 100644 --- a/src/video_core/renderer_opengl/gl_shader_util.cpp +++ b/src/video_core/renderer_opengl/gl_shader_util.cpp @@ -20,7 +20,7 @@ GLuint LoadShaders(const char* vertex_shader, const char* fragment_shader) { int info_log_length; // Compile Vertex Shader - DEBUG_LOG(GPU, "Compiling vertex shader."); + LOG_DEBUG(Render_OpenGL, "Compiling vertex shader..."); glShaderSource(vertex_shader_id, 1, &vertex_shader, nullptr); glCompileShader(vertex_shader_id); @@ -32,11 +32,15 @@ GLuint LoadShaders(const char* vertex_shader, const char* fragment_shader) { if (info_log_length > 1) { std::vector vertex_shader_error(info_log_length); glGetShaderInfoLog(vertex_shader_id, info_log_length, nullptr, &vertex_shader_error[0]); - DEBUG_LOG(GPU, "%s", &vertex_shader_error[0]); + if (result) { + LOG_DEBUG(Render_OpenGL, "%s", &vertex_shader_error[0]); + } else { + LOG_ERROR(Render_OpenGL, "Error compiling vertex shader:\n%s", &vertex_shader_error[0]); + } } // Compile Fragment Shader - DEBUG_LOG(GPU, "Compiling fragment shader."); + LOG_DEBUG(Render_OpenGL, "Compiling fragment shader..."); glShaderSource(fragment_shader_id, 1, &fragment_shader, nullptr); glCompileShader(fragment_shader_id); @@ -48,11 +52,15 @@ GLuint LoadShaders(const char* vertex_shader, const char* fragment_shader) { if (info_log_length > 1) { std::vector fragment_shader_error(info_log_length); glGetShaderInfoLog(fragment_shader_id, info_log_length, nullptr, &fragment_shader_error[0]); - DEBUG_LOG(GPU, "%s", &fragment_shader_error[0]); + if (result) { + LOG_DEBUG(Render_OpenGL, "%s", &fragment_shader_error[0]); + } else { + LOG_ERROR(Render_OpenGL, "Error compiling fragment shader:\n%s", &fragment_shader_error[0]); + } } // Link the program - DEBUG_LOG(GPU, "Linking program."); + LOG_DEBUG(Render_OpenGL, "Linking program..."); GLuint program_id = glCreateProgram(); glAttachShader(program_id, vertex_shader_id); @@ -66,7 +74,11 @@ GLuint LoadShaders(const char* vertex_shader, const char* fragment_shader) { if (info_log_length > 1) { std::vector program_error(info_log_length); glGetProgramInfoLog(program_id, info_log_length, nullptr, &program_error[0]); - DEBUG_LOG(GPU, "%s", &program_error[0]); + if (result) { + LOG_DEBUG(Render_OpenGL, "%s", &program_error[0]); + } else { + LOG_ERROR(Render_OpenGL, "Error linking shader:\n%s", &program_error[0]); + } } glDeleteShader(vertex_shader_id); diff --git a/src/video_core/renderer_opengl/renderer_opengl.cpp b/src/video_core/renderer_opengl/renderer_opengl.cpp index 06de6afbd..e2caeeb8f 100644 --- a/src/video_core/renderer_opengl/renderer_opengl.cpp +++ b/src/video_core/renderer_opengl/renderer_opengl.cpp @@ -90,7 +90,7 @@ void RendererOpenGL::LoadFBToActiveGLTexture(const GPU::Regs::FramebufferConfig& const VAddr framebuffer_vaddr = Memory::PhysicalToVirtualAddress( framebuffer.active_fb == 1 ? framebuffer.address_left2 : framebuffer.address_left1); - DEBUG_LOG(GPU, "0x%08x bytes from 0x%08x(%dx%d), fmt %x", + LOG_TRACE(Render_OpenGL, "0x%08x bytes from 0x%08x(%dx%d), fmt %x", framebuffer.stride * framebuffer.height, framebuffer_vaddr, (int)framebuffer.width, (int)framebuffer.height, (int)framebuffer.format); @@ -98,15 +98,15 @@ void RendererOpenGL::LoadFBToActiveGLTexture(const GPU::Regs::FramebufferConfig& const u8* framebuffer_data = Memory::GetPointer(framebuffer_vaddr); // TODO: Handle other pixel formats - _dbg_assert_msg_(RENDER, framebuffer.color_format == GPU::Regs::PixelFormat::RGB8, + _dbg_assert_msg_(Render_OpenGL, framebuffer.color_format == GPU::Regs::PixelFormat::RGB8, "Unsupported 3DS pixel format."); size_t pixel_stride = framebuffer.stride / 3; // OpenGL only supports specifying a stride in units of pixels, not bytes, unfortunately - _dbg_assert_(RENDER, pixel_stride * 3 == framebuffer.stride); + _dbg_assert_(Render_OpenGL, pixel_stride * 3 == framebuffer.stride); // Ensure no bad interactions with GL_UNPACK_ALIGNMENT, which by default // only allows rows to have a memory alignement of 4. - _dbg_assert_(RENDER, pixel_stride % 4 == 0); + _dbg_assert_(Render_OpenGL, pixel_stride % 4 == 0); glBindTexture(GL_TEXTURE_2D, texture.handle); glPixelStorei(GL_UNPACK_ROW_LENGTH, (GLint)pixel_stride); @@ -263,11 +263,11 @@ void RendererOpenGL::Init() { int err = ogl_LoadFunctions(); if (ogl_LOAD_SUCCEEDED != err) { - ERROR_LOG(RENDER, "Failed to initialize GL functions! Exiting..."); + LOG_CRITICAL(Render_OpenGL, "Failed to initialize GL functions! Exiting..."); exit(-1); } - NOTICE_LOG(RENDER, "GL_VERSION: %s\n", glGetString(GL_VERSION)); + LOG_INFO(Render_OpenGL, "GL_VERSION: %s", glGetString(GL_VERSION)); InitOpenGLObjects(); } diff --git a/src/video_core/vertex_shader.cpp b/src/video_core/vertex_shader.cpp index 0dff11a0f..477e78cfe 100644 --- a/src/video_core/vertex_shader.cpp +++ b/src/video_core/vertex_shader.cpp @@ -206,7 +206,7 @@ static void ProcessShaderCode(VertexShaderState& state) { case Instruction::OpCode::CALL: increment_pc = false; - _dbg_assert_(GPU, state.call_stack_pointer - state.call_stack < sizeof(state.call_stack)); + _dbg_assert_(HW_GPU, state.call_stack_pointer - state.call_stack < sizeof(state.call_stack)); *++state.call_stack_pointer = state.program_counter - shader_memory; // TODO: Does this offset refer to the beginning of shader memory? @@ -218,7 +218,7 @@ static void ProcessShaderCode(VertexShaderState& state) { break; default: - ERROR_LOG(GPU, "Unhandled instruction: 0x%02x (%s): 0x%08x", + LOG_ERROR(HW_GPU, "Unhandled instruction: 0x%02x (%s): 0x%08x", (int)instr.opcode.Value(), instr.GetOpCodeName().c_str(), instr.hex); break; } @@ -285,7 +285,7 @@ OutputVertex RunShader(const InputVertex& input, int num_attributes) state.debug.max_opdesc_id, registers.vs_main_offset, registers.vs_output_attributes); - DEBUG_LOG(GPU, "Output vertex: pos (%.2f, %.2f, %.2f, %.2f), col(%.2f, %.2f, %.2f, %.2f), tc0(%.2f, %.2f)", + LOG_TRACE(Render_Software, "Output vertex: pos (%.2f, %.2f, %.2f, %.2f), col(%.2f, %.2f, %.2f, %.2f), tc0(%.2f, %.2f)", ret.pos.x.ToFloat32(), ret.pos.y.ToFloat32(), ret.pos.z.ToFloat32(), ret.pos.w.ToFloat32(), ret.color.x.ToFloat32(), ret.color.y.ToFloat32(), ret.color.z.ToFloat32(), ret.color.w.ToFloat32(), ret.tc0.u().ToFloat32(), ret.tc0.v().ToFloat32()); diff --git a/src/video_core/video_core.cpp b/src/video_core/video_core.cpp index b581ff4da..6791e4007 100644 --- a/src/video_core/video_core.cpp +++ b/src/video_core/video_core.cpp @@ -30,13 +30,13 @@ void Init(EmuWindow* emu_window) { g_current_frame = 0; - NOTICE_LOG(VIDEO, "initialized OK"); + LOG_DEBUG(Render, "initialized OK"); } /// Shutdown the video core void Shutdown() { delete g_renderer; - NOTICE_LOG(VIDEO, "shutdown OK"); + LOG_DEBUG(Render, "shutdown OK"); } } // namespace -- cgit v1.2.3 From f6cb8c1927b45f5bf9ed73143b1a8db87a9c3900 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sat, 13 Dec 2014 20:23:32 -0500 Subject: Clean up armdefs.h --- src/core/arm/skyeye_common/armdefs.h | 475 +++++++++++++---------------------- 1 file changed, 169 insertions(+), 306 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h index 8343aaa01..159b0e804 100644 --- a/src/core/arm/skyeye_common/armdefs.h +++ b/src/core/arm/skyeye_common/armdefs.h @@ -18,38 +18,26 @@ #ifndef _ARMDEFS_H_ #define _ARMDEFS_H_ -#include -#include -#include - -#include "common/platform.h" - -//teawater add for arm2x86 2005.02.14------------------------------------------- -// koodailar remove it for mingw 2005.12.18---------------- -//anthonylee modify it for portable 2007.01.30 -//#include "portable/mman.h" +#include +#include +#include +#include +#include +#include +#include +#include #include "arm_regformat.h" +#include "common/common_types.h" #include "common/platform.h" +#include "core/arm/skyeye_common/armmmu.h" #include "core/arm/skyeye_common/skyeye_defs.h" -//AJ2D-------------------------------------------------------------------------- - -//teawater add for arm2x86 2005.07.03------------------------------------------- - -#include -#include -#include -#include #if EMU_PLATFORM == PLATFORM_LINUX +#include #include #endif -#include -#include -#include -//#include -//AJ2D-------------------------------------------------------------------------- #if 0 #if 0 #define DIFF_STATE 1 @@ -70,25 +58,8 @@ #define LOWHIGH 1 #define HIGHLOW 2 -//teawater add DBCT_TEST_SPEED 2005.10.04--------------------------------------- -#include - -#include "common/platform.h" - -#if EMU_PLATFORM == PLATFORM_LINUX -#include -#endif - //#define DBCT_TEST_SPEED #define DBCT_TEST_SPEED_SEC 10 -//AJ2D-------------------------------------------------------------------------- - -//teawater add compile switch for DBCT GDB RSP function 2005.10.21-------------- -//#define DBCT_GDBRSP -//AJ2D-------------------------------------------------------------------------- - -//#include -//#include #define ARM_BYTE_TYPE 0 #define ARM_HALFWORD_TYPE 1 @@ -103,71 +74,34 @@ typedef char *VoidStar; #endif -typedef unsigned long long ARMdword; /* must be 64 bits wide */ -typedef unsigned int ARMword; /* must be 32 bits wide */ -typedef unsigned char ARMbyte; /* must be 8 bits wide */ -typedef unsigned short ARMhword; /* must be 16 bits wide */ +typedef u64 ARMdword; // must be 64 bits wide +typedef u32 ARMword; // must be 32 bits wide +typedef u16 ARMhword; // must be 16 bits wide +typedef u8 ARMbyte; // must be 8 bits wide typedef struct ARMul_State ARMul_State; typedef struct ARMul_io ARMul_io; typedef struct ARMul_Energy ARMul_Energy; -//teawater add for arm2x86 2005.06.24------------------------------------------- -#include -//AJ2D-------------------------------------------------------------------------- -/* -//chy 2005-05-11 -#ifndef __CYGWIN__ -//teawater add for arm2x86 2005.02.14------------------------------------------- -typedef unsigned char uint8_t; -typedef unsigned short uint16_t; -typedef unsigned int u32; -#if defined (__x86_64__) -typedef unsigned long uint64_t; -#else -typedef unsigned long long uint64_t; -#endif -////AJ2D-------------------------------------------------------------------------- -#endif -*/ -#include "core/arm/skyeye_common/armmmu.h" -//#include "lcd/skyeye_lcd.h" - - -//#include "skyeye.h" -//#include "skyeye_device.h" -//#include "net/skyeye_net.h" -//#include "skyeye_config.h" - - -typedef unsigned ARMul_CPInits (ARMul_State * state); -typedef unsigned ARMul_CPExits (ARMul_State * state); -typedef unsigned ARMul_LDCs (ARMul_State * state, unsigned type, - ARMword instr, ARMword value); -typedef unsigned ARMul_STCs (ARMul_State * state, unsigned type, - ARMword instr, ARMword * value); -typedef unsigned ARMul_MRCs (ARMul_State * state, unsigned type, - ARMword instr, ARMword * value); -typedef unsigned ARMul_MCRs (ARMul_State * state, unsigned type, - ARMword instr, ARMword value); -typedef unsigned ARMul_MRRCs (ARMul_State * state, unsigned type, - ARMword instr, ARMword * value1, ARMword * value2); -typedef unsigned ARMul_MCRRs (ARMul_State * state, unsigned type, - ARMword instr, ARMword value1, ARMword value2); -typedef unsigned ARMul_CDPs (ARMul_State * state, unsigned type, - ARMword instr); -typedef unsigned ARMul_CPReads (ARMul_State * state, unsigned reg, - ARMword * value); -typedef unsigned ARMul_CPWrites (ARMul_State * state, unsigned reg, - ARMword value); +typedef unsigned ARMul_CPInits(ARMul_State* state); +typedef unsigned ARMul_CPExits(ARMul_State* state); +typedef unsigned ARMul_LDCs(ARMul_State* state, unsigned type, ARMword instr, ARMword value); +typedef unsigned ARMul_STCs(ARMul_State* state, unsigned type, ARMword instr, ARMword* value); +typedef unsigned ARMul_MRCs(ARMul_State* state, unsigned type, ARMword instr, ARMword* value); +typedef unsigned ARMul_MCRs(ARMul_State* state, unsigned type, ARMword instr, ARMword value); +typedef unsigned ARMul_MRRCs(ARMul_State* state, unsigned type, ARMword instr, ARMword* value1, ARMword* value2); +typedef unsigned ARMul_MCRRs(ARMul_State* state, unsigned type, ARMword instr, ARMword value1, ARMword value2); +typedef unsigned ARMul_CDPs(ARMul_State* state, unsigned type, ARMword instr); +typedef unsigned ARMul_CPReads(ARMul_State* state, unsigned reg, ARMword* value); +typedef unsigned ARMul_CPWrites(ARMul_State* state, unsigned reg, ARMword value); //added by ksh,2004-3-5 struct ARMul_io { - ARMword *instr; //to display the current interrupt state - ARMword *net_flag; //to judge if network is enabled - ARMword *net_int; //netcard interrupt + ARMword *instr; // to display the current interrupt state + ARMword *net_flag; // to judge if network is enabled + ARMword *net_int; // netcard interrupt //ywc,2004-04-01 ARMword *ts_int; @@ -180,17 +114,17 @@ struct ARMul_io /* added by ksh,2004-11-26,some energy profiling */ struct ARMul_Energy { - int energy_prof; /* BUG200103282109 : for energy profiling */ - int enable_func_energy; /* BUG200105181702 */ + int energy_prof; /* BUG200103282109 : for energy profiling */ + int enable_func_energy; /* BUG200105181702 */ char *func_energy; - int func_display; /* BUG200103311509 : for function call display */ + int func_display; /* BUG200103311509 : for function call display */ int func_disp_start; /* BUG200104191428 : to start func profiling */ - char *start_func; /* BUG200104191428 */ + char *start_func; /* BUG200104191428 */ - FILE *outfile; /* BUG200105201531 : direct console to file */ + FILE *outfile; /* BUG200105201531 : direct console to file */ long long tcycle, pcycle; float t_energy; - void *cur_task; /* BUG200103291737 */ + void *cur_task; /* BUG200103291737 */ long long t_mem_cycle, t_idle_cycle, t_uart_cycle; long long p_mem_cycle, p_idle_cycle, p_uart_cycle; long long p_io_update_tcycle; @@ -203,13 +137,12 @@ struct ARMul_Energy typedef struct mem_bank { - ARMword (*read_byte) (ARMul_State * state, ARMword addr); - void (*write_byte) (ARMul_State * state, ARMword addr, ARMword data); - ARMword (*read_halfword) (ARMul_State * state, ARMword addr); - void (*write_halfword) (ARMul_State * state, ARMword addr, - ARMword data); - ARMword (*read_word) (ARMul_State * state, ARMword addr); - void (*write_word) (ARMul_State * state, ARMword addr, ARMword data); + ARMword (*read_byte) (ARMul_State* state, ARMword addr); + void (*write_byte) (ARMul_State* state, ARMword addr, ARMword data); + ARMword (*read_halfword) (ARMul_State* state, ARMword addr); + void (*write_halfword) (ARMul_State* state, ARMword addr, ARMword data); + ARMword (*read_word) (ARMul_State* state, ARMword addr); + void (*write_word) (ARMul_State* state, ARMword addr, ARMword data); unsigned int addr, len; char filename[MAX_STR]; unsigned type; //chy 2003-09-21: maybe io,ram,rom @@ -224,24 +157,24 @@ typedef struct #define VFP_REG_NUM 64 struct ARMul_State { - ARMword Emulate; /* to start and stop emulation */ - unsigned EndCondition; /* reason for stopping */ + ARMword Emulate; /* to start and stop emulation */ + unsigned EndCondition; /* reason for stopping */ unsigned ErrorCode; /* type of illegal instruction */ /* Order of the following register should not be modified */ - ARMword Reg[16]; /* the current register file */ - ARMword Cpsr; /* the current psr */ + ARMword Reg[16]; /* the current register file */ + ARMword Cpsr; /* the current psr */ ARMword Spsr_copy; ARMword phys_pc; ARMword Reg_usr[2]; - ARMword Reg_svc[2]; /* R13_SVC R14_SVC */ + ARMword Reg_svc[2]; /* R13_SVC R14_SVC */ ARMword Reg_abort[2]; /* R13_ABORT R14_ABORT */ ARMword Reg_undef[2]; /* R13 UNDEF R14 UNDEF */ ARMword Reg_irq[2]; /* R13_IRQ R14_IRQ */ ARMword Reg_firq[7]; /* R8---R14 FIRQ */ - ARMword Spsr[7]; /* the exception psr's */ - ARMword Mode; /* the current mode */ - ARMword Bank; /* the current register bank */ + ARMword Spsr[7]; /* the exception psr's */ + ARMword Mode; /* the current mode */ + ARMword Bank; /* the current register bank */ ARMword exclusive_tag; ARMword exclusive_state; ARMword exclusive_result; @@ -284,35 +217,35 @@ struct ARMul_State ARMword servaddr; unsigned NextInstr; - unsigned VectorCatch; /* caught exception mask */ - unsigned CallDebug; /* set to call the debugger */ - unsigned CanWatch; /* set by memory interface if its willing to suffer the - overhead of checking for watchpoints on each memory - access */ + unsigned VectorCatch; /* caught exception mask */ + unsigned CallDebug; /* set to call the debugger */ + unsigned CanWatch; /* set by memory interface if its willing to suffer the + overhead of checking for watchpoints on each memory + access */ unsigned int StopHandle; - char *CommandLine; /* Command Line from ARMsd */ - - ARMul_CPInits *CPInit[16]; /* coprocessor initialisers */ - ARMul_CPExits *CPExit[16]; /* coprocessor finalisers */ - ARMul_LDCs *LDC[16]; /* LDC instruction */ - ARMul_STCs *STC[16]; /* STC instruction */ - ARMul_MRCs *MRC[16]; /* MRC instruction */ - ARMul_MCRs *MCR[16]; /* MCR instruction */ - ARMul_MRRCs *MRRC[16]; /* MRRC instruction */ - ARMul_MCRRs *MCRR[16]; /* MCRR instruction */ - ARMul_CDPs *CDP[16]; /* CDP instruction */ - ARMul_CPReads *CPRead[16]; /* Read CP register */ - ARMul_CPWrites *CPWrite[16]; /* Write CP register */ - unsigned char *CPData[16]; /* Coprocessor data */ + char *CommandLine; /* Command Line from ARMsd */ + + ARMul_CPInits *CPInit[16]; /* coprocessor initialisers */ + ARMul_CPExits *CPExit[16]; /* coprocessor finalisers */ + ARMul_LDCs *LDC[16]; /* LDC instruction */ + ARMul_STCs *STC[16]; /* STC instruction */ + ARMul_MRCs *MRC[16]; /* MRC instruction */ + ARMul_MCRs *MCR[16]; /* MCR instruction */ + ARMul_MRRCs *MRRC[16]; /* MRRC instruction */ + ARMul_MCRRs *MCRR[16]; /* MCRR instruction */ + ARMul_CDPs *CDP[16]; /* CDP instruction */ + ARMul_CPReads *CPRead[16]; /* Read CP register */ + ARMul_CPWrites *CPWrite[16]; /* Write CP register */ + unsigned char *CPData[16]; /* Coprocessor data */ unsigned char const *CPRegWords[16]; /* map of coprocessor register sizes */ - unsigned EventSet; /* the number of events in the queue */ - unsigned int Now; /* time to the nearest cycle */ - struct EventNode **EventPtr; /* the event list */ + unsigned EventSet; /* the number of events in the queue */ + unsigned int Now; /* time to the nearest cycle */ + struct EventNode **EventPtr; /* the event list */ - unsigned Debug; /* show instructions as they are executed */ - unsigned NresetSig; /* reset the processor */ + unsigned Debug; /* show instructions as they are executed */ + unsigned NresetSig; /* reset the processor */ unsigned NfiqSig; unsigned NirqSig; @@ -356,12 +289,12 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model) */ unsigned lateabtSig; - ARMword Vector; /* synthesize aborts in cycle modes */ - ARMword Aborted; /* sticky flag for aborts */ - ARMword Reseted; /* sticky flag for Reset */ + ARMword Vector; /* synthesize aborts in cycle modes */ + ARMword Aborted; /* sticky flag for aborts */ + ARMword Reseted; /* sticky flag for Reset */ ARMword Inted, LastInted; /* sticky flags for interrupts */ - ARMword Base; /* extra hand for base writeback */ - ARMword AbortAddr; /* to keep track of Prefetch aborts */ + ARMword Base; /* extra hand for base writeback */ + ARMword AbortAddr; /* to keep track of Prefetch aborts */ const struct Dbg_HostosInterface *hostif; @@ -378,7 +311,7 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model) //chy: 2003-08-11, for different arm core type unsigned is_v4; /* Are we emulating a v4 architecture (or higher) ? */ unsigned is_v5; /* Are we emulating a v5 architecture ? */ - unsigned is_v5e; /* Are we emulating a v5e architecture ? */ + unsigned is_v5e; /* Are we emulating a v5e architecture ? */ unsigned is_v6; /* Are we emulating a v6 architecture ? */ unsigned is_v7; /* Are we emulating a v7 architecture ? */ unsigned is_XScale; /* Are we emulating an XScale architecture ? */ @@ -387,51 +320,43 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model) //chy 2005-09-19 unsigned is_pxa27x; /* Are we emulating a Intel PXA27x co-processor ? */ //chy: seems only used in xscale's CP14 - unsigned int LastTime; /* Value of last call to ARMul_Time() */ + unsigned int LastTime; /* Value of last call to ARMul_Time() */ ARMword CP14R0_CCD; /* used to count 64 clock cycles with CP14 R0 bit 3 set */ -//added by ksh:for handle different machs io 2004-3-5 + //added by ksh:for handle different machs io 2004-3-5 ARMul_io mach_io; -/*added by ksh,2004-11-26,some energy profiling*/ + /*added by ksh,2004-11-26,some energy profiling*/ ARMul_Energy energy; -//teawater add for next_dis 2004.10.27----------------------- + //teawater add for next_dis 2004.10.27----------------------- int disassemble; -//AJ2D------------------------------------------ -//teawater add for arm2x86 2005.02.15------------------------------------------- + + //teawater add for arm2x86 2005.02.15------------------------------------------- u32 trap; u32 tea_break_addr; u32 tea_break_ok; int tea_pc; -//AJ2D-------------------------------------------------------------------------- -//teawater add for arm2x86 2005.07.03------------------------------------------- - - /* - * 2007-01-24 removed the term-io functions by Anthony Lee, - * moved to "device/uart/skyeye_uart_stdio.c". - */ -//AJ2D-------------------------------------------------------------------------- -//teawater add for arm2x86 2005.07.05------------------------------------------- + //teawater add for arm2x86 2005.07.05------------------------------------------- //arm_arm A2-18 int abort_model; //0 Base Restored Abort Model, 1 the Early Abort Model, 2 Base Updated Abort Model -//AJ2D-------------------------------------------------------------------------- -//teawater change for return if running tb dirty 2005.07.09--------------------- + + //teawater change for return if running tb dirty 2005.07.09--------------------- void *tb_now; -//AJ2D-------------------------------------------------------------------------- -//teawater add for record reg value to ./reg.txt 2005.07.10--------------------- + + //teawater add for record reg value to ./reg.txt 2005.07.10--------------------- FILE *tea_reg_fd; -//AJ2D-------------------------------------------------------------------------- -/*added by ksh in 2005-10-1*/ + + /*added by ksh in 2005-10-1*/ cpu_config_t *cpu; //mem_config_t *mem_bank; -/* added LPC remap function */ + /* added LPC remap function */ int vector_remap_flag; u32 vector_remap_addr; u32 vector_remap_size; @@ -486,17 +411,14 @@ typedef ARMul_State arm_core_t; #define ARM_Debug_Prop 0x10 #define ARM_Isync_Prop ARM_Debug_Prop #define ARM_Lock_Prop 0x20 -//chy 2003-08-11 #define ARM_v4_Prop 0x40 #define ARM_v5_Prop 0x80 -/*jeff.du 2010-08-05 */ #define ARM_v6_Prop 0xc0 #define ARM_v5e_Prop 0x100 #define ARM_XScale_Prop 0x200 #define ARM_ep9312_Prop 0x400 #define ARM_iWMMXt_Prop 0x800 -//chy 2005-09-19 #define ARM_PXA27X_Prop 0x1000 #define ARM_v7_Prop 0x2000 @@ -591,47 +513,44 @@ typedef ARMul_State arm_core_t; #ifdef __cplusplus extern "C" { #endif -extern void ARMul_EmulateInit (void); -extern void ARMul_Reset (ARMul_State * state); +extern void ARMul_EmulateInit(); +extern void ARMul_Reset(ARMul_State* state); #ifdef __cplusplus } #endif -extern ARMul_State *ARMul_NewState (ARMul_State * state); -extern ARMword ARMul_DoProg (ARMul_State * state); -extern ARMword ARMul_DoInstr (ARMul_State * state); +extern ARMul_State *ARMul_NewState(ARMul_State* state); +extern ARMword ARMul_DoProg(ARMul_State* state); +extern ARMword ARMul_DoInstr(ARMul_State* state); /***************************************************************************\ * Definitons of things for event handling * \***************************************************************************/ -extern void ARMul_ScheduleEvent (ARMul_State * state, unsigned int delay, - unsigned (*func) ()); -extern void ARMul_EnvokeEvent (ARMul_State * state); -extern unsigned int ARMul_Time (ARMul_State * state); +extern void ARMul_ScheduleEvent(ARMul_State* state, unsigned int delay, unsigned(*func) ()); +extern void ARMul_EnvokeEvent(ARMul_State* state); +extern unsigned int ARMul_Time(ARMul_State* state); /***************************************************************************\ * Useful support routines * \***************************************************************************/ -extern ARMword ARMul_GetReg (ARMul_State * state, unsigned mode, - unsigned reg); -extern void ARMul_SetReg (ARMul_State * state, unsigned mode, unsigned reg, - ARMword value); -extern ARMword ARMul_GetPC (ARMul_State * state); -extern ARMword ARMul_GetNextPC (ARMul_State * state); -extern void ARMul_SetPC (ARMul_State * state, ARMword value); -extern ARMword ARMul_GetR15 (ARMul_State * state); -extern void ARMul_SetR15 (ARMul_State * state, ARMword value); - -extern ARMword ARMul_GetCPSR (ARMul_State * state); -extern void ARMul_SetCPSR (ARMul_State * state, ARMword value); -extern ARMword ARMul_GetSPSR (ARMul_State * state, ARMword mode); -extern void ARMul_SetSPSR (ARMul_State * state, ARMword mode, ARMword value); +extern ARMword ARMul_GetReg (ARMul_State* state, unsigned mode, unsigned reg); +extern void ARMul_SetReg (ARMul_State* state, unsigned mode, unsigned reg, ARMword value); +extern ARMword ARMul_GetPC(ARMul_State* state); +extern ARMword ARMul_GetNextPC(ARMul_State* state); +extern void ARMul_SetPC(ARMul_State* state, ARMword value); +extern ARMword ARMul_GetR15(ARMul_State* state); +extern void ARMul_SetR15(ARMul_State* state, ARMword value); + +extern ARMword ARMul_GetCPSR(ARMul_State* state); +extern void ARMul_SetCPSR(ARMul_State* state, ARMword value); +extern ARMword ARMul_GetSPSR(ARMul_State* state, ARMword mode); +extern void ARMul_SetSPSR(ARMul_State* state, ARMword mode, ARMword value); /***************************************************************************\ * Definitons of things to handle aborts * \***************************************************************************/ -extern void ARMul_Abort (ARMul_State * state, ARMword address); +extern void ARMul_Abort(ARMul_State* state, ARMword address); #ifdef MODET #define ARMul_ABORTWORD (state->TFlag ? 0xefffdfff : 0xefffffff) /* SWI -1 */ #define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \ @@ -649,54 +568,40 @@ extern void ARMul_Abort (ARMul_State * state, ARMword address); * Definitons of things in the memory interface * \***************************************************************************/ -extern unsigned ARMul_MemoryInit (ARMul_State * state, - unsigned int initmemsize); -extern void ARMul_MemoryExit (ARMul_State * state); +extern unsigned ARMul_MemoryInit(ARMul_State* state, unsigned int initmemsize); +extern void ARMul_MemoryExit(ARMul_State* state); -extern ARMword ARMul_LoadInstrS (ARMul_State * state, ARMword address, - ARMword isize); -extern ARMword ARMul_LoadInstrN (ARMul_State * state, ARMword address, - ARMword isize); +extern ARMword ARMul_LoadInstrS(ARMul_State* state, ARMword address, ARMword isize); +extern ARMword ARMul_LoadInstrN(ARMul_State* state, ARMword address, ARMword isize); #ifdef __cplusplus extern "C" { #endif -extern ARMword ARMul_ReLoadInstr (ARMul_State * state, ARMword address, - ARMword isize); +extern ARMword ARMul_ReLoadInstr(ARMul_State* state, ARMword address, ARMword isize); #ifdef __cplusplus } #endif -extern ARMword ARMul_LoadWordS (ARMul_State * state, ARMword address); -extern ARMword ARMul_LoadWordN (ARMul_State * state, ARMword address); -extern ARMword ARMul_LoadHalfWord (ARMul_State * state, ARMword address); -extern ARMword ARMul_LoadByte (ARMul_State * state, ARMword address); - -extern void ARMul_StoreWordS (ARMul_State * state, ARMword address, - ARMword data); -extern void ARMul_StoreWordN (ARMul_State * state, ARMword address, - ARMword data); -extern void ARMul_StoreHalfWord (ARMul_State * state, ARMword address, - ARMword data); -extern void ARMul_StoreByte (ARMul_State * state, ARMword address, - ARMword data); - -extern ARMword ARMul_SwapWord (ARMul_State * state, ARMword address, - ARMword data); -extern ARMword ARMul_SwapByte (ARMul_State * state, ARMword address, - ARMword data); - -extern void ARMul_Icycles (ARMul_State * state, unsigned number, - ARMword address); -extern void ARMul_Ccycles (ARMul_State * state, unsigned number, - ARMword address); - -extern ARMword ARMul_ReadWord (ARMul_State * state, ARMword address); -extern ARMword ARMul_ReadByte (ARMul_State * state, ARMword address); -extern void ARMul_WriteWord (ARMul_State * state, ARMword address, - ARMword data); -extern void ARMul_WriteByte (ARMul_State * state, ARMword address, - ARMword data); - -extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword, +extern ARMword ARMul_LoadWordS(ARMul_State* state, ARMword address); +extern ARMword ARMul_LoadWordN(ARMul_State* state, ARMword address); +extern ARMword ARMul_LoadHalfWord(ARMul_State* state, ARMword address); +extern ARMword ARMul_LoadByte(ARMul_State* state, ARMword address); + +extern void ARMul_StoreWordS(ARMul_State* state, ARMword address, ARMword data); +extern void ARMul_StoreWordN(ARMul_State* state, ARMword address, ARMword data); +extern void ARMul_StoreHalfWord(ARMul_State* state, ARMword address, ARMword data); +extern void ARMul_StoreByte(ARMul_State* state, ARMword address, ARMword data); + +extern ARMword ARMul_SwapWord(ARMul_State* state, ARMword address, ARMword data); +extern ARMword ARMul_SwapByte(ARMul_State* state, ARMword address, ARMword data); + +extern void ARMul_Icycles(ARMul_State* state, unsigned number, ARMword address); +extern void ARMul_Ccycles(ARMul_State* state, unsigned number, ARMword address); + +extern ARMword ARMul_ReadWord(ARMul_State* state, ARMword address); +extern ARMword ARMul_ReadByte(ARMul_State* state, ARMword address); +extern void ARMul_WriteWord(ARMul_State* state, ARMword address, ARMword data); +extern void ARMul_WriteByte(ARMul_State* state, ARMword address, ARMword data); + +extern ARMword ARMul_MemAccess(ARMul_State* state, ARMword, ARMword, ARMword, ARMword, ARMword, ARMword, ARMword, ARMword, ARMword, ARMword); @@ -739,66 +644,40 @@ extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword, #define ARMul_CP15_DBCON_E1 0x000c #define ARMul_CP15_DBCON_E0 0x0003 -extern unsigned ARMul_CoProInit (ARMul_State * state); -extern void ARMul_CoProExit (ARMul_State * state); -extern void ARMul_CoProAttach (ARMul_State * state, unsigned number, - ARMul_CPInits * init, ARMul_CPExits * exit, - ARMul_LDCs * ldc, ARMul_STCs * stc, - ARMul_MRCs * mrc, ARMul_MCRs * mcr, - ARMul_MRRCs * mrrc, ARMul_MCRRs * mcrr, - ARMul_CDPs * cdp, - ARMul_CPReads * read, ARMul_CPWrites * write); -extern void ARMul_CoProDetach (ARMul_State * state, unsigned number); +extern unsigned ARMul_CoProInit(ARMul_State* state); +extern void ARMul_CoProExit(ARMul_State* state); +extern void ARMul_CoProAttach (ARMul_State* state, unsigned number, + ARMul_CPInits* init, ARMul_CPExits* exit, + ARMul_LDCs* ldc, ARMul_STCs* stc, + ARMul_MRCs* mrc, ARMul_MCRs* mcr, + ARMul_MRRCs* mrrc, ARMul_MCRRs* mcrr, + ARMul_CDPs* cdp, + ARMul_CPReads* read, ARMul_CPWrites* write); +extern void ARMul_CoProDetach(ARMul_State* state, unsigned number); /***************************************************************************\ * Definitons of things in the host environment * \***************************************************************************/ -extern unsigned ARMul_OSInit (ARMul_State * state); -extern void ARMul_OSExit (ARMul_State * state); +extern unsigned ARMul_OSInit(ARMul_State* state); +extern void ARMul_OSExit(ARMul_State* state); #ifdef __cplusplus extern "C" { #endif -extern unsigned ARMul_OSHandleSWI (ARMul_State * state, ARMword number); +extern unsigned ARMul_OSHandleSWI(ARMul_State* state, ARMword number); #ifdef __cplusplus } #endif -extern ARMword ARMul_OSLastErrorP (ARMul_State * state); +extern ARMword ARMul_OSLastErrorP(ARMul_State* state); -extern ARMword ARMul_Debug (ARMul_State * state, ARMword pc, ARMword instr); -extern unsigned ARMul_OSException (ARMul_State * state, ARMword vector, - ARMword pc); +extern ARMword ARMul_Debug(ARMul_State* state, ARMword pc, ARMword instr); +extern unsigned ARMul_OSException(ARMul_State* state, ARMword vector, ARMword pc); extern int rdi_log; -/***************************************************************************\ -* Host-dependent stuff * -\***************************************************************************/ - -#ifdef macintosh -pascal void SpinCursor (short increment); /* copied from CursorCtl.h */ -# define HOURGLASS SpinCursor( 1 ) -# define HOURGLASS_RATE 1023 /* 2^n - 1 */ -#endif - -//teawater add for arm2x86 2005.02.14------------------------------------------- -/*ywc 2005-03-31*/ -/* -#include "arm2x86.h" -#include "arm2x86_dp.h" -#include "arm2x86_movl.h" -#include "arm2x86_psr.h" -#include "arm2x86_shift.h" -#include "arm2x86_mem.h" -#include "arm2x86_mul.h" -#include "arm2x86_test.h" -#include "arm2x86_other.h" -#include "list.h" -#include "tb.h" -*/ enum ConditionCode { EQ = 0, NE = 1, @@ -851,32 +730,16 @@ enum ConditionCode { #define ZBIT_SHIFT 30 #define CBIT_SHIFT 29 #define VBIT_SHIFT 28 -#ifdef DBCT -//teawater change for local tb branch directly jump 2005.10.18------------------ -#include "dbct/list.h" -#include "dbct/arm2x86.h" -#include "dbct/arm2x86_dp.h" -#include "dbct/arm2x86_movl.h" -#include "dbct/arm2x86_psr.h" -#include "dbct/arm2x86_shift.h" -#include "dbct/arm2x86_mem.h" -#include "dbct/arm2x86_mul.h" -#include "dbct/arm2x86_test.h" -#include "dbct/arm2x86_other.h" -#include "dbct/arm2x86_coproc.h" -#include "dbct/tb.h" -#endif -//AJ2D-------------------------------------------------------------------------- -//AJ2D-------------------------------------------------------------------------- + #define SKYEYE_OUTREGS(fd) { fprintf ((fd), "R %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,C %x,S %x,%x,%x,%x,%x,%x,%x,M %x,B %x,E %x,I %x,P %x,T %x,L %x,D %x,",\ state->Reg[0],state->Reg[1],state->Reg[2],state->Reg[3], \ state->Reg[4],state->Reg[5],state->Reg[6],state->Reg[7], \ state->Reg[8],state->Reg[9],state->Reg[10],state->Reg[11], \ state->Reg[12],state->Reg[13],state->Reg[14],state->Reg[15], \ - state->Cpsr, state->Spsr[0], state->Spsr[1], state->Spsr[2],\ + state->Cpsr, state->Spsr[0], state->Spsr[1], state->Spsr[2],\ state->Spsr[3],state->Spsr[4], state->Spsr[5], state->Spsr[6],\ - state->Mode,state->Bank,state->ErrorCode,state->instr,state->pc,\ - state->temp,state->loaded,state->decoded);} + state->Mode,state->Bank,state->ErrorCode,state->instr,state->pc,\ + state->temp,state->loaded,state->decoded);} #define SKYEYE_OUTMOREREGS(fd) { fprintf ((fd),"\ RUs %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\ @@ -914,17 +777,17 @@ RUn %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x\n",\ #define SA1110 0x6901b110 #define SA1100 0x4401a100 -#define PXA250 0x69052100 -#define PXA270 0x69054110 -//#define PXA250 0x69052903 +#define PXA250 0x69052100 +#define PXA270 0x69054110 +//#define PXA250 0x69052903 // 0x69052903; //PXA250 B1 from intel 278522-001.pdf -extern void ARMul_UndefInstr (ARMul_State *, ARMword); -extern void ARMul_FixCPSR (ARMul_State *, ARMword, ARMword); -extern void ARMul_FixSPSR (ARMul_State *, ARMword, ARMword); -extern void ARMul_ConsolePrint (ARMul_State *, const char *, ...); -extern void ARMul_SelectProcessor (ARMul_State *, unsigned); +extern void ARMul_UndefInstr(ARMul_State*, ARMword); +extern void ARMul_FixCPSR(ARMul_State*, ARMword, ARMword); +extern void ARMul_FixSPSR(ARMul_State*, ARMword, ARMword); +extern void ARMul_ConsolePrint(ARMul_State*, const char*, ...); +extern void ARMul_SelectProcessor(ARMul_State*, unsigned); #define DIFF_LOG 0 #define SAVE_LOG 0 -- cgit v1.2.3 From d26b7146cefd6a2048cb5093c8419a761b06ae69 Mon Sep 17 00:00:00 2001 From: bunnei Date: Sat, 13 Dec 2014 01:24:03 -0500 Subject: ARM: Pull some SkyEye fixes from 3dmoo. --- src/core/arm/interpreter/armemu.cpp | 896 ++++++++++++++------------- src/core/arm/skyeye_common/armdefs.h | 1 + src/core/arm/skyeye_common/vfp/vfpsingle.cpp | 7 +- 3 files changed, 485 insertions(+), 419 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 825955ade..ec40881f8 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -1166,7 +1166,7 @@ mainswitch: else if ((((int)BITS(21, 27)) == 0x3e) && ((int)BITS(4, 6) == 0x1)) { //(ARMword)(instr<<(31-(n))) >> ((31-(n))+(m)) unsigned msb ,tmp_rn, tmp_rd, dst; - msb = tmp_rd = tmp_rn = dst = 0; + tmp_rd = tmp_rn = dst = 0; Rd = BITS(12, 15); Rn = BITS(0, 3); lsb = BITS(7, 11); @@ -1737,7 +1737,7 @@ mainswitch: //chy 2006-02-15 if in user mode, can not set cpsr 0:23 //from p165 of ARMARM book state->Cpsr = GETSPSR (state->Bank); - //ARMul_CPSRAltered (state); + ARMul_CPSRAltered (state); #else rhs = DPRegRHS; temp = LHS & rhs; @@ -1877,7 +1877,7 @@ mainswitch: /* TEQP reg */ #ifdef MODE32 state->Cpsr = GETSPSR (state->Bank); - //ARMul_CPSRAltered (state); + ARMul_CPSRAltered (state); #else rhs = DPRegRHS; temp = LHS ^ rhs; @@ -1993,7 +1993,7 @@ mainswitch: /* CMPP reg. */ #ifdef MODE32 state->Cpsr = GETSPSR (state->Bank); - //ARMul_CPSRAltered (state); + ARMul_CPSRAltered (state); #else rhs = DPRegRHS; temp = LHS - rhs; @@ -2112,7 +2112,7 @@ mainswitch: if (DESTReg == 15) { #ifdef MODE32 state->Cpsr = GETSPSR (state->Bank); - //ARMul_CPSRAltered (state); + ARMul_CPSRAltered (state); #else rhs = DPRegRHS; temp = LHS + rhs; @@ -2200,17 +2200,57 @@ mainswitch: Handle_Store_Double (state, instr); break; } + if (BITS(4, 11) == 0xF9) { //strexd + u32 l = LHSReg; + + bool enter = false; + + if (state->currentexval == (u32)ARMul_ReadWord(state, state->currentexaddr)&& + state->currentexvald == (u32)ARMul_ReadWord(state, state->currentexaddr + 4)) + enter = true; + + + //todo bug this and STREXD and LDREXD http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360e/CHDGJGGC.html + + + if (enter) { + ARMul_StoreWordN(state, LHS, state->Reg[RHSReg]); + ARMul_StoreWordN(state,LHS + 4 , state->Reg[RHSReg + 1]); + state->Reg[DESTReg] = 0; + } else { + state->Reg[DESTReg] = 1; + } + + break; + } #endif dest = DPRegRHS; WRITEDEST (dest); break; - case 0x1b: /* MOVS reg */ + case 0x1B: /* MOVS reg */ #ifdef MODET + /* ldrexd ichfly */ + if (BITS(0, 11) == 0xF9F) { //strexd + lhs = LHS; + + state->currentexaddr = lhs; + state->currentexval = (u32)ARMul_ReadWord(state, lhs); + state->currentexvald = (u32)ARMul_ReadWord(state, lhs + 4); + + state->Reg[DESTReg] = ARMul_LoadWordN(state, lhs); + state->Reg[DESTReg] = ARMul_LoadWordN(state, lhs + 4); + break; + } + if ((BITS (4, 11) & 0xF9) == 0x9) /* LDR register offset, write-back, up, pre indexed. */ LHPREUPWB (); /* Continue with remaining instruction decoding. */ + + + + #endif dest = DPSRegRHS; WRITESDEST (dest); @@ -2297,12 +2337,12 @@ mainswitch: if (state->currentexval == (u32)ARMul_LoadHalfWord(state, state->currentexaddr))enter = true; - ARMul_StoreHalfWord(state, lhs, RHS); //StoreWord(state, lhs, RHS) if (state->Aborted) { TAKEABORT; } if (enter) { + ARMul_StoreHalfWord(state, lhs, RHS); state->Reg[DESTReg] = 0; } else { state->Reg[DESTReg] = 1; @@ -2520,7 +2560,7 @@ mainswitch: /* TSTP immed. */ #ifdef MODE32 state->Cpsr = GETSPSR (state->Bank); - //ARMul_CPSRAltered (state); + ARMul_CPSRAltered (state); #else temp = LHS & DPImmRHS; SETR15PSR (temp); @@ -2547,7 +2587,7 @@ mainswitch: /* TEQP immed. */ #ifdef MODE32 state->Cpsr = GETSPSR (state->Bank); - //ARMul_CPSRAltered (state); + ARMul_CPSRAltered (state); #else temp = LHS ^ DPImmRHS; SETR15PSR (temp); @@ -2568,7 +2608,7 @@ mainswitch: /* CMPP immed. */ #ifdef MODE32 state->Cpsr = GETSPSR (state->Bank); - //ARMul_CPSRAltered (state); + ARMul_CPSRAltered (state); #else temp = LHS - DPImmRHS; SETR15PSR (temp); @@ -2604,7 +2644,7 @@ mainswitch: /* CMNP immed. */ #ifdef MODE32 state->Cpsr = GETSPSR (state->Bank); - //ARMul_CPSRAltered (state); + ARMul_CPSRAltered (state); #else temp = LHS + DPImmRHS; SETR15PSR (temp); @@ -3055,17 +3095,14 @@ mainswitch: case 0x68: /* Store Word, No WriteBack, Post Inc, Reg. */ //ichfly PKHBT PKHTB todo check this - if ((instr & 0x70) == 0x10) //pkhbt - { + if ((instr & 0x70) == 0x10) { //pkhbt u8 idest = BITS(12, 15); u8 rfis = BITS(16, 19); u8 rlast = BITS(0, 3); u8 ishi = BITS(7,11); state->Reg[idest] = (state->Reg[rfis] & 0xFFFF) | ((state->Reg[rlast] << ishi) & 0xFFFF0000); break; - } - else if ((instr & 0x70) == 0x50)//pkhtb - { + } else if ((instr & 0x70) == 0x50) { //pkhtb u8 idest = BITS(12, 15); u8 rfis = BITS(16, 19); u8 rlast = BITS(0, 3); @@ -3073,8 +3110,7 @@ mainswitch: if (ishi == 0)ishi = 0x20; state->Reg[idest] = (((int)(state->Reg[rlast]) >> (int)(ishi))& 0xFFFF) | ((state->Reg[rfis]) & 0xFFFF0000); break; - } - else if (BIT (4)) { + } else if (BIT (4)) { #ifdef MODE32 if (state->is_v6 && handle_v6_insn (state, instr)) @@ -3686,13 +3722,11 @@ mainswitch: /* Co-Processor Data Transfers. */ case 0xc4: - if ((instr & 0x0FF00FF0) == 0xC400B10) //vmov BIT(0-3), BIT(12-15), BIT(16-20), vmov d0, r0, r0 - { + if ((instr & 0x0FF00FF0) == 0xC400B10) { //vmov BIT(0-3), BIT(12-15), BIT(16-20), vmov d0, r0, r0 state->ExtReg[BITS(0, 3) << 1] = state->Reg[BITS(12, 15)]; state->ExtReg[(BITS(0, 3) << 1) + 1] = state->Reg[BITS(16, 20)]; break; - } - else if (state->is_v5) { + } else if (state->is_v5) { /* Reading from R15 is UNPREDICTABLE. */ if (BITS (12, 15) == 15 || BITS (16, 19) == 15) ARMul_UndefInstr (state, instr); @@ -3712,22 +3746,18 @@ mainswitch: break; case 0xc5: - if ((instr & 0x00000FF0) == 0xB10) //vmov BIT(12-15), BIT(16-20), BIT(0-3) vmov r0, r0, d0 - { + if ((instr & 0x00000FF0) == 0xB10) { //vmov BIT(12-15), BIT(16-20), BIT(0-3) vmov r0, r0, d0 state->Reg[BITS(12, 15)] = state->ExtReg[BITS(0, 3) << 1]; state->Reg[BITS(16, 19)] = state->ExtReg[(BITS(0, 3) << 1) + 1]; break; - } - else if (state->is_v5) { + } else if (state->is_v5) { /* Writes to R15 are UNPREDICATABLE. */ if (DESTReg == 15 || LHSReg == 15) ARMul_UndefInstr (state, instr); /* Is access to the coprocessor allowed ? */ - else if (!CP_ACCESS_ALLOWED(state, CPNum)) - { + else if (!CP_ACCESS_ALLOWED(state, CPNum)) { ARMul_UndefInstr(state, instr); - } - else { + } else { /* MRRC, ARMv5TE and up */ ARMul_MRRC (state, instr, &DEST, &(state->Reg[LHSReg])); break; @@ -4565,7 +4595,7 @@ out: #ifdef MODE32 if (state->Bank > 0) { state->Cpsr = state->Spsr[state->Bank]; - //ARMul_CPSRAltered (state); + ARMul_CPSRAltered (state); } #ifdef MODET if (TFLAG) @@ -5256,7 +5286,7 @@ L_ldm_s_makeabort: //chy 2006-02-16 , should not consider system mode, don't conside 26bit mode if (state->Mode != USER26MODE && state->Mode != USER32MODE ) { state->Cpsr = GETSPSR (state->Bank); - //ARMul_CPSRAltered (state); + ARMul_CPSRAltered (state); } WriteR15 (state, PC); @@ -5641,30 +5671,9 @@ L_stm_s_takeabort: static int handle_v6_insn (ARMul_State * state, ARMword instr) { - switch (BITS (20, 27)) { - //ichfly - case 0x66: //UQSUB8 - if ((instr & 0x0FF00FF0) == 0x06600FF0) { - u32 rd = (instr >> 12) & 0xF; - u32 rm = (instr >> 16) & 0xF; - u32 rn = (instr >> 0) & 0xF; - u32 subfrom = state->Reg[rm]; - u32 tosub = state->Reg[rn]; + ARMword lhs, temp; - u8 b1 = (u8)((u8)(subfrom)-(u8)(tosub)); - if (b1 > (u8)(subfrom)) b1 = 0; - u8 b2 = (u8)((u8)(subfrom >> 8) - (u8)(tosub >> 8)); - if (b2 > (u8)(subfrom >> 8)) b2 = 0; - u8 b3 = (u8)((u8)(subfrom >> 16) - (u8)(tosub >> 16)); - if (b3 > (u8)(subfrom >> 16)) b3 = 0; - u8 b4 = (u8)((u8)(subfrom >> 24) - (u8)(tosub >> 24)); - if (b4 > (u8)(subfrom >> 24)) b4 = 0; - state->Reg[rd] = (u32)(b1 | b2 << 8 | b3 << 16 | b4 << 24); - return 1; - } else { - printf("UQSUB8 decoding fail %08X",instr); - } -#if 0 + switch (BITS (20, 27)) { case 0x03: printf ("Unhandled v6 insn: ldr\n"); break; @@ -5678,9 +5687,43 @@ L_stm_s_takeabort: printf ("Unhandled v6 insn: smi\n"); break; case 0x18: + if (BITS(4, 7) == 0x9) { + /* strex */ + u32 l = LHSReg; + u32 r = RHSReg; + lhs = LHS; + + bool enter = false; + + if (state->currentexval == (u32)ARMul_ReadWord(state, state->currentexaddr))enter = true; + //StoreWord(state, lhs, RHS) + if (state->Aborted) { + TAKEABORT; + } + + if (enter) { + ARMul_StoreWordS(state, lhs, RHS); + state->Reg[DESTReg] = 0; + } + else { + state->Reg[DESTReg] = 1; + } + + return 1; + } printf ("Unhandled v6 insn: strex\n"); break; case 0x19: + /* ldrex */ + if (BITS(4, 7) == 0x9) { + lhs = LHS; + + state->currentexaddr = lhs; + state->currentexval = ARMul_ReadWord(state, lhs); + + LoadWord(state, instr, lhs); + return 1; + } printf ("Unhandled v6 insn: ldrex\n"); break; case 0x1a: @@ -5690,9 +5733,52 @@ L_stm_s_takeabort: printf ("Unhandled v6 insn: ldrexd\n"); break; case 0x1c: + if (BITS(4, 7) == 0x9) { + /* strexb */ + lhs = LHS; + + bool enter = false; + + if (state->currentexval == (u32)ARMul_ReadByte(state, state->currentexaddr))enter = true; + + BUSUSEDINCPCN; + if (state->Aborted) { + TAKEABORT; + } + + + if (enter) { + ARMul_StoreByte(state, lhs, RHS); + state->Reg[DESTReg] = 0; + } + else { + state->Reg[DESTReg] = 1; + } + + //printf("In %s, strexb not implemented\n", __FUNCTION__); + UNDEF_LSRBPC; + /* WRITESDEST (dest); */ + return 1; + } printf ("Unhandled v6 insn: strexb\n"); break; case 0x1d: + if ((BITS(4, 7)) == 0x9) { + /* ldrexb */ + temp = LHS; + LoadByte(state, instr, temp, LUNSIGNED); + + state->currentexaddr = temp; + state->currentexval = (u32)ARMul_ReadByte(state, temp); + + //state->Reg[BITS(12, 15)] = ARMul_LoadByte(state, state->Reg[BITS(16, 19)]); + //printf("ldrexb\n"); + //printf("instr is %x rm is %d\n", instr, BITS(16, 19)); + //exit(-1); + + //printf("In %s, ldrexb not implemented\n", __FUNCTION__); + return 1; + } printf ("Unhandled v6 insn: ldrexb\n"); break; case 0x1e: @@ -5713,10 +5799,8 @@ L_stm_s_takeabort: case 0x3f: printf ("Unhandled v6 insn: rbit\n"); break; -#endif case 0x61: - if ((instr & 0xFF0) == 0xf70)//ssub16 - { + if ((instr & 0xFF0) == 0xf70) { //ssub16 u8 tar = BITS(12, 15); u8 src1 = BITS(16, 19); u8 src2 = BITS(0, 3); @@ -5724,11 +5808,9 @@ L_stm_s_takeabort: s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); s16 b1 = (state->Reg[src2] & 0xFFFF); s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); - state->Reg[tar] = ((a1 - a2) & 0xFFFF) | (((b1 - b2)&0xFFFF)<< 0x10); + state->Reg[tar] = ((a1 - a2) & 0xFFFF) | (((b1 - b2) & 0xFFFF) << 0x10); return 1; - } - else if ((instr & 0xFF0) == 0xf10)//sadd16 - { + } else if ((instr & 0xFF0) == 0xf10) { //sadd16 u8 tar = BITS(12, 15); u8 src1 = BITS(16, 19); u8 src2 = BITS(0, 3); @@ -5736,11 +5818,9 @@ L_stm_s_takeabort: s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); s16 b1 = (state->Reg[src2] & 0xFFFF); s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); - state->Reg[tar] = ((a1 + a2) & 0xFFFF) | (((b1 + b2)&0xFFFF)<< 0x10); + state->Reg[tar] = ((a1 + a2) & 0xFFFF) | (((b1 + b2) & 0xFFFF) << 0x10); return 1; - } - else if ((instr & 0xFF0) == 0xf50)//ssax - { + } else if ((instr & 0xFF0) == 0xf50) { //ssax u8 tar = BITS(12, 15); u8 src1 = BITS(16, 19); u8 src2 = BITS(0, 3); @@ -5748,11 +5828,9 @@ L_stm_s_takeabort: s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); s16 b1 = (state->Reg[src2] & 0xFFFF); s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); - state->Reg[tar] = ((a1 + b2) & 0xFFFF) | (((a2 - b1) & 0xFFFF) << 0x10); + state->Reg[tar] = ((a1 + b2) & 0xFFFF) | (((a2 - b1) & 0xFFFF) << 0x10); return 1; - } - else if ((instr & 0xFF0) == 0xf30)//sasx - { + } else if ((instr & 0xFF0) == 0xf30) { //sasx u8 tar = BITS(12, 15); u8 src1 = BITS(16, 19); u8 src2 = BITS(0, 3); @@ -5760,14 +5838,12 @@ L_stm_s_takeabort: s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); s16 b1 = (state->Reg[src2] & 0xFFFF); s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); - state->Reg[tar] = ((a1 - b2) & 0xFFFF) | (((a2 + b1) & 0xFFFF) << 0x10); + state->Reg[tar] = ((a1 - b2) & 0xFFFF) | (((a2 + b1) & 0xFFFF) << 0x10); return 1; - } - else printf ("Unhandled v6 insn: sadd/ssub\n"); + } else printf ("Unhandled v6 insn: sadd/ssub/ssax/sasx\n"); break; case 0x62: - if ((instr & 0xFF0) == 0xf70)//QSUB16 - { + if ((instr & 0xFF0) == 0xf70) { //QSUB16 u8 tar = BITS(12, 15); u8 src1 = BITS(16, 19); u8 src2 = BITS(0, 3); @@ -5783,9 +5859,7 @@ L_stm_s_takeabort: if (res2 < 0x7FFF) res2 = -0x8000; state->Reg[tar] = (res1 & 0xFFFF) | ((res2 & 0xFFFF) << 0x10); return 1; - } - else if ((instr & 0xFF0) == 0xf10)//QADD16 - { + } else if ((instr & 0xFF0) == 0xf10) { //QADD16 u8 tar = BITS(12, 15); u8 src1 = BITS(16, 19); u8 src2 = BITS(0, 3); @@ -5801,29 +5875,234 @@ L_stm_s_takeabort: if (res2 < 0x7FFF) res2 = -0x8000; state->Reg[tar] = ((res1) & 0xFFFF) | (((res2) & 0xFFFF) << 0x10); return 1; - } - else printf ("Unhandled v6 insn: qadd/qsub\n"); + } else printf ("Unhandled v6 insn: qadd16/qsub16\n"); break; -#if 0 case 0x63: printf ("Unhandled v6 insn: shadd/shsub\n"); break; case 0x65: - printf ("Unhandled v6 insn: uadd/usub\n"); + { + u32 rd = (instr >> 12) & 0xF; + u32 rn = (instr >> 16) & 0xF; + u32 rm = (instr >> 0) & 0xF; + u32 from = state->Reg[rn]; + u32 to = state->Reg[rm]; + + if ((instr & 0xFF0) == 0xF10 || (instr & 0xFF0) == 0xF70) { // UADD16/USUB16 + u32 h1, h2; + state->Cpsr &= 0xfff0ffff; + if ((instr & 0x0F0) == 0x070) { // USUB16 + h1 = ((u16)from - (u16)to); + h2 = ((u16)(from >> 16) - (u16)(to >> 16)); + if (!(h1 & 0xffff0000)) state->Cpsr |= (3 << 16); + if (!(h2 & 0xffff0000)) state->Cpsr |= (3 << 18); + } + else { // UADD16 + h1 = ((u16)from + (u16)to); + h2 = ((u16)(from >> 16) + (u16)(to >> 16)); + if (h1 & 0xffff0000) state->Cpsr |= (3 << 16); + if (h2 & 0xffff0000) state->Cpsr |= (3 << 18); + } + state->Reg[rd] = (u32)((h1 & 0xffff) | ((h2 & 0xffff) << 16)); + return 1; + } + else + if ((instr & 0xFF0) == 0xF90 || (instr & 0xFF0) == 0xFF0) { // UADD8/USUB8 + u32 b1, b2, b3, b4; + state->Cpsr &= 0xfff0ffff; + if ((instr & 0x0F0) == 0x0F0) { // USUB8 + b1 = ((u8)from - (u8)to); + b2 = ((u8)(from >> 8) - (u8)(to >> 8)); + b3 = ((u8)(from >> 16) - (u8)(to >> 16)); + b4 = ((u8)(from >> 24) - (u8)(to >> 24)); + if (!(b1 & 0xffffff00)) state->Cpsr |= (1 << 16); + if (!(b2 & 0xffffff00)) state->Cpsr |= (1 << 17); + if (!(b3 & 0xffffff00)) state->Cpsr |= (1 << 18); + if (!(b4 & 0xffffff00)) state->Cpsr |= (1 << 19); + } + else { // UADD8 + b1 = ((u8)from + (u8)to); + b2 = ((u8)(from >> 8) + (u8)(to >> 8)); + b3 = ((u8)(from >> 16) + (u8)(to >> 16)); + b4 = ((u8)(from >> 24) + (u8)(to >> 24)); + if (b1 & 0xffffff00) state->Cpsr |= (1 << 16); + if (b2 & 0xffffff00) state->Cpsr |= (1 << 17); + if (b3 & 0xffffff00) state->Cpsr |= (1 << 18); + if (b4 & 0xffffff00) state->Cpsr |= (1 << 19); + } + state->Reg[rd] = (u32)(b1 | (b2 & 0xff) << 8 | (b3 & 0xff) << 16 | (b4 & 0xff) << 24); + return 1; + } + } + printf("Unhandled v6 insn: uasx/usax\n"); break; case 0x66: - printf ("Unhandled v6 insn: uqadd/uqsub\n"); + if ((instr & 0x0FF00FF0) == 0x06600FF0) { //uqsub8 + u32 rd = (instr >> 12) & 0xF; + u32 rm = (instr >> 16) & 0xF; + u32 rn = (instr >> 0) & 0xF; + u32 subfrom = state->Reg[rm]; + u32 tosub = state->Reg[rn]; + + u8 b1 = (u8)((u8)(subfrom)-(u8)(tosub)); + if (b1 > (u8)(subfrom)) b1 = 0; + u8 b2 = (u8)((u8)(subfrom >> 8) - (u8)(tosub >> 8)); + if (b2 > (u8)(subfrom >> 8)) b2 = 0; + u8 b3 = (u8)((u8)(subfrom >> 16) - (u8)(tosub >> 16)); + if (b3 > (u8)(subfrom >> 16)) b3 = 0; + u8 b4 = (u8)((u8)(subfrom >> 24) - (u8)(tosub >> 24)); + if (b4 > (u8)(subfrom >> 24)) b4 = 0; + state->Reg[rd] = (u32)(b1 | b2 << 8 | b3 << 16 | b4 << 24); + return 1; + } else { + printf ("Unhandled v6 insn: uqsub16\n"); + } break; case 0x67: printf ("Unhandled v6 insn: uhadd/uhsub\n"); break; case 0x68: - printf ("Unhandled v6 insn: pkh/sxtab/selsxtb\n"); + { + u32 rd = (instr >> 12) & 0xF; + u32 rn = (instr >> 16) & 0xF; + u32 rm = (instr >> 0) & 0xF; + u32 from = state->Reg[rn]; + u32 to = state->Reg[rm]; + u32 cpsr = state->Cpsr; + if ((instr & 0xFF0) == 0xFB0) { // SEL + u32 result; + if (cpsr & (1 << 16)) + result = from & 0xff; + else + result = to & 0xff; + if (cpsr & (1 << 17)) + result |= from & 0x0000ff00; + else + result |= to & 0x0000ff00; + if (cpsr & (1 << 18)) + result |= from & 0x00ff0000; + else + result |= to & 0x00ff0000; + if (cpsr & (1 << 19)) + result |= from & 0xff000000; + else + result |= to & 0xff000000; + state->Reg[rd] = result; + return 1; + } + } + printf("Unhandled v6 insn: pkh/sxtab/selsxtb\n"); break; -#endif + case 0x6a: { + ARMword Rm; + int ror = -1; + + switch (BITS(4, 11)) { + case 0x07: + ror = 0; + break; + case 0x47: + ror = 8; + break; + case 0x87: + ror = 16; + break; + case 0xc7: + ror = 24; + break; + + case 0x01: + case 0xf3: + //ichfly + //SSAT16 + { + u8 tar = BITS(12, 15); + u8 src = BITS(0, 3); + u8 val = BITS(16, 19) + 1; + s16 a1 = (state->Reg[src]); + s16 a2 = (state->Reg[src] >> 0x10); + s16 min = (s16)(0x8000 >> (16 - val)); + s16 max = 0x7FFF >> (16 - val); + if (min > a1) a1 = min; + if (max < a1) a1 = max; + if (min > a2) a2 = min; + if (max < a2) a2 = max; + u32 temp2 = ((u32)(a2)) << 0x10; + state->Reg[tar] = (a1 & 0xFFFF) | (temp2); + } + + return 1; + default: + break; + } + + if (ror == -1) { + if (BITS(4, 6) == 0x7) { + printf("Unhandled v6 insn: ssat\n"); + return 0; + } + break; + } + + Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF); + if (Rm & 0x80) + Rm |= 0xffffff00; + + if (BITS(16, 19) == 0xf) + /* SXTB */ + state->Reg[BITS(12, 15)] = Rm; + else + /* SXTAB */ + state->Reg[BITS(12, 15)] += Rm; + + return 1; + } + case 0x6b: { + ARMword Rm; + int ror = -1; + + switch (BITS(4, 11)) { + case 0x07: + ror = 0; + break; + case 0x47: + ror = 8; + break; + case 0x87: + ror = 16; + break; + case 0xc7: + ror = 24; + break; + + case 0xf3: + DEST = ((RHS & 0xFF) << 24) | ((RHS & 0xFF00)) << 8 | ((RHS & 0xFF0000) >> 8) | ((RHS & 0xFF000000) >> 24); + return 1; + case 0xfb: + DEST = ((RHS & 0xFF) << 8) | ((RHS & 0xFF00)) >> 8 | ((RHS & 0xFF0000) << 8) | ((RHS & 0xFF000000) >> 8); + return 1; + default: + break; + } + + if (ror == -1) + break; + + Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF); + if (Rm & 0x8000) + Rm |= 0xffff0000; + + if (BITS(16, 19) == 0xf) + /* SXTH */ + state->Reg[BITS(12, 15)] = Rm; + else + /* SXTAH */ + state->Reg[BITS(12, 15)] = state->Reg[BITS(16, 19)] + Rm; + + return 1; + } case 0x6c: - if ((instr & 0xf03f0) == 0xf0070) //uxtb16 - { + if ((instr & 0xf03f0) == 0xf0070) { //uxtb16 u8 src1 = BITS(0, 3); u8 tar = BITS(12, 15); u32 base = state->Reg[src1]; @@ -5831,13 +6110,119 @@ L_stm_s_takeabort: u32 in = ((base << (32 - shamt)) | (base >> shamt)); state->Reg[tar] = in & 0x00FF00FF; return 1; - } - else - printf ("Unhandled v6 insn: uxtb16/uxtab16\n"); + } else + printf ("Unhandled v6 insn: uxtab16\n"); break; + case 0x6e: { + ARMword Rm; + int ror = -1; + + switch (BITS(4, 11)) { + case 0x07: + ror = 0; + break; + case 0x47: + ror = 8; + break; + case 0x87: + ror = 16; + break; + case 0xc7: + ror = 24; + break; + + case 0x01: + case 0xf3: + //ichfly + //USAT16 + { + u8 tar = BITS(12, 15); + u8 src = BITS(0, 3); + u8 val = BITS(16, 19); + s16 a1 = (state->Reg[src]); + s16 a2 = (state->Reg[src] >> 0x10); + s16 max = 0xFFFF >> (16 - val); + if (max < a1) a1 = max; + if (max < a2) a2 = max; + u32 temp2 = ((u32)(a2)) << 0x10; + state->Reg[tar] = (a1 & 0xFFFF) | (temp2); + } + return 1; + default: + break; + } + + if (ror == -1) { + if (BITS(4, 6) == 0x7) { + printf("Unhandled v6 insn: usat\n"); + return 0; + } + break; + } + + Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF); + + if (BITS(16, 19) == 0xf) + /* UXTB */ + state->Reg[BITS(12, 15)] = Rm; + else + /* UXTAB */ + state->Reg[BITS(12, 15)] = state->Reg[BITS(16, 19)] + Rm; + + return 1; + } + + case 0x6f: { + ARMword Rm; + int ror = -1; + + switch (BITS(4, 11)) { + case 0x07: + ror = 0; + break; + case 0x47: + ror = 8; + break; + case 0x87: + ror = 16; + break; + case 0xc7: + ror = 24; + break; + + case 0xfb: + printf("Unhandled v6 insn: revsh\n"); + return 0; + default: + break; + } + + if (ror == -1) + break; + + Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF); + + /* UXT */ + /* state->Reg[BITS (12, 15)] = Rm; */ + /* dyf add */ + if (BITS(16, 19) == 0xf) { + state->Reg[BITS(12, 15)] = (Rm >> (8 * BITS(10, 11))) & 0x0000FFFF; + } + else { + /* UXTAH */ + /* state->Reg[BITS (12, 15)] = state->Reg [BITS (16, 19)] + Rm; */ + // printf("rd is %x rn is %x rm is %x rotate is %x\n", state->Reg[BITS (12, 15)], state->Reg[BITS (16, 19)] + // , Rm, BITS(10, 11)); + // printf("icounter is %lld\n", state->NumInstrs); + state->Reg[BITS(12, 15)] = (state->Reg[BITS(16, 19)] >> (8 * (BITS(10, 11)))) + Rm; + // printf("rd is %x\n", state->Reg[BITS (12, 15)]); + // exit(-1); + } + + return 1; + } case 0x70: - if ((instr & 0xf0d0) == 0xf010)//smuad //ichfly - { + if ((instr & 0xf0d0) == 0xf010) { //smuad //ichfly u8 tar = BITS(16, 19); u8 src1 = BITS(0, 3); u8 src2 = BITS(8, 11); @@ -5849,9 +6234,7 @@ L_stm_s_takeabort: state->Reg[tar] = a1*a2 + b1*b2; return 1; - } - else if ((instr & 0xf0d0) == 0xf050)//smusd - { + } else if ((instr & 0xf0d0) == 0xf050) { //smusd u8 tar = BITS(16, 19); u8 src1 = BITS(0, 3); u8 src2 = BITS(8, 11); @@ -5862,9 +6245,7 @@ L_stm_s_takeabort: s16 b2 = swap ? (state->Reg[src2] & 0xFFFF) : ((state->Reg[src2] >> 0x10) & 0xFFFF); state->Reg[tar] = a1*a2 - b1*b2; return 1; - } - else if ((instr & 0xd0) == 0x10)//smlad - { + } else if ((instr & 0xd0) == 0x10) { //smlad u8 tar = BITS(16, 19); u8 src1 = BITS(0, 3); u8 src2 = BITS(8, 11); @@ -5879,8 +6260,7 @@ L_stm_s_takeabort: s16 b2 = swap ? (state->Reg[src2] & 0xFFFF) : ((state->Reg[src2] >> 0x10) & 0xFFFF); state->Reg[tar] = a1*a2 + b1*b2 + a3; return 1; - } - else printf ("Unhandled v6 insn: smuad/smusd/smlad/smlsd\n"); + } else printf ("Unhandled v6 insn: smuad/smusd/smlad/smlsd\n"); break; case 0x74: printf ("Unhandled v6 insn: smlald/smlsld\n"); @@ -5891,332 +6271,18 @@ L_stm_s_takeabort: case 0x78: printf ("Unhandled v6 insn: usad/usada8\n"); break; -#if 0 case 0x7a: printf ("Unhandled v6 insn: usbfx\n"); break; case 0x7c: printf ("Unhandled v6 insn: bfc/bfi\n"); break; -#endif - - - /* add new instr for arm v6. */ - ARMword lhs, temp; - case 0x18: { /* ORR reg */ - /* dyf add armv6 instr strex 2010.9.17 */ - if (BITS (4, 7) == 0x9) { - u32 l = LHSReg; - u32 r = RHSReg; - lhs = LHS; - - bool enter = false; - - if (state->currentexval == (u32)ARMul_ReadWord(state, state->currentexaddr))enter = true; - ARMul_StoreWordS(state, lhs, RHS); - //StoreWord(state, lhs, RHS) - if (state->Aborted) { - TAKEABORT; - } - - if (enter) { - state->Reg[DESTReg] = 0; - } else { - state->Reg[DESTReg] = 1; - } - - return 1; - } - break; - } - - case 0x19: { /* orrs reg */ - /* dyf add armv6 instr ldrex */ - if (BITS (4, 7) == 0x9) { - lhs = LHS; - - state->currentexaddr = lhs; - state->currentexval = ARMul_ReadWord(state, lhs); - - LoadWord (state, instr, lhs); - return 1; - } - break; - } - - case 0x1c: { /* BIC reg */ - /* dyf add for STREXB */ - if (BITS (4, 7) == 0x9) { - lhs = LHS; - - bool enter = false; - - if (state->currentexval == (u32)ARMul_ReadByte(state, state->currentexaddr))enter = true; - - ARMul_StoreByte (state, lhs, RHS); - BUSUSEDINCPCN; - if (state->Aborted) { - TAKEABORT; - } - - - if (enter) { - state->Reg[DESTReg] = 0; - } else { - state->Reg[DESTReg] = 1; - } - - //printf("In %s, strexb not implemented\n", __FUNCTION__); - UNDEF_LSRBPC; - /* WRITESDEST (dest); */ - return 1; - } - break; - } - - case 0x1d: { /* BICS reg */ - if ((BITS (4, 7)) == 0x9) { - /* ldrexb */ - temp = LHS; - LoadByte (state, instr, temp, LUNSIGNED); - - state->currentexaddr = temp; - state->currentexval = (u32)ARMul_ReadByte(state, temp); - - //state->Reg[BITS(12, 15)] = ARMul_LoadByte(state, state->Reg[BITS(16, 19)]); - //printf("ldrexb\n"); - //printf("instr is %x rm is %d\n", instr, BITS(16, 19)); - //exit(-1); - - //printf("In %s, ldrexb not implemented\n", __FUNCTION__); - return 1; - } - break; - } - /* add end */ - - case 0x6a: { - ARMword Rm; - int ror = -1; - - switch (BITS (4, 11)) { - case 0x07: - ror = 0; - break; - case 0x47: - ror = 8; - break; - case 0x87: - ror = 16; - break; - case 0xc7: - ror = 24; - break; - - case 0x01: - case 0xf3: - //ichfly - //SSAT16 - { - u8 tar = BITS(12,15); - u8 src = BITS(0, 3); - u8 val = BITS(16, 19) + 1; - s16 a1 = (state->Reg[src]); - s16 a2 = (state->Reg[src] >> 0x10); - s16 min = (s16)(0x8000) >> (16 - val); - s16 max = 0x7FFF >> (16 - val); - if (min > a1) a1 = min; - if (max < a1) a1 = max; - if (min > a2) a2 = min; - if (max < a2) a2 = max; - u32 temp2 = ((u32)(a2)) << 0x10; - state->Reg[tar] = (a1&0xFFFF) | (temp2); - } - - return 1; - default: - break; - } - - if (ror == -1) { - if (BITS (4, 6) == 0x7) { - printf ("Unhandled v6 insn: ssat\n"); - return 0; - } - break; - } - - Rm = ((state->Reg[BITS (0, 3)] >> ror) & 0xFF); - if (Rm & 0x80) - Rm |= 0xffffff00; - - if (BITS (16, 19) == 0xf) - /* SXTB */ - state->Reg[BITS (12, 15)] = Rm; - else - /* SXTAB */ - state->Reg[BITS (12, 15)] += Rm; - } - return 1; - - case 0x6b: { - ARMword Rm; - int ror = -1; - - switch (BITS (4, 11)) { - case 0x07: - ror = 0; - break; - case 0x47: - ror = 8; - break; - case 0x87: - ror = 16; - break; - case 0xc7: - ror = 24; - break; - - case 0xf3: - DEST = ((RHS & 0xFF) << 24) | ((RHS & 0xFF00)) << 8 | ((RHS & 0xFF0000) >> 8) | ((RHS & 0xFF000000) >> 24); - return 1; - case 0xfb: - DEST = ((RHS & 0xFF) << 8) | ((RHS & 0xFF00)) >> 8 | ((RHS & 0xFF0000) << 8) | ((RHS & 0xFF000000) >> 8); - return 1; - default: - break; - } - - if (ror == -1) - break; - - Rm = ((state->Reg[BITS (0, 3)] >> ror) & 0xFFFF); - if (Rm & 0x8000) - Rm |= 0xffff0000; - - if (BITS (16, 19) == 0xf) - /* SXTH */ - state->Reg[BITS (12, 15)] = Rm; - else - /* SXTAH */ - state->Reg[BITS (12, 15)] = state->Reg[BITS (16, 19)] + Rm; - } - return 1; - - case 0x6e: { - ARMword Rm; - int ror = -1; - - switch (BITS (4, 11)) { - case 0x07: - ror = 0; - break; - case 0x47: - ror = 8; - break; - case 0x87: - ror = 16; - break; - case 0xc7: - ror = 24; - break; - - case 0x01: - case 0xf3: - //ichfly - //USAT16 - { - u8 tar = BITS(12, 15); - u8 src = BITS(0, 3); - u8 val = BITS(16, 19); - s16 a1 = (state->Reg[src]); - s16 a2 = (state->Reg[src] >> 0x10); - s16 max = 0xFFFF >> (16 - val); - if (max < a1) a1 = max; - if (max < a2) a2 = max; - u32 temp2 = ((u32)(a2)) << 0x10; - state->Reg[tar] = (a1 & 0xFFFF) | (temp2); - } - return 1; - default: - break; - } - - if (ror == -1) { - if (BITS (4, 6) == 0x7) { - printf ("Unhandled v6 insn: usat\n"); - return 0; - } - break; - } - - Rm = ((state->Reg[BITS (0, 3)] >> ror) & 0xFF); - - if (BITS (16, 19) == 0xf) - /* UXTB */ - state->Reg[BITS (12, 15)] = Rm; - else - /* UXTAB */ - state->Reg[BITS (12, 15)] = state->Reg[BITS (16, 19)] + Rm; - } - return 1; - - case 0x6f: { - ARMword Rm; - int ror = -1; - - switch (BITS (4, 11)) { - case 0x07: - ror = 0; - break; - case 0x47: - ror = 8; - break; - case 0x87: - ror = 16; - break; - case 0xc7: - ror = 24; - break; - - case 0xfb: - printf ("Unhandled v6 insn: revsh\n"); - return 0; - default: - break; - } - - if (ror == -1) - break; - - Rm = ((state->Reg[BITS (0, 3)] >> ror) & 0xFFFF); - - /* UXT */ - /* state->Reg[BITS (12, 15)] = Rm; */ - /* dyf add */ - if (BITS (16, 19) == 0xf) { - state->Reg[BITS (12, 15)] = (Rm >> (8 * BITS(10, 11))) & 0x0000FFFF; - } else { - /* UXTAH */ - /* state->Reg[BITS (12, 15)] = state->Reg [BITS (16, 19)] + Rm; */ -// printf("rd is %x rn is %x rm is %x rotate is %x\n", state->Reg[BITS (12, 15)], state->Reg[BITS (16, 19)] -// , Rm, BITS(10, 11)); -// printf("icounter is %lld\n", state->NumInstrs); - state->Reg[BITS (12, 15)] = (state->Reg[BITS (16, 19)] >> (8 * (BITS(10, 11)))) + Rm; -// printf("rd is %x\n", state->Reg[BITS (12, 15)]); -// exit(-1); - } - } - return 1; - -#if 0 case 0x84: printf ("Unhandled v6 insn: srs\n"); break; -#endif default: break; } printf("Unhandled v6 insn: UNKNOWN: %08x %08X\n", instr, BITS(20, 27)); return 0; - } + } \ No newline at end of file diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h index 8343aaa01..9e62255aa 100644 --- a/src/core/arm/skyeye_common/armdefs.h +++ b/src/core/arm/skyeye_common/armdefs.h @@ -281,6 +281,7 @@ struct ARMul_State ARMword currentexaddr; ARMword currentexval; + ARMword currentexvald; ARMword servaddr; unsigned NextInstr; diff --git a/src/core/arm/skyeye_common/vfp/vfpsingle.cpp b/src/core/arm/skyeye_common/vfp/vfpsingle.cpp index 07d0c1f44..871900497 100644 --- a/src/core/arm/skyeye_common/vfp/vfpsingle.cpp +++ b/src/core/arm/skyeye_common/vfp/vfpsingle.cpp @@ -522,8 +522,7 @@ static s64 vfp_single_to_doubleintern(ARMul_State* state, s32 m, u32 fpscr) //ic if (tm == VFP_QNAN) vdd.significand |= VFP_DOUBLE_SIGNIFICAND_QNAN; goto pack_nan; - } - else if (tm & VFP_ZERO) + } else if (tm & VFP_ZERO) vdd.exponent = 0; else vdd.exponent = vsm.exponent + (1023 - 127); @@ -620,7 +619,7 @@ static u32 vfp_single_ftoui(ARMul_State* state, int sd, int unused, s32 m, u32 f if (vsm.exponent >= 127 + 32) { d = vsm.sign ? 0 : 0xffffffff; exceptions = FPSCR_IOC; - } else if (vsm.exponent >= 127 - 1) { + } else if (vsm.exponent >= 127) { int shift = 127 + 31 - vsm.exponent; u32 rem, incr = 0; @@ -705,7 +704,7 @@ static u32 vfp_single_ftosi(ARMul_State* state, int sd, int unused, s32 m, u32 f if (vsm.sign) d = ~d; exceptions |= FPSCR_IOC; - } else if (vsm.exponent >= 127 - 1) { + } else if (vsm.exponent >= 127) { int shift = 127 + 31 - vsm.exponent; u32 rem, incr = 0; -- cgit v1.2.3 From 2b0acd36e19f27720b2740efbe68d0f7598ee5c5 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 14 Dec 2014 23:00:29 -0500 Subject: armemu: Fix UXTB16 Rotation bits are 10 and 11, not 9 and 10. --- src/core/arm/interpreter/armemu.cpp | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index ec40881f8..33ebc7986 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6101,18 +6101,18 @@ L_stm_s_takeabort: return 1; } - case 0x6c: - if ((instr & 0xf03f0) == 0xf0070) { //uxtb16 - u8 src1 = BITS(0, 3); - u8 tar = BITS(12, 15); - u32 base = state->Reg[src1]; - u32 shamt = BITS(9,10)* 8; - u32 in = ((base << (32 - shamt)) | (base >> shamt)); - state->Reg[tar] = in & 0x00FF00FF; - return 1; - } else - printf ("Unhandled v6 insn: uxtab16\n"); - break; + case 0x6c: + if ((instr & 0xf03f0) == 0xf0070) { //uxtb16 + u8 rm_idx = BITS(0, 3); + u8 rd_idx = BITS(12, 15); + u32 rm_val = state->Reg[rm_idx]; + u32 rotation = BITS(10, 11) * 8; + u32 in = ((rm_val << (32 - rotation)) | (rm_val >> rotation)); + state->Reg[rd_idx] = in & 0x00FF00FF; + return 1; + } else + printf ("Unhandled v6 insn: uxtab16\n"); + break; case 0x6e: { ARMword Rm; int ror = -1; -- cgit v1.2.3 From 1c7f77334c32fe304b1db22f6bae210c837ba40f Mon Sep 17 00:00:00 2001 From: Lioncash Date: Mon, 15 Dec 2014 20:16:38 -0500 Subject: armemu: Implement UXTAB16 --- src/core/arm/interpreter/armemu.cpp | 35 +++++++++++++++++++++++++---------- 1 file changed, 25 insertions(+), 10 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 33ebc7986..b846fbe9c 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6101,17 +6101,32 @@ L_stm_s_takeabort: return 1; } - case 0x6c: - if ((instr & 0xf03f0) == 0xf0070) { //uxtb16 - u8 rm_idx = BITS(0, 3); - u8 rd_idx = BITS(12, 15); - u32 rm_val = state->Reg[rm_idx]; - u32 rotation = BITS(10, 11) * 8; - u32 in = ((rm_val << (32 - rotation)) | (rm_val >> rotation)); - state->Reg[rd_idx] = in & 0x00FF00FF; + case 0x6c: // UXTB16 and UXTAB16 + { + const u8 rm_idx = BITS(0, 3); + const u8 rn_idx = BITS(16, 19); + const u8 rd_idx = BITS(12, 15); + const u32 rm_val = state->Reg[rm_idx]; + const u32 rn_val = state->Reg[rn_idx]; + const u32 rotation = BITS(10, 11) * 8; + const u32 rotated_rm = ((rm_val << (32 - rotation)) | (rm_val >> rotation)); + + // UXTB16 + if ((instr & 0xf03f0) == 0xf0070) { + state->Reg[rd_idx] = rotated_rm & 0x00FF00FF; + } + else { // UXTAB16 + const u8 lo_rotated = (rotated_rm & 0xFF); + const u16 lo_result = (rn_val & 0xFFFF) + (u16)lo_rotated; + + const u8 hi_rotated = (rotated_rm >> 16) & 0xFF; + const u16 hi_result = (rn_val >> 16) + (u16)hi_rotated; + + state->Reg[rd_idx] = ((hi_result << 16) | (lo_result & 0xFFFF)); + } + return 1; - } else - printf ("Unhandled v6 insn: uxtab16\n"); + } break; case 0x6e: { ARMword Rm; -- cgit v1.2.3 From 49817e89d9b496be0d38cbf92890d01f94f855b8 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Mon, 15 Dec 2014 23:46:58 -0500 Subject: armemu: Join QADD16 and QSUB16 together. The only difference between these ops is one adds and one subtracts. Everything is literally the same. --- src/core/arm/interpreter/armemu.cpp | 70 ++++++++++++++++++++----------------- 1 file changed, 37 insertions(+), 33 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 33ebc7986..8ee8badd5 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -5842,40 +5842,44 @@ L_stm_s_takeabort: return 1; } else printf ("Unhandled v6 insn: sadd/ssub/ssax/sasx\n"); break; - case 0x62: - if ((instr & 0xFF0) == 0xf70) { //QSUB16 - u8 tar = BITS(12, 15); - u8 src1 = BITS(16, 19); - u8 src2 = BITS(0, 3); - s16 a1 = (state->Reg[src1] & 0xFFFF); - s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); - s16 b1 = (state->Reg[src2] & 0xFFFF); - s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); - s32 res1 = (a1 - b1); - s32 res2 = (a2 - b2); - if (res1 > 0x7FFF) res1 = 0x7FFF; - if (res2 > 0x7FFF) res2 = 0x7FFF; - if (res1 < 0x7FFF) res1 = -0x8000; - if (res2 < 0x7FFF) res2 = -0x8000; - state->Reg[tar] = (res1 & 0xFFFF) | ((res2 & 0xFFFF) << 0x10); - return 1; - } else if ((instr & 0xFF0) == 0xf10) { //QADD16 - u8 tar = BITS(12, 15); - u8 src1 = BITS(16, 19); - u8 src2 = BITS(0, 3); - s16 a1 = (state->Reg[src1] & 0xFFFF); - s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); - s16 b1 = (state->Reg[src2] & 0xFFFF); - s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); - s32 res1 = (a1 + b1); - s32 res2 = (a2 + b2); - if (res1 > 0x7FFF) res1 = 0x7FFF; - if (res2 > 0x7FFF) res2 = 0x7FFF; - if (res1 < 0x7FFF) res1 = -0x8000; - if (res2 < 0x7FFF) res2 = -0x8000; - state->Reg[tar] = ((res1) & 0xFFFF) | (((res2) & 0xFFFF) << 0x10); + case 0x62: // QSUB16 and QADD16 + if ((instr & 0xFF0) == 0xf70 || (instr & 0xFF0) == 0xf10) { + const u8 rd_idx = BITS(12, 15); + const u8 rn_idx = BITS(16, 19); + const u8 rm_idx = BITS(0, 3); + const s16 rm_lo = (state->Reg[rm_idx] & 0xFFFF); + const s16 rm_hi = ((state->Reg[rm_idx] >> 0x10) & 0xFFFF); + const s16 rn_lo = (state->Reg[rn_idx] & 0xFFFF); + const s16 rn_hi = ((state->Reg[rn_idx] >> 0x10) & 0xFFFF); + + s32 lo_result; + s32 hi_result; + + // QSUB16 + if ((instr & 0xFF0) == 0xf70) { + lo_result = (rn_lo - rm_lo); + hi_result = (rn_hi - rm_hi); + } + else { // QADD16 + lo_result = (rn_lo + rm_lo); + hi_result = (rn_hi + rm_hi); + } + + if (lo_result > 0x7FFF) + lo_result = 0x7FFF; + else if (lo_result < 0x7FFF) + lo_result = -0x8000; + + if (hi_result > 0x7FFF) + hi_result = 0x7FFF; + else if (hi_result < 0x7FFF) + hi_result = -0x8000; + + state->Reg[rd_idx] = (lo_result & 0xFFFF) | ((hi_result & 0xFFFF) << 16); return 1; - } else printf ("Unhandled v6 insn: qadd16/qsub16\n"); + } else { + printf("Unhandled v6 insn: %08x", BITS(20, 27)); + } break; case 0x63: printf ("Unhandled v6 insn: shadd/shsub\n"); -- cgit v1.2.3 From 4c537992290cf143bd9d4585c164698f1473376d Mon Sep 17 00:00:00 2001 From: Lioncash Date: Mon, 15 Dec 2014 23:48:39 -0500 Subject: armemu: Fix lower-bound signed saturation clamping for QADD16/QSUB16. --- src/core/arm/interpreter/armemu.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 8ee8badd5..e46b4d15b 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -5867,12 +5867,12 @@ L_stm_s_takeabort: if (lo_result > 0x7FFF) lo_result = 0x7FFF; - else if (lo_result < 0x7FFF) + else if (lo_result < -0x8000) lo_result = -0x8000; if (hi_result > 0x7FFF) hi_result = 0x7FFF; - else if (hi_result < 0x7FFF) + else if (hi_result < -0x8000) hi_result = -0x8000; state->Reg[rd_idx] = (lo_result & 0xFFFF) | ((hi_result & 0xFFFF) << 16); -- cgit v1.2.3 From 0f9e3baf39efdfe8a6604a473405764e936a897d Mon Sep 17 00:00:00 2001 From: Lioncash Date: Tue, 16 Dec 2014 01:59:46 -0500 Subject: armemu: Join SMUAD, SMUSD, and SMLAD --- src/core/arm/interpreter/armemu.cpp | 73 ++++++++++++++++++------------------- 1 file changed, 35 insertions(+), 38 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 33ebc7986..967506f45 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6222,45 +6222,42 @@ L_stm_s_takeabort: return 1; } case 0x70: - if ((instr & 0xf0d0) == 0xf010) { //smuad //ichfly - u8 tar = BITS(16, 19); - u8 src1 = BITS(0, 3); - u8 src2 = BITS(8, 11); - u8 swap = BIT(5); - s16 a1 = (state->Reg[src1] & 0xFFFF); - s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); - s16 b1 = swap ? ((state->Reg[src2] >> 0x10) & 0xFFFF) : (state->Reg[src2] & 0xFFFF); - s16 b2 = swap ? (state->Reg[src2] & 0xFFFF) : ((state->Reg[src2] >> 0x10) & 0xFFFF); - state->Reg[tar] = a1*a2 + b1*b2; - return 1; - - } else if ((instr & 0xf0d0) == 0xf050) { //smusd - u8 tar = BITS(16, 19); - u8 src1 = BITS(0, 3); - u8 src2 = BITS(8, 11); - u8 swap = BIT(5); - s16 a1 = (state->Reg[src1] & 0xFFFF); - s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); - s16 b1 = swap ? ((state->Reg[src2] >> 0x10) & 0xFFFF) : (state->Reg[src2] & 0xFFFF); - s16 b2 = swap ? (state->Reg[src2] & 0xFFFF) : ((state->Reg[src2] >> 0x10) & 0xFFFF); - state->Reg[tar] = a1*a2 - b1*b2; - return 1; - } else if ((instr & 0xd0) == 0x10) { //smlad - u8 tar = BITS(16, 19); - u8 src1 = BITS(0, 3); - u8 src2 = BITS(8, 11); - u8 src3 = BITS(12, 15); - u8 swap = BIT(5); - - u32 a3 = state->Reg[src3]; - - s16 a1 = (state->Reg[src1] & 0xFFFF); - s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); - s16 b1 = swap ? ((state->Reg[src2] >> 0x10) & 0xFFFF) : (state->Reg[src2] & 0xFFFF); - s16 b2 = swap ? (state->Reg[src2] & 0xFFFF) : ((state->Reg[src2] >> 0x10) & 0xFFFF); - state->Reg[tar] = a1*a2 + b1*b2 + a3; + // ichfly + // SMUAD, SMUSD, SMLAD + if ((instr & 0xf0d0) == 0xf010 || (instr & 0xf0d0) == 0xf050 || (instr & 0xd0) == 0x10) { + const u8 rd_idx = BITS(16, 19); + const u8 rn_idx = BITS(0, 3); + const u8 rm_idx = BITS(8, 11); + const bool do_swap = (BIT(5) == 1); + + u32 rm_val = state->Reg[rm_idx]; + const u32 rn_val = state->Reg[rn_idx]; + + if (do_swap) + rm_val = (((rm_val & 0xFFFF) << 16) | (rm_val >> 16)); + + const s16 rm_lo = (rm_val & 0xFFFF); + const s16 rm_hi = ((rm_val >> 16) & 0xFFFF); + const s16 rn_lo = (rn_val & 0xFFFF); + const s16 rn_hi = ((rn_val >> 16) & 0xFFFF); + + // SMUAD + if ((instr & 0xf0d0) == 0xf010) { + state->Reg[rd_idx] = (rn_lo * rn_hi) + (rm_lo * rm_hi); + } + // SMUSD + else if ((instr & 0xf0d0) == 0xf050) { + state->Reg[rd_idx] = (rn_lo * rn_hi) - (rm_lo * rm_hi); + } + // SMLAD + else { + const u8 ra_idx = BITS(12, 15); + state->Reg[rd_idx] = (rn_lo * rn_hi) + (rm_lo * rm_hi) + (s32)state->Reg[ra_idx]; + } return 1; - } else printf ("Unhandled v6 insn: smuad/smusd/smlad/smlsd\n"); + } else { + printf ("Unhandled v6 insn: smlsd\n"); + } break; case 0x74: printf ("Unhandled v6 insn: smlald/smlsld\n"); -- cgit v1.2.3 From d5bcddb77c9922f8345dd4014031662ab17e2b33 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Tue, 16 Dec 2014 02:03:48 -0500 Subject: armemu: Fix SMUAD, SMUSD, and SMLAD Wrong values were being multiplied together. --- src/core/arm/interpreter/armemu.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 967506f45..e4159ceb0 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6243,16 +6243,16 @@ L_stm_s_takeabort: // SMUAD if ((instr & 0xf0d0) == 0xf010) { - state->Reg[rd_idx] = (rn_lo * rn_hi) + (rm_lo * rm_hi); + state->Reg[rd_idx] = (rn_lo * rm_lo) + (rn_hi * rm_hi); } // SMUSD else if ((instr & 0xf0d0) == 0xf050) { - state->Reg[rd_idx] = (rn_lo * rn_hi) - (rm_lo * rm_hi); + state->Reg[rd_idx] = (rn_lo * rm_lo) - (rn_hi * rm_hi); } // SMLAD else { const u8 ra_idx = BITS(12, 15); - state->Reg[rd_idx] = (rn_lo * rn_hi) + (rm_lo * rm_hi) + (s32)state->Reg[ra_idx]; + state->Reg[rd_idx] = (rn_lo * rm_lo) + (rn_hi * rm_hi) + (s32)state->Reg[ra_idx]; } return 1; } else { -- cgit v1.2.3 From 2ed03c10e03bbd0f513d157c577f1c75ae9ede5b Mon Sep 17 00:00:00 2001 From: Normmatt Date: Tue, 16 Dec 2014 05:53:19 -0500 Subject: armemu: Fix FSUBS bug where NaN shouldn't be negated --- src/core/arm/skyeye_common/vfp/vfpsingle.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'src/core/arm') diff --git a/src/core/arm/skyeye_common/vfp/vfpsingle.cpp b/src/core/arm/skyeye_common/vfp/vfpsingle.cpp index 871900497..f5410fd9a 100644 --- a/src/core/arm/skyeye_common/vfp/vfpsingle.cpp +++ b/src/core/arm/skyeye_common/vfp/vfpsingle.cpp @@ -1148,7 +1148,10 @@ static u32 vfp_single_fsub(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) /* * Subtraction is addition with one sign inverted. */ - return vfp_single_fadd(state, sd, sn, vfp_single_packed_negate(m), fpscr); + if (m != 0x7FC00000) // Only negate if m isn't NaN. + m = vfp_single_packed_negate(m); + + return vfp_single_fadd(state, sd, sn, m, fpscr); } /* -- cgit v1.2.3 From 9c127f4a01fee95632336d53269cdf1c64ea37a3 Mon Sep 17 00:00:00 2001 From: Normmatt Date: Tue, 16 Dec 2014 05:56:01 -0500 Subject: armemu: Fix FTOUI NaN sign. --- src/core/arm/skyeye_common/vfp/vfpsingle.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/core/arm') diff --git a/src/core/arm/skyeye_common/vfp/vfpsingle.cpp b/src/core/arm/skyeye_common/vfp/vfpsingle.cpp index f5410fd9a..6c33d8b78 100644 --- a/src/core/arm/skyeye_common/vfp/vfpsingle.cpp +++ b/src/core/arm/skyeye_common/vfp/vfpsingle.cpp @@ -614,7 +614,7 @@ static u32 vfp_single_ftoui(ARMul_State* state, int sd, int unused, s32 m, u32 f exceptions |= FPSCR_IDC; if (tm & VFP_NAN) - vsm.sign = 0; + vsm.sign = 1; if (vsm.exponent >= 127 + 32) { d = vsm.sign ? 0 : 0xffffffff; -- cgit v1.2.3 From efebd5589a53f3f21f36d1a3c92a4e567bd89c8e Mon Sep 17 00:00:00 2001 From: Normmatt Date: Wed, 17 Dec 2014 02:28:12 -0500 Subject: armemu: Fix SXTAH --- src/core/arm/interpreter/armemu.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 5752d116f..843323293 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6057,7 +6057,8 @@ L_stm_s_takeabort: return 1; } - case 0x6b: { + case 0x6b: + { ARMword Rm; int ror = -1; @@ -6088,7 +6089,7 @@ L_stm_s_takeabort: if (ror == -1) break; - Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF); + Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF; if (Rm & 0x8000) Rm |= 0xffff0000; -- cgit v1.2.3 From b5dbd6f2a27cc85a7262920942dd1c78fff21bb5 Mon Sep 17 00:00:00 2001 From: Normmatt Date: Wed, 17 Dec 2014 02:54:24 -0500 Subject: armemu: Fix SXTAB --- src/core/arm/interpreter/armemu.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 843323293..cffbae7e7 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6044,7 +6044,7 @@ L_stm_s_takeabort: break; } - Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF); + Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF; if (Rm & 0x80) Rm |= 0xffffff00; @@ -6053,7 +6053,7 @@ L_stm_s_takeabort: state->Reg[BITS(12, 15)] = Rm; else /* SXTAB */ - state->Reg[BITS(12, 15)] += Rm; + state->Reg[BITS(12, 15)] = state->Reg[BITS(16, 19)] + Rm; return 1; } -- cgit v1.2.3 From bc81cc94901b72bf68e8241cf65e0e830b43fc93 Mon Sep 17 00:00:00 2001 From: Normmatt Date: Wed, 17 Dec 2014 02:56:58 -0500 Subject: armemu: Fix UXTAB/UXTAH --- src/core/arm/interpreter/armemu.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index cffbae7e7..a62658b7c 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6176,7 +6176,7 @@ L_stm_s_takeabort: break; } - Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF); + Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF; if (BITS(16, 19) == 0xf) /* UXTB */ @@ -6216,13 +6216,13 @@ L_stm_s_takeabort: if (ror == -1) break; - Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF); + Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF; /* UXT */ /* state->Reg[BITS (12, 15)] = Rm; */ /* dyf add */ if (BITS(16, 19) == 0xf) { - state->Reg[BITS(12, 15)] = (Rm >> (8 * BITS(10, 11))) & 0x0000FFFF; + state->Reg[BITS(12, 15)] = Rm; } else { /* UXTAH */ @@ -6230,7 +6230,7 @@ L_stm_s_takeabort: // printf("rd is %x rn is %x rm is %x rotate is %x\n", state->Reg[BITS (12, 15)], state->Reg[BITS (16, 19)] // , Rm, BITS(10, 11)); // printf("icounter is %lld\n", state->NumInstrs); - state->Reg[BITS(12, 15)] = (state->Reg[BITS(16, 19)] >> (8 * (BITS(10, 11)))) + Rm; + state->Reg[BITS(12, 15)] = state->Reg[BITS(16, 19)] + Rm; // printf("rd is %x\n", state->Reg[BITS (12, 15)]); // exit(-1); } -- cgit v1.2.3 From 8045df14d2494e34c064b58bc1772101014172a2 Mon Sep 17 00:00:00 2001 From: Normmatt Date: Wed, 17 Dec 2014 03:01:42 -0500 Subject: armemu: Implement REVSH --- src/core/arm/interpreter/armemu.cpp | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index a62658b7c..71cae3db0 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6076,10 +6076,10 @@ L_stm_s_takeabort: ror = 24; break; - case 0xf3: + case 0xf3: // REV DEST = ((RHS & 0xFF) << 24) | ((RHS & 0xFF00)) << 8 | ((RHS & 0xFF0000) >> 8) | ((RHS & 0xFF000000) >> 24); return 1; - case 0xfb: + case 0xfb: // REV16 DEST = ((RHS & 0xFF) << 8) | ((RHS & 0xFF00)) >> 8 | ((RHS & 0xFF0000) << 8) | ((RHS & 0xFF000000) >> 8); return 1; default: @@ -6206,9 +6206,13 @@ L_stm_s_takeabort: ror = 24; break; - case 0xfb: - printf("Unhandled v6 insn: revsh\n"); - return 0; + case 0xfb: // REVSH + { + DEST = ((RHS & 0xFF) << 8) | ((RHS & 0xFF00) >> 8); + if (DEST & 0x8000) + DEST |= 0xffff0000; + return 1; + } default: break; } -- cgit v1.2.3 From 73211dc8fef861570b9e5ce422d20f36e6174967 Mon Sep 17 00:00:00 2001 From: Normmatt Date: Wed, 17 Dec 2014 03:13:44 -0500 Subject: armemu: Fix PKHTB --- src/core/arm/interpreter/armemu.cpp | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 71cae3db0..de178a890 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -3103,12 +3103,18 @@ mainswitch: state->Reg[idest] = (state->Reg[rfis] & 0xFFFF) | ((state->Reg[rlast] << ishi) & 0xFFFF0000); break; } else if ((instr & 0x70) == 0x50) { //pkhtb - u8 idest = BITS(12, 15); - u8 rfis = BITS(16, 19); - u8 rlast = BITS(0, 3); - u8 ishi = BITS(7, 11); - if (ishi == 0)ishi = 0x20; - state->Reg[idest] = (((int)(state->Reg[rlast]) >> (int)(ishi))& 0xFFFF) | ((state->Reg[rfis]) & 0xFFFF0000); + const u8 rd_idx = BITS(12, 15); + const u8 rn_idx = BITS(16, 19); + const u8 rm_idx = BITS(0, 3); + const u8 imm5 = BITS(7, 11); + + ARMword val; + if (imm5 >= 32) + val = (state->Reg[rm_idx] >> 31); + else + val = (state->Reg[rm_idx] >> imm5); + + state->Reg[rd_idx] = (val & 0xFFFF) | ((state->Reg[rn_idx]) & 0xFFFF0000); break; } else if (BIT (4)) { #ifdef MODE32 -- cgit v1.2.3 From 5289a496a75bd7abe4d18bfc586cb1cfac84fc48 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Wed, 17 Dec 2014 09:36:23 -0500 Subject: armemu: Fix SADD16 The lo and hi parts of the result were being constructed as a result of hi and lo halfword intermixing from the rm and rn regs. However the lo part of the result should be constructed only from the lo halfwords of rm and rn, and the hi part of the result should only be constructed from the hi halfwords of rm and rn. --- src/core/arm/interpreter/armemu.cpp | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 5752d116f..dbfb9d858 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -5811,14 +5811,15 @@ L_stm_s_takeabort: state->Reg[tar] = ((a1 - a2) & 0xFFFF) | (((b1 - b2) & 0xFFFF) << 0x10); return 1; } else if ((instr & 0xFF0) == 0xf10) { //sadd16 - u8 tar = BITS(12, 15); - u8 src1 = BITS(16, 19); - u8 src2 = BITS(0, 3); - s16 a1 = (state->Reg[src1] & 0xFFFF); - s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); - s16 b1 = (state->Reg[src2] & 0xFFFF); - s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); - state->Reg[tar] = ((a1 + a2) & 0xFFFF) | (((b1 + b2) & 0xFFFF) << 0x10); + const u8 rd_idx = BITS(12, 15); + const u8 rm_idx = BITS(0, 3); + const u8 rn_idx = BITS(16, 19); + const s16 rm_lo = (state->Reg[rm_idx] & 0xFFFF); + const s16 rm_hi = ((state->Reg[rm_idx] >> 16) & 0xFFFF); + const s16 rn_lo = (state->Reg[rn_idx] & 0xFFFF); + const s16 rn_hi = ((state->Reg[rn_idx] >> 16) & 0xFFFF); + + state->Reg[rd_idx] = ((rn_lo + rm_lo) & 0xFFFF) | (((rn_hi + rm_hi) & 0xFFFF) << 16); return 1; } else if ((instr & 0xFF0) == 0xf50) { //ssax u8 tar = BITS(12, 15); -- cgit v1.2.3 From 2d91164bb9aa24829381f2518faed9abbdd4d6fa Mon Sep 17 00:00:00 2001 From: Lioncash Date: Wed, 17 Dec 2014 10:05:26 -0500 Subject: armemu: Narrow the scope of some variables in handle_v6_insn There's no reason to have these in the outer-most scope. --- src/core/arm/interpreter/armemu.cpp | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 5752d116f..0d1b2e60e 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -5669,11 +5669,8 @@ L_stm_s_takeabort: /* Attempt to emulate an ARMv6 instruction. Returns non-zero upon success. */ - static int - handle_v6_insn (ARMul_State * state, ARMword instr) { - ARMword lhs, temp; - - switch (BITS (20, 27)) { + static int handle_v6_insn(ARMul_State* state, ARMword instr) { + switch (BITS(20, 27)) { case 0x03: printf ("Unhandled v6 insn: ldr\n"); break; @@ -5691,7 +5688,7 @@ L_stm_s_takeabort: /* strex */ u32 l = LHSReg; u32 r = RHSReg; - lhs = LHS; + u32 lhs = LHS; bool enter = false; @@ -5716,7 +5713,7 @@ L_stm_s_takeabort: case 0x19: /* ldrex */ if (BITS(4, 7) == 0x9) { - lhs = LHS; + u32 lhs = LHS; state->currentexaddr = lhs; state->currentexval = ARMul_ReadWord(state, lhs); @@ -5735,7 +5732,7 @@ L_stm_s_takeabort: case 0x1c: if (BITS(4, 7) == 0x9) { /* strexb */ - lhs = LHS; + u32 lhs = LHS; bool enter = false; @@ -5765,11 +5762,11 @@ L_stm_s_takeabort: case 0x1d: if ((BITS(4, 7)) == 0x9) { /* ldrexb */ - temp = LHS; - LoadByte(state, instr, temp, LUNSIGNED); + u32 lhs = LHS; + LoadByte(state, instr, lhs, LUNSIGNED); - state->currentexaddr = temp; - state->currentexval = (u32)ARMul_ReadByte(state, temp); + state->currentexaddr = lhs; + state->currentexval = (u32)ARMul_ReadByte(state, lhs); //state->Reg[BITS(12, 15)] = ARMul_LoadByte(state, state->Reg[BITS(16, 19)]); //printf("ldrexb\n"); -- cgit v1.2.3 From 5820dba6b7b24a0f23474ffd1d303961be398687 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Wed, 17 Dec 2014 12:13:35 -0500 Subject: armemu: Implement UMAAL --- src/core/arm/interpreter/armemu.cpp | 28 +++++++++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 5752d116f..5074542a4 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -1356,7 +1356,13 @@ mainswitch: } break; - case 0x04: /* SUB reg */ + case 0x04: /* SUB reg */ + // Signifies UMAAL + if (state->is_v6 && BITS(4, 7) == 0x09) { + if (handle_v6_insn(state, instr)) + break; + } + #ifdef MODET if (BITS (4, 7) == 0xB) { /* STRH immediate offset, no write-back, down, post indexed. */ @@ -5677,8 +5683,24 @@ L_stm_s_takeabort: case 0x03: printf ("Unhandled v6 insn: ldr\n"); break; - case 0x04: - printf ("Unhandled v6 insn: umaal\n"); + case 0x04: // UMAAL + { + const u8 rm_idx = BITS(8, 11); + const u8 rn_idx = BITS(0, 3); + const u8 rd_lo_idx = BITS(12, 15); + const u8 rd_hi_idx = BITS(16, 19); + + const u32 rm_val = state->Reg[rm_idx]; + const u32 rn_val = state->Reg[rn_idx]; + const u32 rd_lo_val = state->Reg[rd_lo_idx]; + const u32 rd_hi_val = state->Reg[rd_hi_idx]; + + const u64 result = (rn_val * rm_val) + rd_lo_val + rd_hi_val; + + state->Reg[rd_lo_idx] = (result & 0xFFFFFFFF); + state->Reg[rd_hi_idx] = ((result >> 32) & 0xFFFFFFFF); + return 1; + } break; case 0x06: printf ("Unhandled v6 insn: mls/str\n"); -- cgit v1.2.3 From 58dc5547333cfb946f3881eb746811794a0f39a7 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Wed, 17 Dec 2014 15:34:58 -0500 Subject: armemu: Fix SSUB16 Broken from the same reason SADD16 was. The lo part of the result should only be constructed from the lo halfwords of rm and rn. The hi part of the result should only be constructed from the hi halfwords of rm and rn. --- src/core/arm/interpreter/armemu.cpp | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 1a589e39c..2b5d8c68e 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -5801,14 +5801,14 @@ L_stm_s_takeabort: break; case 0x61: if ((instr & 0xFF0) == 0xf70) { //ssub16 - u8 tar = BITS(12, 15); - u8 src1 = BITS(16, 19); - u8 src2 = BITS(0, 3); - s16 a1 = (state->Reg[src1] & 0xFFFF); - s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); - s16 b1 = (state->Reg[src2] & 0xFFFF); - s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); - state->Reg[tar] = ((a1 - a2) & 0xFFFF) | (((b1 - b2) & 0xFFFF) << 0x10); + const u8 rd_idx = BITS(12, 15); + const u8 rm_idx = BITS(0, 3); + const u8 rn_idx = BITS(16, 19); + const s16 rn_lo = (state->Reg[rn_idx] & 0xFFFF); + const s16 rn_hi = ((state->Reg[rn_idx] >> 16) & 0xFFFF); + const s16 rm_lo = (state->Reg[rm_idx] & 0xFFFF); + const s16 rm_hi = ((state->Reg[rm_idx] >> 16) & 0xFFFF); + state->Reg[rd_idx] = ((rn_lo - rm_lo) & 0xFFFF) | (((rn_hi - rm_hi) & 0xFFFF) << 16); return 1; } else if ((instr & 0xFF0) == 0xf10) { //sadd16 const u8 rd_idx = BITS(12, 15); -- cgit v1.2.3 From 41fee1c94005f5848addb3da253b4f883b4b1a71 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Wed, 17 Dec 2014 17:53:53 -0500 Subject: armemu: Unset GE flags for UADD8 if results are < 0x100 Reference manual states these must be set to zero if this case is true. --- src/core/arm/interpreter/armemu.cpp | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 1a589e39c..b207416dd 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -5930,11 +5930,29 @@ L_stm_s_takeabort: b2 = ((u8)(from >> 8) + (u8)(to >> 8)); b3 = ((u8)(from >> 16) + (u8)(to >> 16)); b4 = ((u8)(from >> 24) + (u8)(to >> 24)); - if (b1 & 0xffffff00) state->Cpsr |= (1 << 16); - if (b2 & 0xffffff00) state->Cpsr |= (1 << 17); - if (b3 & 0xffffff00) state->Cpsr |= (1 << 18); - if (b4 & 0xffffff00) state->Cpsr |= (1 << 19); + + if (b1 & 0xffffff00) + state->Cpsr |= (1 << 16); + else + state->Cpsr &= ~(1 << 16); + + if (b2 & 0xffffff00) + state->Cpsr |= (1 << 17); + else + state->Cpsr &= ~(1 << 17); + + if (b3 & 0xffffff00) + state->Cpsr |= (1 << 18); + else + state->Cpsr &= ~(1 << 18); + + + if (b4 & 0xffffff00) + state->Cpsr |= (1 << 19); + else + state->Cpsr &= ~(1 << 19); } + state->Reg[rd] = (u32)(b1 | (b2 & 0xff) << 8 | (b3 & 0xff) << 16 | (b4 & 0xff) << 24); return 1; } -- cgit v1.2.3 From 85c318078db2e950696d86f9f49dad17f88bedcb Mon Sep 17 00:00:00 2001 From: Lioncash Date: Wed, 17 Dec 2014 21:14:42 -0500 Subject: armemu: Combine SSUB16, SADD16, SASX, and SSAX. --- src/core/arm/interpreter/armemu.cpp | 57 +++++++++++++++---------------------- 1 file changed, 23 insertions(+), 34 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 14330156b..c032c7168 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -5805,8 +5805,10 @@ L_stm_s_takeabort: case 0x3f: printf ("Unhandled v6 insn: rbit\n"); break; - case 0x61: - if ((instr & 0xFF0) == 0xf70) { //ssub16 + case 0x61: // SSUB16, SADD16, SSAX, and SASX + if ((instr & 0xFF0) == 0xf70 || (instr & 0xFF0) == 0xf10 || + (instr & 0xFF0) == 0xf50 || (instr & 0xFF0) == 0xf30) + { const u8 rd_idx = BITS(12, 15); const u8 rm_idx = BITS(0, 3); const u8 rn_idx = BITS(16, 19); @@ -5814,40 +5816,27 @@ L_stm_s_takeabort: const s16 rn_hi = ((state->Reg[rn_idx] >> 16) & 0xFFFF); const s16 rm_lo = (state->Reg[rm_idx] & 0xFFFF); const s16 rm_hi = ((state->Reg[rm_idx] >> 16) & 0xFFFF); - state->Reg[rd_idx] = ((rn_lo - rm_lo) & 0xFFFF) | (((rn_hi - rm_hi) & 0xFFFF) << 16); - return 1; - } else if ((instr & 0xFF0) == 0xf10) { //sadd16 - const u8 rd_idx = BITS(12, 15); - const u8 rm_idx = BITS(0, 3); - const u8 rn_idx = BITS(16, 19); - const s16 rm_lo = (state->Reg[rm_idx] & 0xFFFF); - const s16 rm_hi = ((state->Reg[rm_idx] >> 16) & 0xFFFF); - const s16 rn_lo = (state->Reg[rn_idx] & 0xFFFF); - const s16 rn_hi = ((state->Reg[rn_idx] >> 16) & 0xFFFF); - state->Reg[rd_idx] = ((rn_lo + rm_lo) & 0xFFFF) | (((rn_hi + rm_hi) & 0xFFFF) << 16); - return 1; - } else if ((instr & 0xFF0) == 0xf50) { //ssax - u8 tar = BITS(12, 15); - u8 src1 = BITS(16, 19); - u8 src2 = BITS(0, 3); - s16 a1 = (state->Reg[src1] & 0xFFFF); - s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); - s16 b1 = (state->Reg[src2] & 0xFFFF); - s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); - state->Reg[tar] = ((a1 + b2) & 0xFFFF) | (((a2 - b1) & 0xFFFF) << 0x10); - return 1; - } else if ((instr & 0xFF0) == 0xf30) { //sasx - u8 tar = BITS(12, 15); - u8 src1 = BITS(16, 19); - u8 src2 = BITS(0, 3); - s16 a1 = (state->Reg[src1] & 0xFFFF); - s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); - s16 b1 = (state->Reg[src2] & 0xFFFF); - s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); - state->Reg[tar] = ((a1 - b2) & 0xFFFF) | (((a2 + b1) & 0xFFFF) << 0x10); + // SSUB16 + if ((instr & 0xFF0) == 0xf70) { + state->Reg[rd_idx] = ((rn_lo - rm_lo) & 0xFFFF) | (((rn_hi - rm_hi) & 0xFFFF) << 16); + } + // SADD16 + else if ((instr & 0xFF0) == 0xf10) { + state->Reg[rd_idx] = ((rn_lo + rm_lo) & 0xFFFF) | (((rn_hi + rm_hi) & 0xFFFF) << 16); + } + // SSAX + else if ((instr & 0xFF0) == 0xf50) { + state->Reg[rd_idx] = ((rn_lo + rm_hi) & 0xFFFF) | (((rn_hi - rm_lo) & 0xFFFF) << 16); + } + // SASX + else { + state->Reg[rd_idx] = ((rn_lo - rm_hi) & 0xFFFF) | (((rn_hi + rm_lo) & 0xFFFF) << 16); + } return 1; - } else printf ("Unhandled v6 insn: sadd/ssub/ssax/sasx\n"); + } else { + printf("Unhandled v6 insn: %08x", BITS(20, 27)); + } break; case 0x62: // QSUB16 and QADD16 if ((instr & 0xFF0) == 0xf70 || (instr & 0xFF0) == 0xf10) { -- cgit v1.2.3 From 4dc8eb40be94e8376e0f2d2f59a5e1a85590d6b1 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Thu, 18 Dec 2014 11:11:30 -0500 Subject: armemu: Set GE flags correctly for SSUB16, SADD16, SSAX, and SASX. --- src/core/arm/interpreter/armemu.cpp | 33 +++++++++++++++++++++++++++++---- 1 file changed, 29 insertions(+), 4 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index b9ac8b9ad..f4452f356 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -5839,21 +5839,46 @@ L_stm_s_takeabort: const s16 rm_lo = (state->Reg[rm_idx] & 0xFFFF); const s16 rm_hi = ((state->Reg[rm_idx] >> 16) & 0xFFFF); + s32 lo_result; + s32 hi_result; + // SSUB16 if ((instr & 0xFF0) == 0xf70) { - state->Reg[rd_idx] = ((rn_lo - rm_lo) & 0xFFFF) | (((rn_hi - rm_hi) & 0xFFFF) << 16); + lo_result = (rn_lo - rm_lo); + hi_result = (rn_hi - rm_hi); } // SADD16 else if ((instr & 0xFF0) == 0xf10) { - state->Reg[rd_idx] = ((rn_lo + rm_lo) & 0xFFFF) | (((rn_hi + rm_hi) & 0xFFFF) << 16); + lo_result = (rn_lo + rm_lo); + hi_result = (rn_hi + rm_hi); } // SSAX else if ((instr & 0xFF0) == 0xf50) { - state->Reg[rd_idx] = ((rn_lo + rm_hi) & 0xFFFF) | (((rn_hi - rm_lo) & 0xFFFF) << 16); + lo_result = (rn_lo + rm_hi); + hi_result = (rn_hi - rm_lo); } // SASX else { - state->Reg[rd_idx] = ((rn_lo - rm_hi) & 0xFFFF) | (((rn_hi + rm_lo) & 0xFFFF) << 16); + lo_result = (rn_lo - rm_hi); + hi_result = (rn_hi + rm_lo); + } + + state->Reg[rd_idx] = (lo_result & 0xFFFF) | ((hi_result & 0xFFFF) << 16); + + if (lo_result >= 0) { + state->Cpsr |= (1 << 16); + state->Cpsr |= (1 << 17); + } else { + state->Cpsr &= ~(1 << 16); + state->Cpsr &= ~(1 << 17); + } + + if (hi_result >= 0) { + state->Cpsr |= (1 << 18); + state->Cpsr |= (1 << 19); + } else { + state->Cpsr &= ~(1 << 18); + state->Cpsr &= ~(1 << 19); } return 1; } else { -- cgit v1.2.3 From eaae0ad502f174823633c61c0cb934c434d1afb2 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Thu, 18 Dec 2014 12:07:18 -0500 Subject: armemu: Get rid of bitwise parenthesis warnings --- src/core/arm/interpreter/armemu.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index b9ac8b9ad..522f9a1dd 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6084,7 +6084,7 @@ L_stm_s_takeabort: break; } - Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF; + Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF); if (Rm & 0x80) Rm |= 0xffffff00; @@ -6129,7 +6129,7 @@ L_stm_s_takeabort: if (ror == -1) break; - Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF; + Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF); if (Rm & 0x8000) Rm |= 0xffff0000; @@ -6216,7 +6216,7 @@ L_stm_s_takeabort: break; } - Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF; + Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF); if (BITS(16, 19) == 0xf) /* UXTB */ @@ -6260,7 +6260,7 @@ L_stm_s_takeabort: if (ror == -1) break; - Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF; + Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF); /* UXT */ /* state->Reg[BITS (12, 15)] = Rm; */ -- cgit v1.2.3 From 6b632bbe37d6728ec2a7a7468ffad6e058642b66 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Thu, 18 Dec 2014 14:25:07 -0500 Subject: armemu: More concise names for USAT16-related variables --- src/core/arm/interpreter/armemu.cpp | 26 +++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index b9ac8b9ad..ae865aa72 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6192,18 +6192,22 @@ L_stm_s_takeabort: //ichfly //USAT16 { - u8 tar = BITS(12, 15); - u8 src = BITS(0, 3); - u8 val = BITS(16, 19); - s16 a1 = (state->Reg[src]); - s16 a2 = (state->Reg[src] >> 0x10); - s16 max = 0xFFFF >> (16 - val); - if (max < a1) a1 = max; - if (max < a2) a2 = max; - u32 temp2 = ((u32)(a2)) << 0x10; - state->Reg[tar] = (a1 & 0xFFFF) | (temp2); + const u8 rd_idx = BITS(12, 15); + const u8 rn_idx = BITS(0, 3); + const u8 num_bits = BITS(16, 19); + const s16 max = 0xFFFF >> (16 - num_bits); + s16 rn_lo = (state->Reg[rn_idx]); + s16 rn_hi = (state->Reg[rn_idx] >> 16); + + if (max < rn_lo) + rn_lo = max; + if (max < rn_hi) + rn_hi = max; + + state->Reg[rd_idx] = (rn_lo & 0xFFFF) | (rn_hi); + return 1; } - return 1; + default: break; } -- cgit v1.2.3 From e683f654ce2b143fb34c3a36d889d08af310db9c Mon Sep 17 00:00:00 2001 From: Lioncash Date: Thu, 18 Dec 2014 16:50:41 -0500 Subject: armemu: Fix lower-bounds clamping for USAT16 --- src/core/arm/interpreter/armemu.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index ae865aa72..99fc6c45d 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6201,10 +6201,15 @@ L_stm_s_takeabort: if (max < rn_lo) rn_lo = max; + else if (rn_lo < 0) + rn_lo = 0; + if (max < rn_hi) rn_hi = max; + else if (rn_hi < 0) + rn_hi = 0; - state->Reg[rd_idx] = (rn_lo & 0xFFFF) | (rn_hi); + state->Reg[rd_idx] = (rn_lo & 0xFFFF) | ((rn_hi << 16) & 0xFFFF); return 1; } -- cgit v1.2.3 From b9fc0b4b80c37b949f559fd59ca6c666fc7d19bd Mon Sep 17 00:00:00 2001 From: Lioncash Date: Thu, 18 Dec 2014 17:47:44 -0500 Subject: armemu: Clean up naming and formatting for SSAT16 --- src/core/arm/interpreter/armemu.cpp | 34 ++++++++++++++++++++-------------- 1 file changed, 20 insertions(+), 14 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 07d205755..837875d4f 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6081,22 +6081,28 @@ L_stm_s_takeabort: //ichfly //SSAT16 { - u8 tar = BITS(12, 15); - u8 src = BITS(0, 3); - u8 val = BITS(16, 19) + 1; - s16 a1 = (state->Reg[src]); - s16 a2 = (state->Reg[src] >> 0x10); - s16 min = (s16)(0x8000 >> (16 - val)); - s16 max = 0x7FFF >> (16 - val); - if (min > a1) a1 = min; - if (max < a1) a1 = max; - if (min > a2) a2 = min; - if (max < a2) a2 = max; - u32 temp2 = ((u32)(a2)) << 0x10; - state->Reg[tar] = (a1 & 0xFFFF) | (temp2); + const u8 rd_idx = BITS(12, 15); + const u8 rn_idx = BITS(0, 3); + const u8 num_bits = BITS(16, 19) + 1; + const s16 min = (0x8000 >> (16 - num_bits)); + const s16 max = (0x7FFF >> (16 - num_bits)); + s16 rn_lo = (state->Reg[rn_idx]); + s16 rn_hi = (state->Reg[rn_idx] >> 16); + + if (rn_lo > max) + rn_lo = max; + else if (rn_lo < min) + rn_lo = min; + + if (rn_hi > max) + rn_hi = max; + else if (rn_hi < min) + rn_hi = min; + + state->Reg[rd_idx] = (rn_lo & 0xFFFF) | ((rn_hi & 0xFFFF) << 16); + return 1; } - return 1; default: break; } -- cgit v1.2.3 From 92c53fe52220630664ae77a4c915d5af768b8adc Mon Sep 17 00:00:00 2001 From: Lioncash Date: Thu, 18 Dec 2014 20:35:10 -0500 Subject: armemu: Fix SSAT16 The lower-bound would never be negative like it should --- src/core/arm/interpreter/armemu.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 837875d4f..e39ea2cae 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6084,7 +6084,7 @@ L_stm_s_takeabort: const u8 rd_idx = BITS(12, 15); const u8 rn_idx = BITS(0, 3); const u8 num_bits = BITS(16, 19) + 1; - const s16 min = (0x8000 >> (16 - num_bits)); + const s16 min = -(0x8000 >> (16 - num_bits)); const s16 max = (0x7FFF >> (16 - num_bits)); s16 rn_lo = (state->Reg[rn_idx]); s16 rn_hi = (state->Reg[rn_idx] >> 16); -- cgit v1.2.3 From 00e8ec4a9ed2d7c1877e6dfe3f520cf072b5fe17 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Thu, 18 Dec 2014 21:44:39 -0500 Subject: armemu: Implement USAD8 and USADA8 --- src/core/arm/interpreter/armemu.cpp | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index b9ac8b9ad..399ee0886 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6326,7 +6326,30 @@ L_stm_s_takeabort: printf ("Unhandled v6 insn: smmla/smmls/smmul\n"); break; case 0x78: - printf ("Unhandled v6 insn: usad/usada8\n"); + if (BITS(20, 24) == 0x18) + { + const u8 rm_idx = BITS(8, 11); + const u8 rn_idx = BITS(0, 3); + const u8 rd_idx = BITS(16, 19); + + const u32 rm_val = state->Reg[rm_idx]; + const u32 rn_val = state->Reg[rn_idx]; + + const u8 diff1 = (u8)::abs((rn_val & 0xFF) - (rm_val & 0xFF)); + const u8 diff2 = (u8)::abs(((rn_val >> 8) & 0xFF) - ((rm_val >> 8) & 0xFF)); + const u8 diff3 = (u8)::abs(((rn_val >> 16) & 0xFF) - ((rm_val >> 16) & 0xFF)); + const u8 diff4 = (u8)::abs(((rn_val >> 24) & 0xFF) - ((rm_val >> 24) & 0xFF)); + + u32 finalDif = (diff1 + diff2 + diff3 + diff4); + + // Op is USADA8 if true. + const u8 ra_idx = BITS(12, 15); + if (ra_idx != 15) + finalDif += state->Reg[ra_idx]; + + state->Reg[rd_idx] = finalDif; + return 1; + } break; case 0x7a: printf ("Unhandled v6 insn: usbfx\n"); -- cgit v1.2.3 From 4a646ace1f2e026a309be084871c270e2a91d731 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Wed, 17 Dec 2014 13:11:01 -0500 Subject: dyncom: Implement UMAAL --- src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 48 +++++++++++++++++++++++++- 1 file changed, 47 insertions(+), 1 deletion(-) (limited to 'src/core/arm') diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 68012bffd..84b4a38f0 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -1266,6 +1266,13 @@ typedef struct _smla_inst { unsigned int Rn; } smla_inst; +typedef struct umaal_inst { + unsigned int Rn; + unsigned int Rm; + unsigned int RdHi; + unsigned int RdLo; +} umaal_inst; + typedef struct _umlal_inst { unsigned int S; unsigned int Rm; @@ -3010,7 +3017,26 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(uhaddsubx)(unsigned int inst, int index) { UN ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UHSUB16"); } ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UHSUB8"); } ARM_INST_PTR INTERPRETER_TRANSLATE(uhsubaddx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UHSUBADDX"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(umaal)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UMAAL"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(umaal)(unsigned int inst, int index) +{ + arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(umaal_inst)); + umaal_inst* const inst_cream = (umaal_inst*)inst_base->component; + + inst_base->cond = BITS(inst, 28, 31); + inst_base->idx = index; + inst_base->br = NON_BRANCH; + inst_base->load_r15 = 0; + + inst_cream->Rm = BITS(inst, 8, 11); + inst_cream->Rn = BITS(inst, 0, 3); + inst_cream->RdLo = BITS(inst, 12, 15); + inst_cream->RdHi = BITS(inst, 16, 19); + + if (CHECK_RM || CHECK_RN) + inst_base->load_r15 = 1; + + return inst_base; +} ARM_INST_PTR INTERPRETER_TRANSLATE(umlal)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umlal_inst)); @@ -6374,6 +6400,26 @@ unsigned InterpreterMainLoop(ARMul_State* state) UHSUB8_INST: UHSUBADDX_INST: UMAAL_INST: + { + INC_ICOUNTER; + if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { + umaal_inst* const inst_cream = (umaal_inst*)inst_base->component; + + const u32 rm = RM; + const u32 rn = RN; + const u32 rd_lo = RDLO; + const u32 rd_hi = RDHI; + + const u64 result = (rm * rn) + rd_lo + rd_hi; + + RDLO = (result & 0xFFFFFFFF); + RDHI = ((result >> 32) & 0xFFFFFFFF); + } + cpu->Reg[15] += GET_INST_SIZE(cpu); + INC_PC(sizeof(umaal_inst)); + FETCH_INST; + GOTO_NEXT_INST; + } UMLAL_INST: { INC_ICOUNTER; -- cgit v1.2.3 From 0f3a6a161c05c4e4f96450bb0443cfa90813d7ca Mon Sep 17 00:00:00 2001 From: Lioncash Date: Fri, 19 Dec 2014 09:38:10 -0500 Subject: armemu: Implement SMLSD --- src/core/arm/interpreter/armemu.cpp | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 07d205755..4e11e068f 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6317,11 +6317,14 @@ L_stm_s_takeabort: } case 0x70: // ichfly - // SMUAD, SMUSD, SMLAD - if ((instr & 0xf0d0) == 0xf010 || (instr & 0xf0d0) == 0xf050 || (instr & 0xd0) == 0x10) { + // SMUAD, SMUSD, SMLAD, and SMLSD + if ((instr & 0xf0d0) == 0xf010 || (instr & 0xf0d0) == 0xf050 || + (instr & 0xd0) == 0x10 || (instr & 0xd0) == 0x50) + { const u8 rd_idx = BITS(16, 19); const u8 rn_idx = BITS(0, 3); const u8 rm_idx = BITS(8, 11); + const u8 ra_idx = BITS(12, 15); const bool do_swap = (BIT(5) == 1); u32 rm_val = state->Reg[rm_idx]; @@ -6344,13 +6347,14 @@ L_stm_s_takeabort: state->Reg[rd_idx] = (rn_lo * rm_lo) - (rn_hi * rm_hi); } // SMLAD - else { - const u8 ra_idx = BITS(12, 15); + else if ((instr & 0xd0) == 0x10) { state->Reg[rd_idx] = (rn_lo * rm_lo) + (rn_hi * rm_hi) + (s32)state->Reg[ra_idx]; } + // SMLSD + else { + state->Reg[rd_idx] = ((rn_lo * rm_lo) - (rn_hi * rm_hi)) + (s32)state->Reg[ra_idx]; + } return 1; - } else { - printf ("Unhandled v6 insn: smlsd\n"); } break; case 0x74: -- cgit v1.2.3 From 4b506cec017dab0244349780b70f53dc762d61f8 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Fri, 19 Dec 2014 14:05:18 -0500 Subject: armemu: Implement QASX and QSAX --- src/core/arm/interpreter/armemu.cpp | 27 ++++++++++++++++++++------- 1 file changed, 20 insertions(+), 7 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 07d205755..bafeb024c 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -5885,8 +5885,10 @@ L_stm_s_takeabort: printf("Unhandled v6 insn: %08x", BITS(20, 27)); } break; - case 0x62: // QSUB16 and QADD16 - if ((instr & 0xFF0) == 0xf70 || (instr & 0xFF0) == 0xf10) { + case 0x62: // QADD16, QASX, QSAX, and QSUB16 + if ((instr & 0xFF0) == 0xf10 || (instr & 0xFF0) == 0xf30 || + (instr & 0xFF0) == 0xf50 || (instr & 0xFF0) == 0xf70) + { const u8 rd_idx = BITS(12, 15); const u8 rn_idx = BITS(16, 19); const u8 rm_idx = BITS(0, 3); @@ -5898,15 +5900,26 @@ L_stm_s_takeabort: s32 lo_result; s32 hi_result; + // QADD16 + if ((instr & 0xFF0) == 0xf10) { + lo_result = (rn_lo + rm_lo); + hi_result = (rn_hi + rm_hi); + } + // QASX + else if ((instr & 0xFF0) == 0xf30) { + lo_result = (rn_lo - rm_hi); + hi_result = (rn_hi + rm_lo); + } + // QSAX + else if ((instr & 0xFF0) == 0xf50) { + lo_result = (rn_lo + rm_hi); + hi_result = (rn_hi - rm_lo); + } // QSUB16 - if ((instr & 0xFF0) == 0xf70) { + else { lo_result = (rn_lo - rm_lo); hi_result = (rn_hi - rm_hi); } - else { // QADD16 - lo_result = (rn_lo + rm_lo); - hi_result = (rn_hi + rm_hi); - } if (lo_result > 0x7FFF) lo_result = 0x7FFF; -- cgit v1.2.3 From 2a097f09908bff63037b56d1b1c46ea6c3e76a2b Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sat, 20 Dec 2014 15:30:06 -0500 Subject: armemu: Should be using labs for USAD8/USADA8 --- src/core/arm/interpreter/armemu.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 7408b6f08..06439b73c 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6383,10 +6383,10 @@ L_stm_s_takeabort: const u32 rm_val = state->Reg[rm_idx]; const u32 rn_val = state->Reg[rn_idx]; - const u8 diff1 = (u8)::abs((rn_val & 0xFF) - (rm_val & 0xFF)); - const u8 diff2 = (u8)::abs(((rn_val >> 8) & 0xFF) - ((rm_val >> 8) & 0xFF)); - const u8 diff3 = (u8)::abs(((rn_val >> 16) & 0xFF) - ((rm_val >> 16) & 0xFF)); - const u8 diff4 = (u8)::abs(((rn_val >> 24) & 0xFF) - ((rm_val >> 24) & 0xFF)); + const u8 diff1 = (u8)std::labs((rn_val & 0xFF) - (rm_val & 0xFF)); + const u8 diff2 = (u8)std::labs(((rn_val >> 8) & 0xFF) - ((rm_val >> 8) & 0xFF)); + const u8 diff3 = (u8)std::labs(((rn_val >> 16) & 0xFF) - ((rm_val >> 16) & 0xFF)); + const u8 diff4 = (u8)std::labs(((rn_val >> 24) & 0xFF) - ((rm_val >> 24) & 0xFF)); u32 finalDif = (diff1 + diff2 + diff3 + diff4); -- cgit v1.2.3 From 855eda6f85b7e4e6965bd42d65a68239d4c99dc0 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sat, 20 Dec 2014 22:38:44 -0500 Subject: armemu: Implement SADD8/SSUB8 --- src/core/arm/interpreter/armemu.cpp | 101 +++++++++++++++++++++++++++++++----- 1 file changed, 87 insertions(+), 14 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 7a319b635..610e04f10 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -5824,9 +5824,9 @@ L_stm_s_takeabort: case 0x3f: printf ("Unhandled v6 insn: rbit\n"); break; - case 0x61: // SSUB16, SADD16, SSAX, and SASX - if ((instr & 0xFF0) == 0xf70 || (instr & 0xFF0) == 0xf10 || - (instr & 0xFF0) == 0xf50 || (instr & 0xFF0) == 0xf30) + case 0x61: // SADD16, SASX, SSAX, and SSUB16 + if ((instr & 0xFF0) == 0xf10 || (instr & 0xFF0) == 0xf30 || + (instr & 0xFF0) == 0xf50 || (instr & 0xFF0) == 0xf70) { const u8 rd_idx = BITS(12, 15); const u8 rm_idx = BITS(0, 3); @@ -5839,25 +5839,25 @@ L_stm_s_takeabort: s32 lo_result; s32 hi_result; - // SSUB16 - if ((instr & 0xFF0) == 0xf70) { - lo_result = (rn_lo - rm_lo); - hi_result = (rn_hi - rm_hi); - } // SADD16 - else if ((instr & 0xFF0) == 0xf10) { + if ((instr & 0xFF0) == 0xf10) { lo_result = (rn_lo + rm_lo); hi_result = (rn_hi + rm_hi); } + // SASX + else if ((instr & 0xFF0) == 0xf30) { + lo_result = (rn_lo - rm_hi); + hi_result = (rn_hi + rm_lo); + } // SSAX else if ((instr & 0xFF0) == 0xf50) { lo_result = (rn_lo + rm_hi); hi_result = (rn_hi - rm_lo); } - // SASX + // SSUB16 else { - lo_result = (rn_lo - rm_hi); - hi_result = (rn_hi + rm_lo); + lo_result = (rn_lo - rm_lo); + hi_result = (rn_hi - rm_hi); } state->Reg[rd_idx] = (lo_result & 0xFFFF) | ((hi_result & 0xFFFF) << 16); @@ -5878,8 +5878,81 @@ L_stm_s_takeabort: state->Cpsr &= ~(1 << 19); } return 1; - } else { - printf("Unhandled v6 insn: %08x", BITS(20, 27)); + } + // SADD8/SSUB8 + else if ((instr & 0xFF0) == 0xf90 || (instr & 0xFF0) == 0xff0) + { + const u8 rd_idx = BITS(12, 15); + const u8 rm_idx = BITS(0, 3); + const u8 rn_idx = BITS(16, 19); + const u32 rm_val = state->Reg[rm_idx]; + const u32 rn_val = state->Reg[rn_idx]; + + u8 lo_val1; + u8 lo_val2; + u8 hi_val1; + u8 hi_val2; + + // SADD8 + if ((instr & 0xFF0) == 0xf90) { + lo_val1 = (u8)((rn_val & 0xFF) + (rm_val & 0xFF)); + lo_val2 = (u8)(((rn_val >> 8) & 0xFF) + ((rm_val >> 8) & 0xFF)); + hi_val1 = (u8)(((rn_val >> 16) & 0xFF) + ((rm_val >> 16) & 0xFF)); + hi_val2 = (u8)(((rn_val >> 24) & 0xFF) + ((rm_val >> 24) & 0xFF)); + + if (lo_val1 & 0x80) + state->Cpsr |= (1 << 16); + else + state->Cpsr &= ~(1 << 16); + + if (lo_val2 & 0x80) + state->Cpsr |= (1 << 17); + else + state->Cpsr &= ~(1 << 17); + + if (hi_val1 & 0x80) + state->Cpsr |= (1 << 18); + else + state->Cpsr &= ~(1 << 18); + + if (hi_val2 & 0x80) + state->Cpsr |= (1 << 19); + else + state->Cpsr &= ~(1 << 19); + } + // SSUB8 + else { + lo_val1 = (u8)((rn_val & 0xFF) - (rm_val & 0xFF)); + lo_val2 = (u8)(((rn_val >> 8) & 0xFF) - ((rm_val >> 8) & 0xFF)); + hi_val1 = (u8)(((rn_val >> 16) & 0xFF) - ((rm_val >> 16) & 0xFF)); + hi_val2 = (u8)(((rn_val >> 24) & 0xFF) - ((rm_val >> 24) & 0xFF)); + + if (!(lo_val1 & 0x80)) + state->Cpsr |= (1 << 16); + else + state->Cpsr &= ~(1 << 16); + + if (!(lo_val2 & 0x80)) + state->Cpsr |= (1 << 17); + else + state->Cpsr &= ~(1 << 17); + + if (!(hi_val1 & 0x80)) + state->Cpsr |= (1 << 18); + else + state->Cpsr &= ~(1 << 18); + + if (!(hi_val2 & 0x80)) + state->Cpsr |= (1 << 19); + else + state->Cpsr &= ~(1 << 19); + } + + state->Reg[rd_idx] = (lo_val1 | lo_val2 << 8 | hi_val1 << 16 | hi_val2 << 24); + return 1; + } + else { + printf("Unhandled v6 insn: %08x", instr); } break; case 0x62: // QADD16, QASX, QSAX, and QSUB16 -- cgit v1.2.3 From ebfd831ccba32bce097491db3d6bdff0be05935e Mon Sep 17 00:00:00 2001 From: purpasmart96 Date: Tue, 16 Dec 2014 21:38:14 -0800 Subject: License change --- src/citra/citra.cpp | 2 +- src/citra/config.cpp | 2 +- src/citra/config.h | 2 +- src/citra/default_ini.h | 2 +- src/citra/emu_window/emu_window_glfw.cpp | 2 +- src/citra/emu_window/emu_window_glfw.h | 2 +- src/citra_qt/config.cpp | 2 +- src/citra_qt/config.h | 2 +- src/citra_qt/debugger/graphics.cpp | 2 +- src/citra_qt/debugger/graphics.hxx | 2 +- src/citra_qt/debugger/graphics_breakpoints.cpp | 2 +- src/citra_qt/debugger/graphics_breakpoints.hxx | 2 +- src/citra_qt/debugger/graphics_breakpoints_p.hxx | 2 +- src/citra_qt/debugger/graphics_cmdlists.cpp | 2 +- src/citra_qt/debugger/graphics_cmdlists.hxx | 2 +- src/citra_qt/debugger/graphics_framebuffer.cpp | 2 +- src/citra_qt/debugger/graphics_framebuffer.hxx | 2 +- src/citra_qt/util/spinbox.cpp | 2 +- src/citra_qt/util/spinbox.hxx | 2 +- src/common/bit_field.h | 2 +- src/common/break_points.cpp | 4 ++-- src/common/break_points.h | 4 ++-- src/common/common.h | 4 ++-- src/common/common_funcs.h | 4 ++-- src/common/common_paths.h | 4 ++-- src/common/concurrent_ring_buffer.h | 2 +- src/common/cpu_detect.h | 4 ++-- src/common/emu_window.cpp | 2 +- src/common/emu_window.h | 2 +- src/common/file_search.cpp | 4 ++-- src/common/file_search.h | 4 ++-- src/common/file_util.cpp | 4 ++-- src/common/file_util.h | 4 ++-- src/common/hash.cpp | 4 ++-- src/common/hash.h | 4 ++-- src/common/key_map.cpp | 2 +- src/common/key_map.h | 2 +- src/common/linear_disk_cache.h | 4 ++-- src/common/log.h | 4 ++-- src/common/logging/backend.cpp | 2 +- src/common/logging/backend.h | 2 +- src/common/logging/filter.cpp | 2 +- src/common/logging/filter.h | 2 +- src/common/logging/log.h | 2 +- src/common/logging/text_formatter.cpp | 2 +- src/common/logging/text_formatter.h | 2 +- src/common/math_util.cpp | 4 ++-- src/common/math_util.h | 4 ++-- src/common/memory_util.cpp | 4 ++-- src/common/memory_util.h | 4 ++-- src/common/misc.cpp | 4 ++-- src/common/msg_handler.cpp | 4 ++-- src/common/msg_handler.h | 4 ++-- src/common/scm_rev.h | 2 +- src/common/scope_exit.h | 2 +- src/common/string_util.cpp | 4 ++-- src/common/string_util.h | 4 ++-- src/common/symbols.cpp | 2 +- src/common/symbols.h | 2 +- src/common/thread.cpp | 4 ++-- src/common/thread.h | 4 ++-- src/common/thread_queue_list.h | 2 +- src/common/thunk.h | 4 ++-- src/common/timer.cpp | 4 ++-- src/common/timer.h | 4 ++-- src/core/arm/arm_interface.h | 2 +- src/core/arm/disassembler/load_symbol_map.cpp | 2 +- src/core/arm/disassembler/load_symbol_map.h | 2 +- src/core/arm/dyncom/arm_dyncom.cpp | 2 +- src/core/arm/dyncom/arm_dyncom.h | 2 +- src/core/arm/dyncom/arm_dyncom_interpreter.h | 2 +- src/core/arm/interpreter/arm_interpreter.cpp | 2 +- src/core/arm/interpreter/arm_interpreter.h | 2 +- src/core/core.cpp | 2 +- src/core/core.h | 2 +- src/core/core_timing.cpp | 4 ++-- src/core/core_timing.h | 4 ++-- src/core/file_sys/archive_backend.h | 2 +- src/core/file_sys/archive_romfs.cpp | 2 +- src/core/file_sys/archive_romfs.h | 2 +- src/core/file_sys/archive_savedata.cpp | 2 +- src/core/file_sys/archive_savedata.h | 2 +- src/core/file_sys/archive_sdmc.cpp | 2 +- src/core/file_sys/archive_sdmc.h | 2 +- src/core/file_sys/archive_systemsavedata.cpp | 2 +- src/core/file_sys/archive_systemsavedata.h | 2 +- src/core/file_sys/directory_backend.h | 2 +- src/core/file_sys/directory_romfs.cpp | 2 +- src/core/file_sys/directory_romfs.h | 2 +- src/core/file_sys/disk_archive.cpp | 2 +- src/core/file_sys/disk_archive.h | 2 +- src/core/file_sys/file_backend.h | 2 +- src/core/file_sys/file_romfs.cpp | 2 +- src/core/file_sys/file_romfs.h | 2 +- src/core/hle/config_mem.cpp | 2 +- src/core/hle/config_mem.h | 2 +- src/core/hle/coprocessor.cpp | 2 +- src/core/hle/function_wrappers.h | 2 +- src/core/hle/hle.cpp | 2 +- src/core/hle/hle.h | 2 +- src/core/hle/kernel/address_arbiter.cpp | 2 +- src/core/hle/kernel/address_arbiter.h | 2 +- src/core/hle/kernel/event.cpp | 2 +- src/core/hle/kernel/event.h | 2 +- src/core/hle/kernel/kernel.cpp | 4 ++-- src/core/hle/kernel/kernel.h | 2 +- src/core/hle/kernel/mutex.cpp | 2 +- src/core/hle/kernel/mutex.h | 2 +- src/core/hle/kernel/semaphore.cpp | 2 +- src/core/hle/kernel/semaphore.h | 2 +- src/core/hle/kernel/session.h | 2 +- src/core/hle/kernel/shared_memory.cpp | 2 +- src/core/hle/kernel/shared_memory.h | 2 +- src/core/hle/kernel/thread.cpp | 2 +- src/core/hle/kernel/thread.h | 2 +- src/core/hle/result.h | 2 +- src/core/hle/service/ac_u.cpp | 2 +- src/core/hle/service/ac_u.h | 2 +- src/core/hle/service/am_app.cpp | 2 +- src/core/hle/service/am_app.h | 2 +- src/core/hle/service/am_net.cpp | 2 +- src/core/hle/service/am_net.h | 2 +- src/core/hle/service/apt_u.cpp | 2 +- src/core/hle/service/apt_u.h | 2 +- src/core/hle/service/boss_u.cpp | 2 +- src/core/hle/service/boss_u.h | 2 +- src/core/hle/service/cecd_u.cpp | 2 +- src/core/hle/service/cecd_u.h | 2 +- src/core/hle/service/cfg_i.cpp | 2 +- src/core/hle/service/cfg_i.h | 2 +- src/core/hle/service/cfg_u.cpp | 2 +- src/core/hle/service/cfg_u.h | 2 +- src/core/hle/service/csnd_snd.cpp | 2 +- src/core/hle/service/csnd_snd.h | 2 +- src/core/hle/service/dsp_dsp.cpp | 2 +- src/core/hle/service/dsp_dsp.h | 2 +- src/core/hle/service/err_f.cpp | 2 +- src/core/hle/service/err_f.h | 2 +- src/core/hle/service/frd_u.cpp | 2 +- src/core/hle/service/frd_u.h | 2 +- src/core/hle/service/fs/archive.cpp | 2 +- src/core/hle/service/fs/archive.h | 2 +- src/core/hle/service/fs/fs_user.cpp | 2 +- src/core/hle/service/fs/fs_user.h | 2 +- src/core/hle/service/gsp_gpu.cpp | 2 +- src/core/hle/service/gsp_gpu.h | 2 +- src/core/hle/service/hid_user.cpp | 2 +- src/core/hle/service/hid_user.h | 2 +- src/core/hle/service/ir_rst.cpp | 2 +- src/core/hle/service/ir_rst.h | 4 ++-- src/core/hle/service/ir_u.cpp | 2 +- src/core/hle/service/ir_u.h | 2 +- src/core/hle/service/ldr_ro.cpp | 2 +- src/core/hle/service/ldr_ro.h | 2 +- src/core/hle/service/mic_u.cpp | 2 +- src/core/hle/service/mic_u.h | 2 +- src/core/hle/service/ndm_u.cpp | 2 +- src/core/hle/service/ndm_u.h | 2 +- src/core/hle/service/nim_aoc.cpp | 2 +- src/core/hle/service/nim_aoc.h | 2 +- src/core/hle/service/nwm_uds.cpp | 2 +- src/core/hle/service/nwm_uds.h | 2 +- src/core/hle/service/pm_app.cpp | 2 +- src/core/hle/service/pm_app.h | 2 +- src/core/hle/service/ptm_u.cpp | 2 +- src/core/hle/service/ptm_u.h | 2 +- src/core/hle/service/service.cpp | 2 +- src/core/hle/service/service.h | 2 +- src/core/hle/service/soc_u.cpp | 2 +- src/core/hle/service/soc_u.h | 2 +- src/core/hle/service/srv.cpp | 2 +- src/core/hle/service/srv.h | 2 +- src/core/hle/service/ssl_c.cpp | 2 +- src/core/hle/service/ssl_c.h | 2 +- src/core/hle/svc.cpp | 2 +- src/core/hle/svc.h | 2 +- src/core/hw/gpu.cpp | 2 +- src/core/hw/gpu.h | 2 +- src/core/hw/hw.cpp | 2 +- src/core/hw/hw.h | 2 +- src/core/loader/3dsx.cpp | 2 +- src/core/loader/3dsx.h | 2 +- src/core/loader/elf.cpp | 4 ++-- src/core/loader/elf.h | 4 ++-- src/core/loader/loader.cpp | 2 +- src/core/loader/loader.h | 2 +- src/core/loader/ncch.cpp | 2 +- src/core/loader/ncch.h | 2 +- src/core/mem_map.cpp | 4 ++-- src/core/mem_map.h | 2 +- src/core/mem_map_funcs.cpp | 2 +- src/core/settings.cpp | 2 +- src/core/settings.h | 2 +- src/core/system.cpp | 2 +- src/core/system.h | 2 +- src/video_core/clipper.cpp | 2 +- src/video_core/clipper.h | 2 +- src/video_core/command_processor.cpp | 2 +- src/video_core/command_processor.h | 2 +- src/video_core/gpu_debugger.h | 2 +- src/video_core/math.h | 2 +- src/video_core/pica.h | 2 +- src/video_core/primitive_assembly.cpp | 2 +- src/video_core/primitive_assembly.h | 2 +- src/video_core/rasterizer.cpp | 2 +- src/video_core/rasterizer.h | 2 +- src/video_core/renderer_base.h | 2 +- src/video_core/renderer_opengl/gl_shader_util.cpp | 2 +- src/video_core/renderer_opengl/gl_shader_util.h | 2 +- src/video_core/renderer_opengl/gl_shaders.h | 2 +- src/video_core/renderer_opengl/renderer_opengl.cpp | 2 +- src/video_core/renderer_opengl/renderer_opengl.h | 2 +- src/video_core/utils.cpp | 2 +- src/video_core/utils.h | 2 +- src/video_core/vertex_shader.cpp | 2 +- src/video_core/vertex_shader.h | 2 +- src/video_core/video_core.cpp | 2 +- src/video_core/video_core.h | 2 +- 218 files changed, 253 insertions(+), 253 deletions(-) (limited to 'src/core/arm') diff --git a/src/citra/citra.cpp b/src/citra/citra.cpp index d6e8a4ec7..f6a52758b 100644 --- a/src/citra/citra.cpp +++ b/src/citra/citra.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/citra/config.cpp b/src/citra/config.cpp index 92764809e..b9d6441be 100644 --- a/src/citra/config.cpp +++ b/src/citra/config.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/citra/config.h b/src/citra/config.h index 2b46fa8aa..0eb176c7d 100644 --- a/src/citra/config.h +++ b/src/citra/config.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/citra/default_ini.h b/src/citra/default_ini.h index 7cf543e07..a281c536f 100644 --- a/src/citra/default_ini.h +++ b/src/citra/default_ini.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/citra/emu_window/emu_window_glfw.cpp b/src/citra/emu_window/emu_window_glfw.cpp index 929e09f43..a6282809b 100644 --- a/src/citra/emu_window/emu_window_glfw.cpp +++ b/src/citra/emu_window/emu_window_glfw.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/citra/emu_window/emu_window_glfw.h b/src/citra/emu_window/emu_window_glfw.h index 5b04e87bb..5252fccc8 100644 --- a/src/citra/emu_window/emu_window_glfw.h +++ b/src/citra/emu_window/emu_window_glfw.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/citra_qt/config.cpp b/src/citra_qt/config.cpp index 0ae6b8b2d..0fea8e4f9 100644 --- a/src/citra_qt/config.cpp +++ b/src/citra_qt/config.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/citra_qt/config.h b/src/citra_qt/config.h index 4c95d0cb9..4485cae73 100644 --- a/src/citra_qt/config.h +++ b/src/citra_qt/config.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/citra_qt/debugger/graphics.cpp b/src/citra_qt/debugger/graphics.cpp index a86a55404..6ff4c290d 100644 --- a/src/citra_qt/debugger/graphics.cpp +++ b/src/citra_qt/debugger/graphics.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "graphics.hxx" diff --git a/src/citra_qt/debugger/graphics.hxx b/src/citra_qt/debugger/graphics.hxx index 72656f93c..8119b4c87 100644 --- a/src/citra_qt/debugger/graphics.hxx +++ b/src/citra_qt/debugger/graphics.hxx @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/citra_qt/debugger/graphics_breakpoints.cpp b/src/citra_qt/debugger/graphics_breakpoints.cpp index 53394b6e6..e391f895b 100644 --- a/src/citra_qt/debugger/graphics_breakpoints.cpp +++ b/src/citra_qt/debugger/graphics_breakpoints.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/citra_qt/debugger/graphics_breakpoints.hxx b/src/citra_qt/debugger/graphics_breakpoints.hxx index 2142c6fa1..5b9ba324e 100644 --- a/src/citra_qt/debugger/graphics_breakpoints.hxx +++ b/src/citra_qt/debugger/graphics_breakpoints.hxx @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/citra_qt/debugger/graphics_breakpoints_p.hxx b/src/citra_qt/debugger/graphics_breakpoints_p.hxx index bf5daf73d..232bfc863 100644 --- a/src/citra_qt/debugger/graphics_breakpoints_p.hxx +++ b/src/citra_qt/debugger/graphics_breakpoints_p.hxx @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/citra_qt/debugger/graphics_cmdlists.cpp b/src/citra_qt/debugger/graphics_cmdlists.cpp index 7f97cf143..83102c647 100644 --- a/src/citra_qt/debugger/graphics_cmdlists.cpp +++ b/src/citra_qt/debugger/graphics_cmdlists.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/citra_qt/debugger/graphics_cmdlists.hxx b/src/citra_qt/debugger/graphics_cmdlists.hxx index a459bba64..a465d044c 100644 --- a/src/citra_qt/debugger/graphics_cmdlists.hxx +++ b/src/citra_qt/debugger/graphics_cmdlists.hxx @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/citra_qt/debugger/graphics_framebuffer.cpp b/src/citra_qt/debugger/graphics_framebuffer.cpp index ac47f298d..fb62e8f17 100644 --- a/src/citra_qt/debugger/graphics_framebuffer.cpp +++ b/src/citra_qt/debugger/graphics_framebuffer.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/citra_qt/debugger/graphics_framebuffer.hxx b/src/citra_qt/debugger/graphics_framebuffer.hxx index 1151ee7a1..56215761e 100644 --- a/src/citra_qt/debugger/graphics_framebuffer.hxx +++ b/src/citra_qt/debugger/graphics_framebuffer.hxx @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/citra_qt/util/spinbox.cpp b/src/citra_qt/util/spinbox.cpp index 9672168f5..3f28fdbab 100644 --- a/src/citra_qt/util/spinbox.cpp +++ b/src/citra_qt/util/spinbox.cpp @@ -1,4 +1,4 @@ -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. diff --git a/src/citra_qt/util/spinbox.hxx b/src/citra_qt/util/spinbox.hxx index 68f5b9894..ee7f08ec2 100644 --- a/src/citra_qt/util/spinbox.hxx +++ b/src/citra_qt/util/spinbox.hxx @@ -1,4 +1,4 @@ -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. diff --git a/src/common/bit_field.h b/src/common/bit_field.h index 9e02210f9..b5977ee56 100644 --- a/src/common/bit_field.h +++ b/src/common/bit_field.h @@ -1,4 +1,4 @@ -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. diff --git a/src/common/break_points.cpp b/src/common/break_points.cpp index 587dbf40a..6696935fa 100644 --- a/src/common/break_points.cpp +++ b/src/common/break_points.cpp @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/common.h" diff --git a/src/common/break_points.h b/src/common/break_points.h index cf3884fbc..5557cd50e 100644 --- a/src/common/break_points.h +++ b/src/common/break_points.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/common.h b/src/common/common.h index 9f3016d34..66f0ccd0c 100644 --- a/src/common/common.h +++ b/src/common/common.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/common_funcs.h b/src/common/common_funcs.h index 67b3679b0..ca7abbea6 100644 --- a/src/common/common_funcs.h +++ b/src/common/common_funcs.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/common_paths.h b/src/common/common_paths.h index 966402a3d..9d62a8368 100644 --- a/src/common/common_paths.h +++ b/src/common/common_paths.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/concurrent_ring_buffer.h b/src/common/concurrent_ring_buffer.h index 2951d93db..311bb01f4 100644 --- a/src/common/concurrent_ring_buffer.h +++ b/src/common/concurrent_ring_buffer.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/cpu_detect.h b/src/common/cpu_detect.h index def6afdee..b585f9608 100644 --- a/src/common/cpu_detect.h +++ b/src/common/cpu_detect.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. diff --git a/src/common/emu_window.cpp b/src/common/emu_window.cpp index 7a2c50ac8..4ec7b263a 100644 --- a/src/common/emu_window.cpp +++ b/src/common/emu_window.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "emu_window.h" diff --git a/src/common/emu_window.h b/src/common/emu_window.h index 4cb94fed1..1ad4b82a3 100644 --- a/src/common/emu_window.h +++ b/src/common/emu_window.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/file_search.cpp b/src/common/file_search.cpp index bfb54ce72..b3a0a84fb 100644 --- a/src/common/file_search.cpp +++ b/src/common/file_search.cpp @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. diff --git a/src/common/file_search.h b/src/common/file_search.h index f966a008d..55ca02638 100644 --- a/src/common/file_search.h +++ b/src/common/file_search.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/file_util.cpp b/src/common/file_util.cpp index 20c680571..bba830c70 100644 --- a/src/common/file_util.cpp +++ b/src/common/file_util.cpp @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. diff --git a/src/common/file_util.h b/src/common/file_util.h index b1a60fb81..293c30941 100644 --- a/src/common/file_util.h +++ b/src/common/file_util.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/hash.cpp b/src/common/hash.cpp index 2ddcfe6b7..fe2c9e636 100644 --- a/src/common/hash.cpp +++ b/src/common/hash.cpp @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. diff --git a/src/common/hash.h b/src/common/hash.h index 29f699d7f..3ac42bc44 100644 --- a/src/common/hash.h +++ b/src/common/hash.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/key_map.cpp b/src/common/key_map.cpp index 309caab98..d8945bb13 100644 --- a/src/common/key_map.cpp +++ b/src/common/key_map.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "key_map.h" diff --git a/src/common/key_map.h b/src/common/key_map.h index bf72362c0..8d949b852 100644 --- a/src/common/key_map.h +++ b/src/common/key_map.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/linear_disk_cache.h b/src/common/linear_disk_cache.h index bb1b5174f..74ce74aba 100644 --- a/src/common/linear_disk_cache.h +++ b/src/common/linear_disk_cache.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/log.h b/src/common/log.h index 663eda9ad..96d97249f 100644 --- a/src/common/log.h +++ b/src/common/log.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/logging/backend.cpp b/src/common/logging/backend.cpp index e79b84604..816d1bb55 100644 --- a/src/common/logging/backend.cpp +++ b/src/common/logging/backend.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/common/logging/backend.h b/src/common/logging/backend.h index ae270efe8..1c44c929e 100644 --- a/src/common/logging/backend.h +++ b/src/common/logging/backend.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/logging/filter.cpp b/src/common/logging/filter.cpp index 0cf9b05e7..50f2e13f4 100644 --- a/src/common/logging/filter.cpp +++ b/src/common/logging/filter.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/common/logging/filter.h b/src/common/logging/filter.h index 32b14b159..c3da9989f 100644 --- a/src/common/logging/filter.h +++ b/src/common/logging/filter.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/common/logging/log.h b/src/common/logging/log.h index 1eec34fbb..d1c391862 100644 --- a/src/common/logging/log.h +++ b/src/common/logging/log.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/logging/text_formatter.cpp b/src/common/logging/text_formatter.cpp index f6b02fd47..ef5739d84 100644 --- a/src/common/logging/text_formatter.cpp +++ b/src/common/logging/text_formatter.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/common/logging/text_formatter.h b/src/common/logging/text_formatter.h index 1f73ca44a..2f05794f0 100644 --- a/src/common/logging/text_formatter.h +++ b/src/common/logging/text_formatter.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/math_util.cpp b/src/common/math_util.cpp index 3613e82a6..a83592dd2 100644 --- a/src/common/math_util.cpp +++ b/src/common/math_util.cpp @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. diff --git a/src/common/math_util.h b/src/common/math_util.h index b10a25c13..43b0e0dc3 100644 --- a/src/common/math_util.h +++ b/src/common/math_util.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/memory_util.cpp b/src/common/memory_util.cpp index ca8a2a9e4..8f982da89 100644 --- a/src/common/memory_util.cpp +++ b/src/common/memory_util.cpp @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. diff --git a/src/common/memory_util.h b/src/common/memory_util.h index 922bd44b2..9fdbf1f12 100644 --- a/src/common/memory_util.h +++ b/src/common/memory_util.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/misc.cpp b/src/common/misc.cpp index bc9d26188..e33055d10 100644 --- a/src/common/misc.cpp +++ b/src/common/misc.cpp @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/common.h" diff --git a/src/common/msg_handler.cpp b/src/common/msg_handler.cpp index 7ffedc45a..4a47b518e 100644 --- a/src/common/msg_handler.cpp +++ b/src/common/msg_handler.cpp @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/common/msg_handler.h b/src/common/msg_handler.h index 9bfdf950e..7bb216e98 100644 --- a/src/common/msg_handler.h +++ b/src/common/msg_handler.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/scm_rev.h b/src/common/scm_rev.h index d34664614..0ef190afa 100644 --- a/src/common/scm_rev.h +++ b/src/common/scm_rev.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/scope_exit.h b/src/common/scope_exit.h index 1d3e59319..263beaf0e 100644 --- a/src/common/scope_exit.h +++ b/src/common/scope_exit.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/string_util.cpp b/src/common/string_util.cpp index 6d9612fb5..d919b7a4c 100644 --- a/src/common/string_util.cpp +++ b/src/common/string_util.cpp @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/common/string_util.h b/src/common/string_util.h index 7d75691b1..74974263f 100644 --- a/src/common/string_util.h +++ b/src/common/string_util.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/symbols.cpp b/src/common/symbols.cpp index 63ad6218b..9e4dccfb3 100644 --- a/src/common/symbols.cpp +++ b/src/common/symbols.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/symbols.h" diff --git a/src/common/symbols.h b/src/common/symbols.h index 4560f5240..f76cb6b1e 100644 --- a/src/common/symbols.h +++ b/src/common/symbols.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/thread.cpp b/src/common/thread.cpp index dc153ba71..8c83d67b5 100644 --- a/src/common/thread.cpp +++ b/src/common/thread.cpp @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/thread.h" diff --git a/src/common/thread.h b/src/common/thread.h index 8c36d3f07..eaf1ba00c 100644 --- a/src/common/thread.h +++ b/src/common/thread.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/thread_queue_list.h b/src/common/thread_queue_list.h index 7e3b620c7..4e1c0a215 100644 --- a/src/common/thread_queue_list.h +++ b/src/common/thread_queue_list.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project / PPSSPP Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/thunk.h b/src/common/thunk.h index 90c8be888..4fb7c98e1 100644 --- a/src/common/thunk.h +++ b/src/common/thunk.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/common/timer.cpp b/src/common/timer.cpp index 4a797f751..a6682ea19 100644 --- a/src/common/timer.cpp +++ b/src/common/timer.cpp @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/common/timer.h b/src/common/timer.h index 86418e7a7..4b44c33a0 100644 --- a/src/common/timer.h +++ b/src/common/timer.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index 3ae528562..c59355339 100644 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/arm/disassembler/load_symbol_map.cpp b/src/core/arm/disassembler/load_symbol_map.cpp index 55278474b..13d26d170 100644 --- a/src/core/arm/disassembler/load_symbol_map.cpp +++ b/src/core/arm/disassembler/load_symbol_map.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/arm/disassembler/load_symbol_map.h b/src/core/arm/disassembler/load_symbol_map.h index 837cca99b..d28c551c3 100644 --- a/src/core/arm/disassembler/load_symbol_map.h +++ b/src/core/arm/disassembler/load_symbol_map.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp index 6c8ea211e..6d4fb1b48 100644 --- a/src/core/arm/dyncom/arm_dyncom.cpp +++ b/src/core/arm/dyncom/arm_dyncom.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "core/arm/skyeye_common/armcpu.h" diff --git a/src/core/arm/dyncom/arm_dyncom.h b/src/core/arm/dyncom/arm_dyncom.h index 51eea41ed..6fa2a0ba7 100644 --- a/src/core/arm/dyncom/arm_dyncom.h +++ b/src/core/arm/dyncom/arm_dyncom.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.h b/src/core/arm/dyncom/arm_dyncom_interpreter.h index 3a2462f55..4791ea25f 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.h +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/arm/interpreter/arm_interpreter.cpp b/src/core/arm/interpreter/arm_interpreter.cpp index e2aa5ce92..be04fc1a1 100644 --- a/src/core/arm/interpreter/arm_interpreter.cpp +++ b/src/core/arm/interpreter/arm_interpreter.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "core/arm/interpreter/arm_interpreter.h" diff --git a/src/core/arm/interpreter/arm_interpreter.h b/src/core/arm/interpreter/arm_interpreter.h index ed53d997c..b685215a0 100644 --- a/src/core/arm/interpreter/arm_interpreter.h +++ b/src/core/arm/interpreter/arm_interpreter.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/core.cpp b/src/core/core.cpp index 64de0cbba..22213d647 100644 --- a/src/core/core.cpp +++ b/src/core/core.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/common_types.h" diff --git a/src/core/core.h b/src/core/core.h index 850bb0ab4..05dbe0ae5 100644 --- a/src/core/core.h +++ b/src/core/core.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/core_timing.cpp b/src/core/core_timing.cpp index 1a0b2724a..321648b37 100644 --- a/src/core/core_timing.cpp +++ b/src/core/core_timing.cpp @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/core_timing.h b/src/core/core_timing.h index b197cf40c..496234538 100644 --- a/src/core/core_timing.h +++ b/src/core/core_timing.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/file_sys/archive_backend.h b/src/core/file_sys/archive_backend.h index 18c314884..065b22e5d 100644 --- a/src/core/file_sys/archive_backend.h +++ b/src/core/file_sys/archive_backend.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/file_sys/archive_romfs.cpp b/src/core/file_sys/archive_romfs.cpp index 0709b62a1..6ef6ea2fb 100644 --- a/src/core/file_sys/archive_romfs.cpp +++ b/src/core/file_sys/archive_romfs.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/file_sys/archive_romfs.h b/src/core/file_sys/archive_romfs.h index 5b1ee6332..564c23f70 100644 --- a/src/core/file_sys/archive_romfs.h +++ b/src/core/file_sys/archive_romfs.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/file_sys/archive_savedata.cpp b/src/core/file_sys/archive_savedata.cpp index 2414564e4..cb4a80f5b 100644 --- a/src/core/file_sys/archive_savedata.cpp +++ b/src/core/file_sys/archive_savedata.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/file_sys/archive_savedata.h b/src/core/file_sys/archive_savedata.h index d394ad37e..5b0ce29e6 100644 --- a/src/core/file_sys/archive_savedata.h +++ b/src/core/file_sys/archive_savedata.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/file_sys/archive_sdmc.cpp b/src/core/file_sys/archive_sdmc.cpp index dccdf7f67..1c1c170b6 100644 --- a/src/core/file_sys/archive_sdmc.cpp +++ b/src/core/file_sys/archive_sdmc.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/file_sys/archive_sdmc.h b/src/core/file_sys/archive_sdmc.h index c84c6948e..1b801f217 100644 --- a/src/core/file_sys/archive_sdmc.h +++ b/src/core/file_sys/archive_sdmc.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/file_sys/archive_systemsavedata.cpp b/src/core/file_sys/archive_systemsavedata.cpp index dc2c23b41..5da1ec946 100644 --- a/src/core/file_sys/archive_systemsavedata.cpp +++ b/src/core/file_sys/archive_systemsavedata.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/file_sys/archive_systemsavedata.h b/src/core/file_sys/archive_systemsavedata.h index 360ed1e13..c3ebb7c99 100644 --- a/src/core/file_sys/archive_systemsavedata.h +++ b/src/core/file_sys/archive_systemsavedata.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/file_sys/directory_backend.h b/src/core/file_sys/directory_backend.h index 188746a6f..7f327dc42 100644 --- a/src/core/file_sys/directory_backend.h +++ b/src/core/file_sys/directory_backend.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/file_sys/directory_romfs.cpp b/src/core/file_sys/directory_romfs.cpp index e6d571391..0b95f9b65 100644 --- a/src/core/file_sys/directory_romfs.cpp +++ b/src/core/file_sys/directory_romfs.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/common_types.h" diff --git a/src/core/file_sys/directory_romfs.h b/src/core/file_sys/directory_romfs.h index b775f014d..2297f1645 100644 --- a/src/core/file_sys/directory_romfs.h +++ b/src/core/file_sys/directory_romfs.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/file_sys/disk_archive.cpp b/src/core/file_sys/disk_archive.cpp index eabf58057..fc9ee4acf 100644 --- a/src/core/file_sys/disk_archive.cpp +++ b/src/core/file_sys/disk_archive.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/file_sys/disk_archive.h b/src/core/file_sys/disk_archive.h index 778c83953..73fce2fce 100644 --- a/src/core/file_sys/disk_archive.h +++ b/src/core/file_sys/disk_archive.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/file_sys/file_backend.h b/src/core/file_sys/file_backend.h index 539ec7314..35890af1f 100644 --- a/src/core/file_sys/file_backend.h +++ b/src/core/file_sys/file_backend.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/file_sys/file_romfs.cpp b/src/core/file_sys/file_romfs.cpp index 5f38c2704..e79936407 100644 --- a/src/core/file_sys/file_romfs.cpp +++ b/src/core/file_sys/file_romfs.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/common_types.h" diff --git a/src/core/file_sys/file_romfs.h b/src/core/file_sys/file_romfs.h index 32fa6b6d3..04d8a16a2 100644 --- a/src/core/file_sys/file_romfs.h +++ b/src/core/file_sys/file_romfs.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/config_mem.cpp b/src/core/hle/config_mem.cpp index d8ba9e6cf..721a600b5 100644 --- a/src/core/hle/config_mem.cpp +++ b/src/core/hle/config_mem.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/common_types.h" diff --git a/src/core/hle/config_mem.h b/src/core/hle/config_mem.h index fa01b5cdb..3975af18f 100644 --- a/src/core/hle/config_mem.h +++ b/src/core/hle/config_mem.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/coprocessor.cpp b/src/core/hle/coprocessor.cpp index e34229a57..425959be4 100644 --- a/src/core/hle/coprocessor.cpp +++ b/src/core/hle/coprocessor.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "core/hle/coprocessor.h" diff --git a/src/core/hle/function_wrappers.h b/src/core/hle/function_wrappers.h index b44479b2f..3259ce9eb 100644 --- a/src/core/hle/function_wrappers.h +++ b/src/core/hle/function_wrappers.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/hle.cpp b/src/core/hle/hle.cpp index cc3d5255a..98f3bb922 100644 --- a/src/core/hle/hle.cpp +++ b/src/core/hle/hle.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/hle/hle.h b/src/core/hle/hle.h index 4ab258c69..59b770f02 100644 --- a/src/core/hle/hle.h +++ b/src/core/hle/hle.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/kernel/address_arbiter.cpp b/src/core/hle/kernel/address_arbiter.cpp index 9a921108d..77491900a 100644 --- a/src/core/hle/kernel/address_arbiter.cpp +++ b/src/core/hle/kernel/address_arbiter.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/common_types.h" diff --git a/src/core/hle/kernel/address_arbiter.h b/src/core/hle/kernel/address_arbiter.h index 8a5fb10b4..030e7ad7b 100644 --- a/src/core/hle/kernel/address_arbiter.h +++ b/src/core/hle/kernel/address_arbiter.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/kernel/event.cpp b/src/core/hle/kernel/event.cpp index 288080209..4de3fab3c 100644 --- a/src/core/hle/kernel/event.cpp +++ b/src/core/hle/kernel/event.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/hle/kernel/event.h b/src/core/hle/kernel/event.h index 73aec4e79..da793df1a 100644 --- a/src/core/hle/kernel/event.h +++ b/src/core/hle/kernel/event.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/kernel/kernel.cpp b/src/core/hle/kernel/kernel.cpp index 6a690e915..5fd06046e 100644 --- a/src/core/hle/kernel/kernel.cpp +++ b/src/core/hle/kernel/kernel.cpp @@ -1,5 +1,5 @@ -// Copyright 2014 Citra Emulator Project / PPSSPP Project -// Licensed under GPLv2 +// Copyright 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/hle/kernel/kernel.h b/src/core/hle/kernel/kernel.h index 7123485be..dca87d93a 100644 --- a/src/core/hle/kernel/kernel.h +++ b/src/core/hle/kernel/kernel.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project / PPSSPP Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/kernel/mutex.cpp b/src/core/hle/kernel/mutex.cpp index 5a173e129..5a18af114 100644 --- a/src/core/hle/kernel/mutex.cpp +++ b/src/core/hle/kernel/mutex.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/hle/kernel/mutex.h b/src/core/hle/kernel/mutex.h index 7f4909a6e..a8ca97014 100644 --- a/src/core/hle/kernel/mutex.h +++ b/src/core/hle/kernel/mutex.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/kernel/semaphore.cpp b/src/core/hle/kernel/semaphore.cpp index 6f56da8a9..1572e8ab2 100644 --- a/src/core/hle/kernel/semaphore.cpp +++ b/src/core/hle/kernel/semaphore.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/hle/kernel/semaphore.h b/src/core/hle/kernel/semaphore.h index f0075fdb8..934499e7b 100644 --- a/src/core/hle/kernel/semaphore.h +++ b/src/core/hle/kernel/semaphore.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/kernel/session.h b/src/core/hle/kernel/session.h index 06ae4bc39..6760f346e 100644 --- a/src/core/hle/kernel/session.h +++ b/src/core/hle/kernel/session.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/kernel/shared_memory.cpp b/src/core/hle/kernel/shared_memory.cpp index 3c8c502c6..2840f13bb 100644 --- a/src/core/hle/kernel/shared_memory.cpp +++ b/src/core/hle/kernel/shared_memory.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/common.h" diff --git a/src/core/hle/kernel/shared_memory.h b/src/core/hle/kernel/shared_memory.h index bb778ec26..bb65c7ccd 100644 --- a/src/core/hle/kernel/shared_memory.h +++ b/src/core/hle/kernel/shared_memory.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/kernel/thread.cpp b/src/core/hle/kernel/thread.cpp index 1c04701de..a47bde9dd 100644 --- a/src/core/hle/kernel/thread.cpp +++ b/src/core/hle/kernel/thread.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project / PPSSPP Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/hle/kernel/thread.h b/src/core/hle/kernel/thread.h index be7adface..34333ef6e 100644 --- a/src/core/hle/kernel/thread.h +++ b/src/core/hle/kernel/thread.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project / PPSSPP Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/result.h b/src/core/hle/result.h index 14d2be4a2..0e9c213e0 100644 --- a/src/core/hle/result.h +++ b/src/core/hle/result.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/ac_u.cpp b/src/core/hle/service/ac_u.cpp index 311682abf..d180bb4ec 100644 --- a/src/core/hle/service/ac_u.cpp +++ b/src/core/hle/service/ac_u.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/ac_u.h b/src/core/hle/service/ac_u.h index c91b28353..097b18c4e 100644 --- a/src/core/hle/service/ac_u.h +++ b/src/core/hle/service/ac_u.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/am_app.cpp b/src/core/hle/service/am_app.cpp index b8b06418c..0b396b6d3 100644 --- a/src/core/hle/service/am_app.cpp +++ b/src/core/hle/service/am_app.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/am_app.h b/src/core/hle/service/am_app.h index 86a5f5b74..30a0be4c5 100644 --- a/src/core/hle/service/am_app.h +++ b/src/core/hle/service/am_app.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/am_net.cpp b/src/core/hle/service/am_net.cpp index 403cac353..943205e9e 100644 --- a/src/core/hle/service/am_net.cpp +++ b/src/core/hle/service/am_net.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/am_net.h b/src/core/hle/service/am_net.h index 4816e1697..c0dbfb444 100644 --- a/src/core/hle/service/am_net.h +++ b/src/core/hle/service/am_net.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/apt_u.cpp b/src/core/hle/service/apt_u.cpp index ebfba4d8d..b9edf0323 100644 --- a/src/core/hle/service/apt_u.cpp +++ b/src/core/hle/service/apt_u.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. diff --git a/src/core/hle/service/apt_u.h b/src/core/hle/service/apt_u.h index 306730400..3807cbecc 100644 --- a/src/core/hle/service/apt_u.h +++ b/src/core/hle/service/apt_u.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/boss_u.cpp b/src/core/hle/service/boss_u.cpp index b2ff4a756..24cd413da 100644 --- a/src/core/hle/service/boss_u.cpp +++ b/src/core/hle/service/boss_u.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/boss_u.h b/src/core/hle/service/boss_u.h index af39b8e65..31e4d0c3a 100644 --- a/src/core/hle/service/boss_u.h +++ b/src/core/hle/service/boss_u.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/cecd_u.cpp b/src/core/hle/service/cecd_u.cpp index 25d903516..b7655ef0b 100644 --- a/src/core/hle/service/cecd_u.cpp +++ b/src/core/hle/service/cecd_u.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/cecd_u.h b/src/core/hle/service/cecd_u.h index 969e1ed1b..0c9968bfe 100644 --- a/src/core/hle/service/cecd_u.h +++ b/src/core/hle/service/cecd_u.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/cfg_i.cpp b/src/core/hle/service/cfg_i.cpp index 88d13d459..e886b7c1f 100644 --- a/src/core/hle/service/cfg_i.cpp +++ b/src/core/hle/service/cfg_i.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/cfg_i.h b/src/core/hle/service/cfg_i.h index fe343c968..577aad236 100644 --- a/src/core/hle/service/cfg_i.h +++ b/src/core/hle/service/cfg_i.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/cfg_u.cpp b/src/core/hle/service/cfg_u.cpp index 2e9d7bf21..6fcd1d7f3 100644 --- a/src/core/hle/service/cfg_u.cpp +++ b/src/core/hle/service/cfg_u.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/cfg_u.h b/src/core/hle/service/cfg_u.h index 8075d19a8..0136bff53 100644 --- a/src/core/hle/service/cfg_u.h +++ b/src/core/hle/service/cfg_u.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/csnd_snd.cpp b/src/core/hle/service/csnd_snd.cpp index 6e59a9bf3..3f62c7e9c 100644 --- a/src/core/hle/service/csnd_snd.cpp +++ b/src/core/hle/service/csnd_snd.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/csnd_snd.h b/src/core/hle/service/csnd_snd.h index 31cc85b07..85aab1dd3 100644 --- a/src/core/hle/service/csnd_snd.h +++ b/src/core/hle/service/csnd_snd.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/dsp_dsp.cpp b/src/core/hle/service/dsp_dsp.cpp index bd82063c6..4c1c5b70b 100644 --- a/src/core/hle/service/dsp_dsp.cpp +++ b/src/core/hle/service/dsp_dsp.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/dsp_dsp.h b/src/core/hle/service/dsp_dsp.h index 9431b62f6..7bf27fe0f 100644 --- a/src/core/hle/service/dsp_dsp.h +++ b/src/core/hle/service/dsp_dsp.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/err_f.cpp b/src/core/hle/service/err_f.cpp index 785c351e9..5c7cce841 100644 --- a/src/core/hle/service/err_f.cpp +++ b/src/core/hle/service/err_f.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/err_f.h b/src/core/hle/service/err_f.h index 6d7141c1b..2c61c3651 100644 --- a/src/core/hle/service/err_f.h +++ b/src/core/hle/service/err_f.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/frd_u.cpp b/src/core/hle/service/frd_u.cpp index 58023e536..c2ecef5bb 100644 --- a/src/core/hle/service/frd_u.cpp +++ b/src/core/hle/service/frd_u.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/frd_u.h b/src/core/hle/service/frd_u.h index 4020c6664..e030f8b3b 100644 --- a/src/core/hle/service/frd_u.h +++ b/src/core/hle/service/frd_u.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/fs/archive.cpp b/src/core/hle/service/fs/archive.cpp index 5ab82729c..d92444160 100644 --- a/src/core/hle/service/fs/archive.cpp +++ b/src/core/hle/service/fs/archive.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/hle/service/fs/archive.h b/src/core/hle/service/fs/archive.h index a128276b6..df04bdb6b 100644 --- a/src/core/hle/service/fs/archive.h +++ b/src/core/hle/service/fs/archive.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/fs/fs_user.cpp b/src/core/hle/service/fs/fs_user.cpp index f99d84b2f..8d11e64b5 100644 --- a/src/core/hle/service/fs/fs_user.cpp +++ b/src/core/hle/service/fs/fs_user.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/common.h" diff --git a/src/core/hle/service/fs/fs_user.h b/src/core/hle/service/fs/fs_user.h index 80e3804e0..af4da269b 100644 --- a/src/core/hle/service/fs/fs_user.h +++ b/src/core/hle/service/fs/fs_user.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/gsp_gpu.cpp b/src/core/hle/service/gsp_gpu.cpp index db8027142..10c157ba6 100644 --- a/src/core/hle/service/gsp_gpu.cpp +++ b/src/core/hle/service/gsp_gpu.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. diff --git a/src/core/hle/service/gsp_gpu.h b/src/core/hle/service/gsp_gpu.h index 177ce8da6..56b5a16c9 100644 --- a/src/core/hle/service/gsp_gpu.h +++ b/src/core/hle/service/gsp_gpu.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/hid_user.cpp b/src/core/hle/service/hid_user.cpp index eb2d35964..cec9b1bfb 100644 --- a/src/core/hle/service/hid_user.cpp +++ b/src/core/hle/service/hid_user.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/hid_user.h b/src/core/hle/service/hid_user.h index 8f53befdb..2164ad896 100644 --- a/src/core/hle/service/hid_user.h +++ b/src/core/hle/service/hid_user.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/ir_rst.cpp b/src/core/hle/service/ir_rst.cpp index be15db231..6145b8b2c 100644 --- a/src/core/hle/service/ir_rst.cpp +++ b/src/core/hle/service/ir_rst.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/ir_rst.h b/src/core/hle/service/ir_rst.h index 73effd7e3..2fdab9f02 100644 --- a/src/core/hle/service/ir_rst.h +++ b/src/core/hle/service/ir_rst.h @@ -1,6 +1,6 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 -// Refer to the license.txt file included. +// Licensed under GPLv2 or any later version +// Refer to the license.txt file included.. #pragma once diff --git a/src/core/hle/service/ir_u.cpp b/src/core/hle/service/ir_u.cpp index aa9db6f6d..db62a9c98 100644 --- a/src/core/hle/service/ir_u.cpp +++ b/src/core/hle/service/ir_u.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/ir_u.h b/src/core/hle/service/ir_u.h index 86d98d079..cf1c73f52 100644 --- a/src/core/hle/service/ir_u.h +++ b/src/core/hle/service/ir_u.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/ldr_ro.cpp b/src/core/hle/service/ldr_ro.cpp index 91b1a6fc5..c08313f9a 100644 --- a/src/core/hle/service/ldr_ro.cpp +++ b/src/core/hle/service/ldr_ro.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/ldr_ro.h b/src/core/hle/service/ldr_ro.h index 32d7c29cf..7716ae74e 100644 --- a/src/core/hle/service/ldr_ro.h +++ b/src/core/hle/service/ldr_ro.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/mic_u.cpp b/src/core/hle/service/mic_u.cpp index d6f30e9ae..399548d4d 100644 --- a/src/core/hle/service/mic_u.cpp +++ b/src/core/hle/service/mic_u.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/mic_u.h b/src/core/hle/service/mic_u.h index 2a495f3a9..26842e5f1 100644 --- a/src/core/hle/service/mic_u.h +++ b/src/core/hle/service/mic_u.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/ndm_u.cpp b/src/core/hle/service/ndm_u.cpp index 37c0661bf..141c311fd 100644 --- a/src/core/hle/service/ndm_u.cpp +++ b/src/core/hle/service/ndm_u.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "core/hle/hle.h" diff --git a/src/core/hle/service/ndm_u.h b/src/core/hle/service/ndm_u.h index 2ca9fcf22..62ed901c2 100644 --- a/src/core/hle/service/ndm_u.h +++ b/src/core/hle/service/ndm_u.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/nim_aoc.cpp b/src/core/hle/service/nim_aoc.cpp index 04c1e0cf3..17d1c4ff5 100644 --- a/src/core/hle/service/nim_aoc.cpp +++ b/src/core/hle/service/nim_aoc.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/nim_aoc.h b/src/core/hle/service/nim_aoc.h index 2cc673118..33aa25c91 100644 --- a/src/core/hle/service/nim_aoc.h +++ b/src/core/hle/service/nim_aoc.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/nwm_uds.cpp b/src/core/hle/service/nwm_uds.cpp index 14df86d85..2491d14d6 100644 --- a/src/core/hle/service/nwm_uds.cpp +++ b/src/core/hle/service/nwm_uds.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/nwm_uds.h b/src/core/hle/service/nwm_uds.h index 69d2c2002..cd27f78fc 100644 --- a/src/core/hle/service/nwm_uds.h +++ b/src/core/hle/service/nwm_uds.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/pm_app.cpp b/src/core/hle/service/pm_app.cpp index 90e9b1bfa..729255348 100644 --- a/src/core/hle/service/pm_app.cpp +++ b/src/core/hle/service/pm_app.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/pm_app.h b/src/core/hle/service/pm_app.h index 28c38f582..7ed617e5e 100644 --- a/src/core/hle/service/pm_app.h +++ b/src/core/hle/service/pm_app.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/ptm_u.cpp b/src/core/hle/service/ptm_u.cpp index b8c0f6da8..da48729da 100644 --- a/src/core/hle/service/ptm_u.cpp +++ b/src/core/hle/service/ptm_u.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/ptm_u.h b/src/core/hle/service/ptm_u.h index f8d9f57be..c9e0c519f 100644 --- a/src/core/hle/service/ptm_u.h +++ b/src/core/hle/service/ptm_u.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/service.cpp b/src/core/hle/service/service.cpp index 2230045e3..ac3f908f8 100644 --- a/src/core/hle/service/service.cpp +++ b/src/core/hle/service/service.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/common.h" diff --git a/src/core/hle/service/service.h b/src/core/hle/service/service.h index 9cd906150..0616822fa 100644 --- a/src/core/hle/service/service.h +++ b/src/core/hle/service/service.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/soc_u.cpp b/src/core/hle/service/soc_u.cpp index 2f8910468..03deabe43 100644 --- a/src/core/hle/service/soc_u.cpp +++ b/src/core/hle/service/soc_u.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/soc_u.h b/src/core/hle/service/soc_u.h index d5590a683..5c9623730 100644 --- a/src/core/hle/service/soc_u.h +++ b/src/core/hle/service/soc_u.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/service/srv.cpp b/src/core/hle/service/srv.cpp index 165fd7aac..05ff1846b 100644 --- a/src/core/hle/service/srv.cpp +++ b/src/core/hle/service/srv.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "core/hle/hle.h" diff --git a/src/core/hle/service/srv.h b/src/core/hle/service/srv.h index 6d5fe5048..4f3e01aca 100644 --- a/src/core/hle/service/srv.h +++ b/src/core/hle/service/srv.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "core/hle/service/service.h" diff --git a/src/core/hle/service/ssl_c.cpp b/src/core/hle/service/ssl_c.cpp index 4aa660ecc..d5b0c4b06 100644 --- a/src/core/hle/service/ssl_c.cpp +++ b/src/core/hle/service/ssl_c.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/log.h" diff --git a/src/core/hle/service/ssl_c.h b/src/core/hle/service/ssl_c.h index 7b4e7fd8a..6281503a5 100644 --- a/src/core/hle/service/ssl_c.h +++ b/src/core/hle/service/ssl_c.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hle/svc.cpp b/src/core/hle/svc.cpp index 47e9bf77e..4d39e7d0b 100644 --- a/src/core/hle/svc.cpp +++ b/src/core/hle/svc.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/hle/svc.h b/src/core/hle/svc.h index 6be393d0b..ad780818e 100644 --- a/src/core/hle/svc.h +++ b/src/core/hle/svc.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hw/gpu.cpp b/src/core/hw/gpu.cpp index da78b85e5..67a8bc324 100644 --- a/src/core/hw/gpu.cpp +++ b/src/core/hw/gpu.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/common_types.h" diff --git a/src/core/hw/gpu.h b/src/core/hw/gpu.h index 86cd5e680..68f11bfcb 100644 --- a/src/core/hw/gpu.h +++ b/src/core/hw/gpu.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/hw/hw.cpp b/src/core/hw/hw.cpp index af42b41fb..848ab5348 100644 --- a/src/core/hw/hw.cpp +++ b/src/core/hw/hw.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/common_types.h" diff --git a/src/core/hw/hw.h b/src/core/hw/hw.h index 1055ed94f..991c0a07d 100644 --- a/src/core/hw/hw.h +++ b/src/core/hw/hw.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/loader/3dsx.cpp b/src/core/loader/3dsx.cpp index 0437e5374..5a4f7e7d9 100644 --- a/src/core/loader/3dsx.cpp +++ b/src/core/loader/3dsx.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/loader/3dsx.h b/src/core/loader/3dsx.h index 848d3ef8a..da8836662 100644 --- a/src/core/loader/3dsx.h +++ b/src/core/loader/3dsx.h @@ -1,5 +1,5 @@ // Copyright 2014 Dolphin Emulator Project / Citra Emulator Project -// Licensed under GPLv2+ +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/loader/elf.cpp b/src/core/loader/elf.cpp index c95882f4a..354335014 100644 --- a/src/core/loader/elf.cpp +++ b/src/core/loader/elf.cpp @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/loader/elf.h b/src/core/loader/elf.h index 5ae88439a..c221cce6d 100644 --- a/src/core/loader/elf.h +++ b/src/core/loader/elf.h @@ -1,5 +1,5 @@ -// Copyright 2013 Dolphin Emulator Project / Citra Emulator Project -// Licensed under GPLv2 +// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/loader/loader.cpp b/src/core/loader/loader.cpp index 480274d23..74a29ac61 100644 --- a/src/core/loader/loader.cpp +++ b/src/core/loader/loader.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/loader/loader.h b/src/core/loader/loader.h index 0f836d285..ec5534d41 100644 --- a/src/core/loader/loader.h +++ b/src/core/loader/loader.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/loader/ncch.cpp b/src/core/loader/ncch.cpp index 4d23656ec..0dc21699e 100644 --- a/src/core/loader/ncch.cpp +++ b/src/core/loader/ncch.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/loader/ncch.h b/src/core/loader/ncch.h index 2fe2a7d82..fd9258970 100644 --- a/src/core/loader/ncch.h +++ b/src/core/loader/ncch.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/mem_map.cpp b/src/core/mem_map.cpp index d1c44ed24..eea6c5bf1 100644 --- a/src/core/mem_map.cpp +++ b/src/core/mem_map.cpp @@ -1,5 +1,5 @@ - // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Copyright 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/common.h" diff --git a/src/core/mem_map.h b/src/core/mem_map.h index 7b750f848..e63e81a4b 100644 --- a/src/core/mem_map.h +++ b/src/core/mem_map.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/mem_map_funcs.cpp b/src/core/mem_map_funcs.cpp index 7f7e77233..0f378eaee 100644 --- a/src/core/mem_map_funcs.cpp +++ b/src/core/mem_map_funcs.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/core/settings.cpp b/src/core/settings.cpp index c486f6274..8a14f75aa 100644 --- a/src/core/settings.cpp +++ b/src/core/settings.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "settings.h" diff --git a/src/core/settings.h b/src/core/settings.h index 138ffc615..4808872ae 100644 --- a/src/core/settings.h +++ b/src/core/settings.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/core/system.cpp b/src/core/system.cpp index 2885ff45f..d6188f055 100644 --- a/src/core/system.cpp +++ b/src/core/system.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "core/core.h" diff --git a/src/core/system.h b/src/core/system.h index 2bc2edc75..05d836530 100644 --- a/src/core/system.h +++ b/src/core/system.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/video_core/clipper.cpp b/src/video_core/clipper.cpp index 632fb959a..0bcd0b895 100644 --- a/src/video_core/clipper.cpp +++ b/src/video_core/clipper.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/video_core/clipper.h b/src/video_core/clipper.h index 14d31ca1e..19ce8e140 100644 --- a/src/video_core/clipper.h +++ b/src/video_core/clipper.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/video_core/command_processor.cpp b/src/video_core/command_processor.cpp index b74cd3261..d77dd2237 100644 --- a/src/video_core/command_processor.cpp +++ b/src/video_core/command_processor.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "clipper.h" diff --git a/src/video_core/command_processor.h b/src/video_core/command_processor.h index 955f9daec..bb3d4150f 100644 --- a/src/video_core/command_processor.h +++ b/src/video_core/command_processor.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/video_core/gpu_debugger.h b/src/video_core/gpu_debugger.h index 16b1656bb..5c5ece82d 100644 --- a/src/video_core/gpu_debugger.h +++ b/src/video_core/gpu_debugger.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/video_core/math.h b/src/video_core/math.h index 83ba81235..9622e7614 100644 --- a/src/video_core/math.h +++ b/src/video_core/math.h @@ -1,4 +1,4 @@ -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. diff --git a/src/video_core/pica.h b/src/video_core/pica.h index 4c3791ad9..a3d5f708f 100644 --- a/src/video_core/pica.h +++ b/src/video_core/pica.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/video_core/primitive_assembly.cpp b/src/video_core/primitive_assembly.cpp index 102693ed9..ad3b9d566 100644 --- a/src/video_core/primitive_assembly.cpp +++ b/src/video_core/primitive_assembly.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "pica.h" diff --git a/src/video_core/primitive_assembly.h b/src/video_core/primitive_assembly.h index ea2e2f61e..116bd5de1 100644 --- a/src/video_core/primitive_assembly.h +++ b/src/video_core/primitive_assembly.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/video_core/rasterizer.cpp b/src/video_core/rasterizer.cpp index b7e04a560..4708c5ed8 100644 --- a/src/video_core/rasterizer.cpp +++ b/src/video_core/rasterizer.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/video_core/rasterizer.h b/src/video_core/rasterizer.h index 500be9462..42148f8b1 100644 --- a/src/video_core/rasterizer.h +++ b/src/video_core/rasterizer.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/video_core/renderer_base.h b/src/video_core/renderer_base.h index bce402b88..b77f29c11 100644 --- a/src/video_core/renderer_base.h +++ b/src/video_core/renderer_base.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/video_core/renderer_opengl/gl_shader_util.cpp b/src/video_core/renderer_opengl/gl_shader_util.cpp index d0f82e6cd..e982e3746 100644 --- a/src/video_core/renderer_opengl/gl_shader_util.cpp +++ b/src/video_core/renderer_opengl/gl_shader_util.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "gl_shader_util.h" diff --git a/src/video_core/renderer_opengl/gl_shader_util.h b/src/video_core/renderer_opengl/gl_shader_util.h index 986cbabc0..9b93a8a0c 100644 --- a/src/video_core/renderer_opengl/gl_shader_util.h +++ b/src/video_core/renderer_opengl/gl_shader_util.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/video_core/renderer_opengl/gl_shaders.h b/src/video_core/renderer_opengl/gl_shaders.h index 0f88ab802..746a37afe 100644 --- a/src/video_core/renderer_opengl/gl_shaders.h +++ b/src/video_core/renderer_opengl/gl_shaders.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/video_core/renderer_opengl/renderer_opengl.cpp b/src/video_core/renderer_opengl/renderer_opengl.cpp index e2caeeb8f..7bf36eca6 100644 --- a/src/video_core/renderer_opengl/renderer_opengl.cpp +++ b/src/video_core/renderer_opengl/renderer_opengl.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "core/hw/gpu.h" diff --git a/src/video_core/renderer_opengl/renderer_opengl.h b/src/video_core/renderer_opengl/renderer_opengl.h index 7fdcec731..cf78c1e77 100644 --- a/src/video_core/renderer_opengl/renderer_opengl.h +++ b/src/video_core/renderer_opengl/renderer_opengl.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/video_core/utils.cpp b/src/video_core/utils.cpp index f1156a493..c7cc93cea 100644 --- a/src/video_core/utils.cpp +++ b/src/video_core/utils.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/video_core/utils.h b/src/video_core/utils.h index 21380a908..63ebccbde 100644 --- a/src/video_core/utils.h +++ b/src/video_core/utils.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/video_core/vertex_shader.cpp b/src/video_core/vertex_shader.cpp index 477e78cfe..04d439cc6 100644 --- a/src/video_core/vertex_shader.cpp +++ b/src/video_core/vertex_shader.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include diff --git a/src/video_core/vertex_shader.h b/src/video_core/vertex_shader.h index bfb6fb6e3..e5f256bcb 100644 --- a/src/video_core/vertex_shader.h +++ b/src/video_core/vertex_shader.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once diff --git a/src/video_core/video_core.cpp b/src/video_core/video_core.cpp index 6791e4007..c9707e5f1 100644 --- a/src/video_core/video_core.cpp +++ b/src/video_core/video_core.cpp @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include "common/common.h" diff --git a/src/video_core/video_core.h b/src/video_core/video_core.h index 609aac513..b782f17bd 100644 --- a/src/video_core/video_core.h +++ b/src/video_core/video_core.h @@ -1,5 +1,5 @@ // Copyright 2014 Citra Emulator Project -// Licensed under GPLv2 +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #pragma once -- cgit v1.2.3 From 0199a7d9ef26516779f73192dd41738ce4116c20 Mon Sep 17 00:00:00 2001 From: Chin Date: Sat, 20 Dec 2014 18:28:17 -0500 Subject: More warning cleanups --- src/common/bit_field.h | 6 ++++++ src/core/arm/dyncom/arm_dyncom_dec.h | 2 -- src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 12 ++++++------ src/core/arm/dyncom/arm_dyncom_run.cpp | 1 - src/core/hle/service/apt_u.cpp | 4 ++-- src/video_core/command_processor.cpp | 4 ++-- src/video_core/pica.h | 10 +++++----- 7 files changed, 21 insertions(+), 18 deletions(-) (limited to 'src/core/arm') diff --git a/src/common/bit_field.h b/src/common/bit_field.h index 3ec061e63..7c633f01f 100644 --- a/src/common/bit_field.h +++ b/src/common/bit_field.h @@ -168,6 +168,12 @@ public: } } + // TODO: we may want to change this to explicit operator bool() if it's bug-free in VS2015 + __forceinline bool ToBool() const + { + return Value() != 0; + } + private: // StorageType is T for non-enum types and the underlying type of T if // T is an enumeration. Note that T is wrapped within an enable_if in the diff --git a/src/core/arm/dyncom/arm_dyncom_dec.h b/src/core/arm/dyncom/arm_dyncom_dec.h index 19d94f369..70eb96e93 100644 --- a/src/core/arm/dyncom/arm_dyncom_dec.h +++ b/src/core/arm/dyncom/arm_dyncom_dec.h @@ -56,8 +56,6 @@ #define RN ((instr >> 16) & 0xF) /*xxxx xxxx xxxx xxxx xxxx xxxx xxxx 1111 */ #define RM (instr & 0xF) -#define BIT(n) ((instr >> (n)) & 1) -#define BITS(a,b) ((instr >> (a)) & ((1 << (1+(b)-(a)))-1)) /* CP15 registers */ #define OPCODE_1 BITS(21, 23) diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 84b4a38f0..085edb0ee 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -3746,9 +3746,9 @@ unsigned InterpreterMainLoop(ARMul_State* state) #define INC_ICOUNTER cpu->icounter++; \ if(cpu->Reg[15] > 0xc0000000) \ cpu->kernel_icounter++; - //if (debug_function(core)) \ + /*if (debug_function(core)) \ if (core->check_int_flag) \ - goto END + goto END*/ //LOG_TRACE(Core_ARM11, "icounter is %llx pc is %x\n", cpu->icounter, cpu->Reg[15]) #else #define INC_ICOUNTER ; @@ -3969,18 +3969,18 @@ unsigned InterpreterMainLoop(ARMul_State* state) #define UPDATE_NFLAG(dst) (cpu->NFlag = BIT(dst, 31) ? 1 : 0) #define UPDATE_ZFLAG(dst) (cpu->ZFlag = dst ? 0 : 1) -// #define UPDATE_CFLAG(dst, lop, rop) (cpu->CFlag = ((ISNEG(lop) && ISPOS(rop)) || \ +/* #define UPDATE_CFLAG(dst, lop, rop) (cpu->CFlag = ((ISNEG(lop) && ISPOS(rop)) || \ (ISNEG(lop) && ISPOS(dst)) || \ - (ISPOS(rop) && ISPOS(dst)))) + (ISPOS(rop) && ISPOS(dst)))) */ #define UPDATE_CFLAG(dst, lop, rop) (cpu->CFlag = ((dst < lop) || (dst < rop))) #define UPDATE_CFLAG_CARRY_FROM_ADD(lop, rop, flag) (cpu->CFlag = (((uint64_t) lop + (uint64_t) rop + (uint64_t) flag) > 0xffffffff) ) #define UPDATE_CFLAG_NOT_BORROW_FROM_FLAG(lop, rop, flag) (cpu->CFlag = ((uint64_t) lop >= ((uint64_t) rop + (uint64_t) flag))) #define UPDATE_CFLAG_NOT_BORROW_FROM(lop, rop) (cpu->CFlag = (lop >= rop)) #define UPDATE_CFLAG_WITH_NOT(dst, lop, rop) (cpu->CFlag = !(dst < lop)) #define UPDATE_CFLAG_WITH_SC cpu->CFlag = cpu->shifter_carry_out -// #define UPDATE_CFLAG_WITH_NOT(dst, lop, rop) cpu->CFlag = !((ISNEG(lop) && ISPOS(rop)) || \ +/* #define UPDATE_CFLAG_WITH_NOT(dst, lop, rop) cpu->CFlag = !((ISNEG(lop) && ISPOS(rop)) || \ (ISNEG(lop) && ISPOS(dst)) || \ - (ISPOS(rop) && ISPOS(dst))) + (ISPOS(rop) && ISPOS(dst))) */ #define UPDATE_VFLAG(dst, lop, rop) (cpu->VFlag = (((lop < 0) && (rop < 0) && (dst >= 0)) || \ ((lop >= 0) && (rop) >= 0 && (dst < 0)))) #define UPDATE_VFLAG_WITH_NOT(dst, lop, rop) (cpu->VFlag = !(((lop < 0) && (rop < 0) && (dst >= 0)) || \ diff --git a/src/core/arm/dyncom/arm_dyncom_run.cpp b/src/core/arm/dyncom/arm_dyncom_run.cpp index a2026cbf3..b66b92cf5 100644 --- a/src/core/arm/dyncom/arm_dyncom_run.cpp +++ b/src/core/arm/dyncom/arm_dyncom_run.cpp @@ -29,7 +29,6 @@ void switch_mode(arm_core_t *core, uint32_t mode) { - uint32_t tmp1, tmp2; if (core->Mode == mode) { //Mode not changed. //printf("mode not changed\n"); diff --git a/src/core/hle/service/apt_u.cpp b/src/core/hle/service/apt_u.cpp index ebfba4d8d..28b2517d8 100644 --- a/src/core/hle/service/apt_u.cpp +++ b/src/core/hle/service/apt_u.cpp @@ -315,8 +315,8 @@ Interface::Interface() { if (file.IsOpen()) { // Read shared font data - shared_font.resize(file.GetSize()); - file.ReadBytes(shared_font.data(), file.GetSize()); + shared_font.resize((size_t)file.GetSize()); + file.ReadBytes(shared_font.data(), (size_t)file.GetSize()); // Create shared font memory object shared_font_mem = Kernel::CreateSharedMemory("APT_U:shared_font_mem"); diff --git a/src/video_core/command_processor.cpp b/src/video_core/command_processor.cpp index 9b8ecf8e3..0cc95860d 100644 --- a/src/video_core/command_processor.cpp +++ b/src/video_core/command_processor.cpp @@ -90,7 +90,7 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) { const auto& index_info = registers.index_array; const u8* index_address_8 = Memory::GetPointer(PAddrToVAddr(base_address + index_info.offset)); const u16* index_address_16 = (u16*)index_address_8; - bool index_u16 = (bool)index_info.format; + bool index_u16 = index_info.format != 0; DebugUtils::GeometryDumper geometry_dumper; PrimitiveAssembler clipper_primitive_assembler(registers.triangle_topology.Value()); @@ -164,7 +164,7 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) { case PICA_REG_INDEX(vs_bool_uniforms): for (unsigned i = 0; i < 16; ++i) - VertexShader::GetBoolUniform(i) = (registers.vs_bool_uniforms.Value() & (1 << i)); + VertexShader::GetBoolUniform(i) = (registers.vs_bool_uniforms.Value() & (1 << i)) != 0; break; diff --git a/src/video_core/pica.h b/src/video_core/pica.h index 06552a3ef..c98425f39 100644 --- a/src/video_core/pica.h +++ b/src/video_core/pica.h @@ -201,9 +201,9 @@ struct Regs { }; const std::array GetTextures() const { return {{ - { static_cast(texture0_enable), texture0, texture0_format }, - { static_cast(texture1_enable), texture1, texture1_format }, - { static_cast(texture2_enable), texture2, texture2_format } + { texture0_enable.ToBool(), texture0, texture0_format }, + { texture1_enable.ToBool(), texture1, texture1_format }, + { texture2_enable.ToBool(), texture2, texture2_format } }}; } @@ -590,11 +590,11 @@ struct Regs { static std::string GetCommandName(int index) { std::map map; - Regs regs; #define ADD_FIELD(name) \ do { \ map.insert({PICA_REG_INDEX(name), #name}); \ - for (u32 i = PICA_REG_INDEX(name) + 1; i < PICA_REG_INDEX(name) + sizeof(regs.name) / 4; ++i) \ + /* TODO: change to Regs::name when VS2015 and other compilers support it */ \ + for (u32 i = PICA_REG_INDEX(name) + 1; i < PICA_REG_INDEX(name) + sizeof(Regs().name) / 4; ++i) \ map.insert({i, #name + std::string("+") + std::to_string(i-PICA_REG_INDEX(name))}); \ } while(false) -- cgit v1.2.3 From c6f27055c9078261e23e09351c30b80e6a98e58c Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 21 Dec 2014 01:58:03 -0500 Subject: dyncom: Move over SASX/SSAX/SADD16/SSUB16 --- src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 109 +++++++++++++++++++++++-- 1 file changed, 102 insertions(+), 7 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 84b4a38f0..b6b94b7a8 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -1019,6 +1019,15 @@ typedef struct _arm_inst { char component[0]; } arm_inst; +typedef struct generic_arm_inst { + u32 Ra; + u32 Rm; + u32 Rn; + u32 Rd; + u8 op1; + u8 op2; +} generic_arm_inst; + typedef struct _adc_inst { unsigned int I; unsigned int S; @@ -2469,9 +2478,29 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(rsc)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(sadd16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SADD16"); } ARM_INST_PTR INTERPRETER_TRANSLATE(sadd8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SADD8"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(saddsubx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SADDSUBX"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(sadd16)(unsigned int inst, int index) +{ + arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); + generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; + + inst_base->cond = BITS(inst, 28, 31); + inst_base->idx = index; + inst_base->br = NON_BRANCH; + inst_base->load_r15 = 0; + + inst_cream->Rm = BITS(inst, 0, 3); + inst_cream->Rn = BITS(inst, 16, 19); + inst_cream->Rd = BITS(inst, 12, 15); + inst_cream->op1 = BITS(inst, 20, 21); + inst_cream->op2 = BITS(inst, 5, 7); + + return inst_base; +} +ARM_INST_PTR INTERPRETER_TRANSLATE(saddsubx)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(sadd16)(inst, index); +} ARM_INST_PTR INTERPRETER_TRANSLATE(sbc)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sbc_inst)); @@ -2637,9 +2666,15 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(smusd)(unsigned int inst, int index) { UNI ARM_INST_PTR INTERPRETER_TRANSLATE(srs)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SRS"); } ARM_INST_PTR INTERPRETER_TRANSLATE(ssat)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SSAT"); } ARM_INST_PTR INTERPRETER_TRANSLATE(ssat16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SSAT16"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(ssub16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SSUB16"); } ARM_INST_PTR INTERPRETER_TRANSLATE(ssub8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SSUB8"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(ssubaddx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SSUBADDX"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(ssub16)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(sadd16)(inst, index); +} +ARM_INST_PTR INTERPRETER_TRANSLATE(ssubaddx)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(sadd16)(inst, index); +} ARM_INST_PTR INTERPRETER_TRANSLATE(stc)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(stc_inst)); @@ -5626,9 +5661,71 @@ unsigned InterpreterMainLoop(ARMul_State* state) FETCH_INST; GOTO_NEXT_INST; } - SADD16_INST: SADD8_INST: + + SADD16_INST: SADDSUBX_INST: + SSUBADDX_INST: + SSUB16_INST: + { + INC_ICOUNTER; + if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { + generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; + + const s16 rn_lo = (RN & 0xFFFF); + const s16 rn_hi = ((RN >> 16) & 0xFFFF); + const s16 rm_lo = (RM & 0xFFFF); + const s16 rm_hi = ((RM >> 16) & 0xFFFF); + + s32 lo_result = 0; + s32 hi_result = 0; + + // SADD16 + if (inst_cream->op2 == 0x00) { + lo_result = (rn_lo + rm_lo); + hi_result = (rn_hi + rm_hi); + } + // SASX + else if (inst_cream->op2 == 0x01) { + lo_result = (rn_lo - rm_hi); + hi_result = (rn_hi + rm_lo); + } + // SSAX + else if (inst_cream->op2 == 0x02) { + lo_result = (rn_lo + rm_hi); + hi_result = (rn_hi - rm_lo); + } + // SSUB16 + else if (inst_cream->op2 == 0x03) { + lo_result = (rn_lo - rm_lo); + hi_result = (rn_hi - rm_hi); + } + + RD = (lo_result & 0xFFFF) | ((hi_result & 0xFFFF) << 16); + + if (lo_result >= 0) { + cpu->Cpsr |= (1 << 16); + cpu->Cpsr |= (1 << 17); + } else { + cpu->Cpsr &= ~(1 << 16); + cpu->Cpsr &= ~(1 << 17); + } + + if (hi_result >= 0) { + cpu->Cpsr |= (1 << 18); + cpu->Cpsr |= (1 << 19); + } else { + cpu->Cpsr &= ~(1 << 18); + cpu->Cpsr &= ~(1 << 19); + } + } + + cpu->Reg[15] += GET_INST_SIZE(cpu); + INC_PC(sizeof(generic_arm_inst)); + FETCH_INST; + GOTO_NEXT_INST; + } + SBC_INST: { INC_ICOUNTER; @@ -5851,9 +5948,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) SRS_INST: SSAT_INST: SSAT16_INST: - SSUB16_INST: SSUB8_INST: - SSUBADDX_INST: STC_INST: { INC_ICOUNTER; -- cgit v1.2.3 From 245276c9cc413cedec72e0d1336a15ff611381b6 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 21 Dec 2014 21:19:15 -0500 Subject: dyncom: Move SEL over --- src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 59 +++++++++++++++++++++++++- 1 file changed, 58 insertions(+), 1 deletion(-) (limited to 'src/core/arm') diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index b6b94b7a8..df698e8f1 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -2525,7 +2525,24 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(sbc)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(sel)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SEL"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(sel)(unsigned int inst, int index) +{ + arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); + generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; + + inst_base->cond = BITS(inst, 28, 31); + inst_base->idx = index; + inst_base->br = NON_BRANCH; + inst_base->load_r15 = 0; + + inst_cream->Rm = BITS(inst, 0, 3); + inst_cream->Rn = BITS(inst, 16, 19); + inst_cream->Rd = BITS(inst, 12, 15); + inst_cream->op1 = BITS(inst, 20, 22); + inst_cream->op2 = BITS(inst, 5, 7); + + return inst_base; +} ARM_INST_PTR INTERPRETER_TRANSLATE(setend)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SETEND"); } ARM_INST_PTR INTERPRETER_TRANSLATE(shadd16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SHADD16"); } ARM_INST_PTR INTERPRETER_TRANSLATE(shadd8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("SHADD8"); } @@ -5764,7 +5781,47 @@ unsigned InterpreterMainLoop(ARMul_State* state) FETCH_INST; GOTO_NEXT_INST; } + SEL_INST: + { + INC_ICOUNTER; + if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { + generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; + + const u32 to = RM; + const u32 from = RN; + const u32 cpsr = cpu->Cpsr; + + u32 result; + if (cpsr & (1 << 16)) + result = from & 0xff; + else + result = to & 0xff; + + if (cpsr & (1 << 17)) + result |= from & 0x0000ff00; + else + result |= to & 0x0000ff00; + + if (cpsr & (1 << 18)) + result |= from & 0x00ff0000; + else + result |= to & 0x00ff0000; + + if (cpsr & (1 << 19)) + result |= from & 0xff000000; + else + result |= to & 0xff000000; + + RD = result; + } + + cpu->Reg[15] += GET_INST_SIZE(cpu); + INC_PC(sizeof(generic_arm_inst)); + FETCH_INST; + GOTO_NEXT_INST; + } + SETEND_INST: SHADD16_INST: SHADD8_INST: -- cgit v1.2.3 From 97f3e884d2543b293dba548791151b39469983ab Mon Sep 17 00:00:00 2001 From: Lioncash Date: Mon, 22 Dec 2014 01:09:42 -0500 Subject: dyncom: Move over QADD16/QASX/QSAX/QSUB16 --- src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 94 ++++++++++++++++++++++++-- 1 file changed, 87 insertions(+), 7 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index ae407585e..460001b1a 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -2390,15 +2390,41 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(pld)(unsigned int inst, int index) return inst_base; } ARM_INST_PTR INTERPRETER_TRANSLATE(qadd)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QADD"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(qadd16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QADD16"); } ARM_INST_PTR INTERPRETER_TRANSLATE(qadd8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QADD8"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(qaddsubx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QADDSUBX"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(qadd16)(unsigned int inst, int index) +{ + arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); + generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; + + inst_base->cond = BITS(inst, 28, 31); + inst_base->idx = index; + inst_base->br = NON_BRANCH; + inst_base->load_r15 = 0; + + inst_cream->Rm = BITS(inst, 0, 3); + inst_cream->Rn = BITS(inst, 16, 19); + inst_cream->Rd = BITS(inst, 12, 15); + inst_cream->op1 = BITS(inst, 20, 21); + inst_cream->op2 = BITS(inst, 5, 7); + + return inst_base; +} +ARM_INST_PTR INTERPRETER_TRANSLATE(qaddsubx)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(qadd16)(inst, index); +} ARM_INST_PTR INTERPRETER_TRANSLATE(qdadd)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QDADD"); } ARM_INST_PTR INTERPRETER_TRANSLATE(qdsub)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QDSUB"); } ARM_INST_PTR INTERPRETER_TRANSLATE(qsub)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QSUB"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(qsub16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QSUB16"); } ARM_INST_PTR INTERPRETER_TRANSLATE(qsub8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QSUB8"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(qsubaddx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("QSUBADDX"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(qsub16)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(qadd16)(inst, index); +} +ARM_INST_PTR INTERPRETER_TRANSLATE(qsubaddx)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(qadd16)(inst, index); +} ARM_INST_PTR INTERPRETER_TRANSLATE(rev)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(rev_inst)); @@ -5561,15 +5587,69 @@ unsigned InterpreterMainLoop(ARMul_State* state) GOTO_NEXT_INST; } QADD_INST: - QADD16_INST: QADD8_INST: + + QADD16_INST: QADDSUBX_INST: + QSUB16_INST: + QSUBADDX_INST: + { + INC_ICOUNTER; + if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { + generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; + const s16 rm_lo = (RM & 0xFFFF); + const s16 rm_hi = ((RM >> 16) & 0xFFFF); + const s16 rn_lo = (RN & 0xFFFF); + const s16 rn_hi = ((RN >> 16) & 0xFFFF); + const u8 op2 = inst_cream->op2; + + s32 lo_result = 0; + s32 hi_result = 0; + + // QADD16 + if (op2 == 0x00) { + lo_result = (rn_lo + rm_lo); + hi_result = (rn_hi + rm_hi); + } + // QASX + else if (op2 == 0x01) { + lo_result = (rn_lo - rm_hi); + hi_result = (rn_hi + rm_lo); + } + // QSAX + else if (op2 == 0x02) { + lo_result = (rn_lo + rm_hi); + hi_result = (rn_hi - rm_lo); + } + // QSUB16 + else if (op2 == 0x03) { + lo_result = (rn_lo - rm_lo); + hi_result = (rn_hi - rm_hi); + } + + if (lo_result > 0x7FFF) + lo_result = 0x7FFF; + else if (lo_result < -0x8000) + lo_result = -0x8000; + + if (hi_result > 0x7FFF) + hi_result = 0x7FFF; + else if (hi_result < -0x8000) + hi_result = -0x8000; + + RD = (lo_result & 0xFFFF) | ((hi_result & 0xFFFF) << 16); + } + + cpu->Reg[15] += GET_INST_SIZE(cpu); + INC_PC(sizeof(generic_arm_inst)); + FETCH_INST; + GOTO_NEXT_INST; + } + QDADD_INST: QDSUB_INST: QSUB_INST: - QSUB16_INST: QSUB8_INST: - QSUBADDX_INST: REV_INST: { INC_ICOUNTER; -- cgit v1.2.3 From 8c723224225f65557d115683f473748d43d15eac Mon Sep 17 00:00:00 2001 From: Lioncash Date: Mon, 22 Dec 2014 21:44:03 -0500 Subject: armemu: Fix retrieval of the CPSR in MRS instructions. --- src/core/arm/interpreter/armemu.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 610e04f10..db9d12797 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -1724,7 +1724,7 @@ mainswitch: TAKEABORT; } else if ((BITS (0, 11) == 0) && (LHSReg == 15)) { /* MRS CPSR */ UNDEF_MRSPC; - DEST = ECC | EINT | EMODE; + DEST = ARMul_GetCPSR(state); } else { UNDEF_Test; } -- cgit v1.2.3 From 8e2accd9746d33116c6398e6f30db5b8b4e1f188 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Mon, 22 Dec 2014 22:10:47 -0500 Subject: armemu: Fix construction of the CPSR --- src/core/arm/interpreter/armemu.cpp | 55 ++++++++++++++++++++++++++++++------ src/core/arm/interpreter/armsupp.cpp | 5 ++-- src/core/arm/skyeye_common/armdefs.h | 2 +- src/core/arm/skyeye_common/armemu.h | 7 +++-- 4 files changed, 54 insertions(+), 15 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 610e04f10..d19d3a49f 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -5877,6 +5877,8 @@ L_stm_s_takeabort: state->Cpsr &= ~(1 << 18); state->Cpsr &= ~(1 << 19); } + + ARMul_CPSRAltered(state); return 1; } // SADD8/SSUB8 @@ -5948,6 +5950,7 @@ L_stm_s_takeabort: state->Cpsr &= ~(1 << 19); } + ARMul_CPSRAltered(state); state->Reg[rd_idx] = (lo_val1 | lo_val2 << 8 | hi_val1 << 16 | hi_val2 << 24); return 1; } @@ -6024,15 +6027,33 @@ L_stm_s_takeabort: if ((instr & 0x0F0) == 0x070) { // USUB16 h1 = ((u16)from - (u16)to); h2 = ((u16)(from >> 16) - (u16)(to >> 16)); - if (!(h1 & 0xffff0000)) state->Cpsr |= (3 << 16); - if (!(h2 & 0xffff0000)) state->Cpsr |= (3 << 18); + + if (!(h1 & 0xffff0000)) + state->Cpsr |= (3 << 16); + else + state->Cpsr &= ~(3 << 16); + + if (!(h2 & 0xffff0000)) + state->Cpsr |= (3 << 18); + else + state->Cpsr &= ~(3 << 18); } else { // UADD16 h1 = ((u16)from + (u16)to); h2 = ((u16)(from >> 16) + (u16)(to >> 16)); - if (h1 & 0xffff0000) state->Cpsr |= (3 << 16); - if (h2 & 0xffff0000) state->Cpsr |= (3 << 18); + + if (h1 & 0xffff0000) + state->Cpsr |= (3 << 16); + else + state->Cpsr &= ~(3 << 16); + + if (h2 & 0xffff0000) + state->Cpsr |= (3 << 18); + else + state->Cpsr &= ~(3 << 18); } + + ARMul_CPSRAltered(state); state->Reg[rd] = (u32)((h1 & 0xffff) | ((h2 & 0xffff) << 16)); return 1; } @@ -6045,10 +6066,26 @@ L_stm_s_takeabort: b2 = ((u8)(from >> 8) - (u8)(to >> 8)); b3 = ((u8)(from >> 16) - (u8)(to >> 16)); b4 = ((u8)(from >> 24) - (u8)(to >> 24)); - if (!(b1 & 0xffffff00)) state->Cpsr |= (1 << 16); - if (!(b2 & 0xffffff00)) state->Cpsr |= (1 << 17); - if (!(b3 & 0xffffff00)) state->Cpsr |= (1 << 18); - if (!(b4 & 0xffffff00)) state->Cpsr |= (1 << 19); + + if (!(b1 & 0xffffff00)) + state->Cpsr |= (1 << 16); + else + state->Cpsr &= ~(1 << 16); + + if (!(b2 & 0xffffff00)) + state->Cpsr |= (1 << 17); + else + state->Cpsr &= ~(1 << 17); + + if (!(b3 & 0xffffff00)) + state->Cpsr |= (1 << 18); + else + state->Cpsr &= ~(1 << 18); + + if (!(b4 & 0xffffff00)) + state->Cpsr |= (1 << 19); + else + state->Cpsr &= ~(1 << 19); } else { // UADD8 b1 = ((u8)from + (u8)to); @@ -6071,13 +6108,13 @@ L_stm_s_takeabort: else state->Cpsr &= ~(1 << 18); - if (b4 & 0xffffff00) state->Cpsr |= (1 << 19); else state->Cpsr &= ~(1 << 19); } + ARMul_CPSRAltered(state); state->Reg[rd] = (u32)(b1 | (b2 & 0xff) << 8 | (b3 & 0xff) << 16 | (b4 & 0xff) << 24); return 1; } diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp index 30519f216..b31c0ea24 100644 --- a/src/core/arm/interpreter/armsupp.cpp +++ b/src/core/arm/interpreter/armsupp.cpp @@ -227,8 +227,9 @@ ARMul_CPSRAltered (ARMul_State * state) //state->Cpsr &= ~CBIT; ASSIGNV ((state->Cpsr & VBIT) != 0); //state->Cpsr &= ~VBIT; - ASSIGNS ((state->Cpsr & SBIT) != 0); - //state->Cpsr &= ~SBIT; + ASSIGNQ ((state->Cpsr & QBIT) != 0); + //state->Cpsr &= ~QBIT; + state->GEFlag = (state->Cpsr & 0x000F0000); #ifdef MODET ASSIGNT ((state->Cpsr & TBIT) != 0); //state->Cpsr &= ~TBIT; diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h index 28a4a0db4..34eb5aaf7 100644 --- a/src/core/arm/skyeye_common/armdefs.h +++ b/src/core/arm/skyeye_common/armdefs.h @@ -198,7 +198,7 @@ struct ARMul_State //ARMword translate_pc; /* add armv6 flags dyf:2010-08-09 */ - ARMword GEFlag, EFlag, AFlag, QFlags; + ARMword GEFlag, EFlag, AFlag, QFlag; //chy:2003-08-19, used in arm v5e|xscale ARMword SFlag; #ifdef MODET diff --git a/src/core/arm/skyeye_common/armemu.h b/src/core/arm/skyeye_common/armemu.h index 7f7c0e682..e1b286f0f 100644 --- a/src/core/arm/skyeye_common/armemu.h +++ b/src/core/arm/skyeye_common/armemu.h @@ -34,7 +34,7 @@ #define ZBIT (1L << 30) #define CBIT (1L << 29) #define VBIT (1L << 28) -#define SBIT (1L << 27) +#define QBIT (1L << 27) #define IBIT (1L << 7) #define FBIT (1L << 6) #define IFBITS (3L << 6) @@ -156,13 +156,14 @@ #define R15PCMODE (state->Reg[15] & (R15PCBITS | R15MODEBITS)) #define R15MODE (state->Reg[15] & R15MODEBITS) -#define ECC ((NFLAG << 31) | (ZFLAG << 30) | (CFLAG << 29) | (VFLAG << 28) | (SFLAG << 27)) +#define ECC ((NFLAG << 31) | (ZFLAG << 30) | (CFLAG << 29) | (VFLAG << 28) | (QFLAG << 27)) #define EINT (IFFLAGS << 6) #define ER15INT (IFFLAGS << 26) #define EMODE (state->Mode) +#define EGEBITS (state->GEFlag & 0x000F0000) #ifdef MODET -#define CPSR (ECC | EINT | EMODE | (TFLAG << 5)) +#define CPSR (ECC | EGEBITS | (EFLAG << 9) | (AFLAG << 8) | EINT | (TFLAG << 5) | EMODE) #else #define CPSR (ECC | EINT | EMODE) #endif -- cgit v1.2.3 From f66d3569389e7e8a364a654d5254a2b9cc1cf8cc Mon Sep 17 00:00:00 2001 From: Lioncash Date: Mon, 22 Dec 2014 23:28:41 -0500 Subject: armemu: Fix SEL Needs to use the updated state of the CPSR. --- src/core/arm/interpreter/armemu.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index d19d3a49f..81a4fdb92 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6153,7 +6153,7 @@ L_stm_s_takeabort: u32 rm = (instr >> 0) & 0xF; u32 from = state->Reg[rn]; u32 to = state->Reg[rm]; - u32 cpsr = state->Cpsr; + u32 cpsr = ARMul_GetCPSR(state); if ((instr & 0xFF0) == 0xFB0) { // SEL u32 result; if (cpsr & (1 << 16)) -- cgit v1.2.3 From 6446331938c4d7c5bc4f54bc2b973b3eb43d7852 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Mon, 22 Dec 2014 23:43:14 -0500 Subject: armemu: Properly set the Q flag for SSAT16/USAT16 upon saturation. --- src/core/arm/interpreter/armemu.cpp | 32 +++++++++++++++++++++++--------- 1 file changed, 23 insertions(+), 9 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 81a4fdb92..e69789142 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6209,16 +6209,23 @@ L_stm_s_takeabort: s16 rn_lo = (state->Reg[rn_idx]); s16 rn_hi = (state->Reg[rn_idx] >> 16); - if (rn_lo > max) + if (rn_lo > max) { rn_lo = max; - else if (rn_lo < min) + state->Cpsr |= (1 << 27); + } else if (rn_lo < min) { rn_lo = min; + state->Cpsr |= (1 << 27); + } - if (rn_hi > max) + if (rn_hi > max) { rn_hi = max; - else if (rn_hi < min) + state->Cpsr |= (1 << 27); + } else if (rn_hi < min) { rn_hi = min; + state->Cpsr |= (1 << 27); + } + ARMul_CPSRAltered(state); state->Reg[rd_idx] = (rn_lo & 0xFFFF) | ((rn_hi & 0xFFFF) << 16); return 1; } @@ -6350,16 +6357,23 @@ L_stm_s_takeabort: s16 rn_lo = (state->Reg[rn_idx]); s16 rn_hi = (state->Reg[rn_idx] >> 16); - if (max < rn_lo) + if (max < rn_lo) { rn_lo = max; - else if (rn_lo < 0) + state->Cpsr |= (1 << 27); + } else if (rn_lo < 0) { rn_lo = 0; + state->Cpsr |= (1 << 27); + } - if (max < rn_hi) + if (max < rn_hi) { rn_hi = max; - else if (rn_hi < 0) + state->Cpsr |= (1 << 27); + } else if (rn_hi < 0) { rn_hi = 0; - + state->Cpsr |= (1 << 27); + } + + ARMul_CPSRAltered(state); state->Reg[rd_idx] = (rn_lo & 0xFFFF) | ((rn_hi << 16) & 0xFFFF); return 1; } -- cgit v1.2.3 From 79a7a432c524c7c999eed177e3ed34ba2646359a Mon Sep 17 00:00:00 2001 From: Lioncash Date: Tue, 23 Dec 2014 09:55:07 -0500 Subject: armemu: Set the Q flag properly for SMLAD/SMUAD --- src/core/arm/interpreter/armemu.cpp | 32 +++++++++++++++++++------------- src/core/arm/interpreter/armsupp.cpp | 8 ++++++++ src/core/arm/skyeye_common/armemu.h | 1 + 3 files changed, 28 insertions(+), 13 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 578d71380..23469f4df 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6478,22 +6478,28 @@ L_stm_s_takeabort: const s16 rn_lo = (rn_val & 0xFFFF); const s16 rn_hi = ((rn_val >> 16) & 0xFFFF); - // SMUAD - if ((instr & 0xf0d0) == 0xf010) { - state->Reg[rd_idx] = (rn_lo * rm_lo) + (rn_hi * rm_hi); - } - // SMUSD - else if ((instr & 0xf0d0) == 0xf050) { - state->Reg[rd_idx] = (rn_lo * rm_lo) - (rn_hi * rm_hi); - } - // SMLAD - else if ((instr & 0xd0) == 0x10) { - state->Reg[rd_idx] = (rn_lo * rm_lo) + (rn_hi * rm_hi) + (s32)state->Reg[ra_idx]; + const u32 product1 = (rn_lo * rm_lo); + const u32 product2 = (rn_hi * rm_hi); + + // SMUAD and SMLAD + if (BIT(6) == 0) { + state->Reg[rd_idx] = product1 + product2; + + if (BITS(12, 15) != 15) { + state->Reg[rd_idx] += state->Reg[ra_idx]; + ARMul_AddOverflowQ(state, product1 + product2, state->Reg[ra_idx]); + } + + ARMul_AddOverflowQ(state, product1, product2); } - // SMLSD + // SMUSD and SMLSD else { - state->Reg[rd_idx] = ((rn_lo * rm_lo) - (rn_hi * rm_hi)) + (s32)state->Reg[ra_idx]; + state->Reg[rd_idx] = product1 - product2; + + if (BITS(12, 15) != 15) + state->Reg[rd_idx] += state->Reg[ra_idx]; } + return 1; } break; diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp index b31c0ea24..6774f8a74 100644 --- a/src/core/arm/interpreter/armsupp.cpp +++ b/src/core/arm/interpreter/armsupp.cpp @@ -444,6 +444,14 @@ ARMul_AddOverflow (ARMul_State * state, ARMword a, ARMword b, ARMword result) ASSIGNV (AddOverflow (a, b, result)); } +/* Assigns the Q flag if the given result is considered an overflow from the addition of a and b */ +void ARMul_AddOverflowQ(ARMul_State* state, ARMword a, ARMword b) +{ + u32 result = a + b; + if (((result ^ a) & (u32)0x80000000) && ((a ^ b) & (u32)0x80000000) == 0) + SETQ; +} + /* Assigns the C flag after an subtraction of a and b to give result. */ void diff --git a/src/core/arm/skyeye_common/armemu.h b/src/core/arm/skyeye_common/armemu.h index e1b286f0f..3ea14b5a3 100644 --- a/src/core/arm/skyeye_common/armemu.h +++ b/src/core/arm/skyeye_common/armemu.h @@ -602,6 +602,7 @@ extern ARMword ARMul_SwitchMode (ARMul_State *, ARMword, ARMword); extern void ARMul_MSRCpsr (ARMul_State *, ARMword, ARMword); extern void ARMul_SubOverflow (ARMul_State *, ARMword, ARMword, ARMword); extern void ARMul_AddOverflow (ARMul_State *, ARMword, ARMword, ARMword); +extern void ARMul_AddOverflowQ(ARMul_State*, ARMword, ARMword); extern void ARMul_SubCarry (ARMul_State *, ARMword, ARMword, ARMword); extern void ARMul_AddCarry (ARMul_State *, ARMword, ARMword, ARMword); extern tdstate ARMul_ThumbDecode (ARMul_State *, ARMword, ARMword, ARMword *); -- cgit v1.2.3 From 20fc5f2a35782693af15b1f02de85c8d48c58cd0 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Tue, 23 Dec 2014 09:59:35 -0500 Subject: armemu: Set the Q flag correctly for much of the other ops They were setting the old S flag. --- src/core/arm/interpreter/armemu.cpp | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 23469f4df..b2f671f94 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -1670,7 +1670,7 @@ mainswitch: op1 *= op2; //printf("SMLA_INST:BB,op1=0x%x, op2=0x%x. Rn=0x%x\n", op1, op2, Rn); if (AddOverflow(op1, Rn, op1 + Rn)) - SETS; + SETQ; state->Reg[BITS (16, 19)] = op1 + Rn; break; } @@ -1682,7 +1682,7 @@ mainswitch: ARMword result = op1 + op2; if (AddOverflow(op1, op2, result)) { result = POS (result) ? 0x80000000 : 0x7fffffff; - SETS; + SETQ; } state->Reg[BITS (12, 15)] = result; break; @@ -1795,7 +1795,7 @@ mainswitch: ARMword Rn = state->Reg[BITS(12, 15)]; if (AddOverflow((ARMword)result, Rn, (ARMword)(result + Rn))) - SETS; + SETQ; result += Rn; } state->Reg[BITS (16, 19)] = (ARMword)result; @@ -1811,7 +1811,7 @@ mainswitch: if (SubOverflow (op1, op2, result)) { result = POS (result) ? 0x80000000 : 0x7fffffff; - SETS; + SETQ; } state->Reg[BITS (12, 15)] = result; @@ -1934,13 +1934,13 @@ mainswitch: if (AddOverflow (op2, op2, op2d)) { - SETS; + SETQ; op2d = POS (op2d) ? 0x80000000 : 0x7fffffff; } result = op1 + op2d; if (AddOverflow(op1, op2d, result)) { - SETS; + SETQ; result = POS (result) ? 0x80000000 : 0x7fffffff; } @@ -2053,13 +2053,13 @@ mainswitch: ARMword result; if (AddOverflow(op2, op2, op2d)) { - SETS; + SETQ; op2d = POS (op2d) ? 0x80000000 : 0x7fffffff; } result = op1 - op2d; if (SubOverflow(op1, op2d, result)) { - SETS; + SETQ; result = POS (result) ? 0x80000000 : 0x7fffffff; } -- cgit v1.2.3 From 6b7808e412ca9db41ac194a0a0e35d515cb1d38a Mon Sep 17 00:00:00 2001 From: Lioncash Date: Wed, 24 Dec 2014 07:56:57 -0500 Subject: armemu: Fix GE/Q flag setting semantics --- src/core/arm/interpreter/armemu.cpp | 118 +++++++++++++++++------------------- 1 file changed, 56 insertions(+), 62 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index b2f671f94..c4c09d1fb 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -5863,22 +5863,21 @@ L_stm_s_takeabort: state->Reg[rd_idx] = (lo_result & 0xFFFF) | ((hi_result & 0xFFFF) << 16); if (lo_result >= 0) { - state->Cpsr |= (1 << 16); - state->Cpsr |= (1 << 17); + state->GEFlag |= (1 << 16); + state->GEFlag |= (1 << 17); } else { - state->Cpsr &= ~(1 << 16); - state->Cpsr &= ~(1 << 17); + state->GEFlag &= ~(1 << 16); + state->GEFlag &= ~(1 << 17); } if (hi_result >= 0) { - state->Cpsr |= (1 << 18); - state->Cpsr |= (1 << 19); + state->GEFlag |= (1 << 18); + state->GEFlag |= (1 << 19); } else { - state->Cpsr &= ~(1 << 18); - state->Cpsr &= ~(1 << 19); + state->GEFlag &= ~(1 << 18); + state->GEFlag &= ~(1 << 19); } - ARMul_CPSRAltered(state); return 1; } // SADD8/SSUB8 @@ -5903,24 +5902,24 @@ L_stm_s_takeabort: hi_val2 = (u8)(((rn_val >> 24) & 0xFF) + ((rm_val >> 24) & 0xFF)); if (lo_val1 & 0x80) - state->Cpsr |= (1 << 16); + state->GEFlag |= (1 << 16); else - state->Cpsr &= ~(1 << 16); + state->GEFlag &= ~(1 << 16); if (lo_val2 & 0x80) - state->Cpsr |= (1 << 17); + state->GEFlag |= (1 << 17); else - state->Cpsr &= ~(1 << 17); + state->GEFlag &= ~(1 << 17); if (hi_val1 & 0x80) - state->Cpsr |= (1 << 18); + state->GEFlag |= (1 << 18); else - state->Cpsr &= ~(1 << 18); + state->GEFlag &= ~(1 << 18); if (hi_val2 & 0x80) - state->Cpsr |= (1 << 19); + state->GEFlag |= (1 << 19); else - state->Cpsr &= ~(1 << 19); + state->GEFlag &= ~(1 << 19); } // SSUB8 else { @@ -5930,27 +5929,26 @@ L_stm_s_takeabort: hi_val2 = (u8)(((rn_val >> 24) & 0xFF) - ((rm_val >> 24) & 0xFF)); if (!(lo_val1 & 0x80)) - state->Cpsr |= (1 << 16); + state->GEFlag |= (1 << 16); else - state->Cpsr &= ~(1 << 16); + state->GEFlag &= ~(1 << 16); if (!(lo_val2 & 0x80)) - state->Cpsr |= (1 << 17); + state->GEFlag |= (1 << 17); else - state->Cpsr &= ~(1 << 17); + state->GEFlag &= ~(1 << 17); if (!(hi_val1 & 0x80)) - state->Cpsr |= (1 << 18); + state->GEFlag |= (1 << 18); else - state->Cpsr &= ~(1 << 18); + state->GEFlag &= ~(1 << 18); if (!(hi_val2 & 0x80)) - state->Cpsr |= (1 << 19); + state->GEFlag |= (1 << 19); else - state->Cpsr &= ~(1 << 19); + state->GEFlag &= ~(1 << 19); } - ARMul_CPSRAltered(state); state->Reg[rd_idx] = (lo_val1 | lo_val2 << 8 | hi_val1 << 16 | hi_val2 << 24); return 1; } @@ -6029,31 +6027,30 @@ L_stm_s_takeabort: h2 = ((u16)(from >> 16) - (u16)(to >> 16)); if (!(h1 & 0xffff0000)) - state->Cpsr |= (3 << 16); + state->GEFlag |= (3 << 16); else - state->Cpsr &= ~(3 << 16); + state->GEFlag &= ~(3 << 16); if (!(h2 & 0xffff0000)) - state->Cpsr |= (3 << 18); + state->GEFlag |= (3 << 18); else - state->Cpsr &= ~(3 << 18); + state->GEFlag &= ~(3 << 18); } else { // UADD16 h1 = ((u16)from + (u16)to); h2 = ((u16)(from >> 16) + (u16)(to >> 16)); if (h1 & 0xffff0000) - state->Cpsr |= (3 << 16); + state->GEFlag |= (3 << 16); else - state->Cpsr &= ~(3 << 16); + state->GEFlag &= ~(3 << 16); if (h2 & 0xffff0000) - state->Cpsr |= (3 << 18); + state->GEFlag |= (3 << 18); else - state->Cpsr &= ~(3 << 18); + state->GEFlag &= ~(3 << 18); } - ARMul_CPSRAltered(state); state->Reg[rd] = (u32)((h1 & 0xffff) | ((h2 & 0xffff) << 16)); return 1; } @@ -6068,24 +6065,24 @@ L_stm_s_takeabort: b4 = ((u8)(from >> 24) - (u8)(to >> 24)); if (!(b1 & 0xffffff00)) - state->Cpsr |= (1 << 16); + state->GEFlag |= (1 << 16); else - state->Cpsr &= ~(1 << 16); + state->GEFlag &= ~(1 << 16); if (!(b2 & 0xffffff00)) - state->Cpsr |= (1 << 17); + state->GEFlag |= (1 << 17); else - state->Cpsr &= ~(1 << 17); + state->GEFlag &= ~(1 << 17); if (!(b3 & 0xffffff00)) - state->Cpsr |= (1 << 18); + state->GEFlag |= (1 << 18); else - state->Cpsr &= ~(1 << 18); + state->GEFlag &= ~(1 << 18); if (!(b4 & 0xffffff00)) - state->Cpsr |= (1 << 19); + state->GEFlag |= (1 << 19); else - state->Cpsr &= ~(1 << 19); + state->GEFlag &= ~(1 << 19); } else { // UADD8 b1 = ((u8)from + (u8)to); @@ -6094,27 +6091,26 @@ L_stm_s_takeabort: b4 = ((u8)(from >> 24) + (u8)(to >> 24)); if (b1 & 0xffffff00) - state->Cpsr |= (1 << 16); + state->GEFlag |= (1 << 16); else - state->Cpsr &= ~(1 << 16); + state->GEFlag &= ~(1 << 16); if (b2 & 0xffffff00) - state->Cpsr |= (1 << 17); + state->GEFlag |= (1 << 17); else - state->Cpsr &= ~(1 << 17); + state->GEFlag &= ~(1 << 17); if (b3 & 0xffffff00) - state->Cpsr |= (1 << 18); + state->GEFlag |= (1 << 18); else - state->Cpsr &= ~(1 << 18); + state->GEFlag &= ~(1 << 18); if (b4 & 0xffffff00) - state->Cpsr |= (1 << 19); + state->GEFlag |= (1 << 19); else - state->Cpsr &= ~(1 << 19); + state->GEFlag &= ~(1 << 19); } - ARMul_CPSRAltered(state); state->Reg[rd] = (u32)(b1 | (b2 & 0xff) << 8 | (b3 & 0xff) << 16 | (b4 & 0xff) << 24); return 1; } @@ -6211,21 +6207,20 @@ L_stm_s_takeabort: if (rn_lo > max) { rn_lo = max; - state->Cpsr |= (1 << 27); + SETQ; } else if (rn_lo < min) { rn_lo = min; - state->Cpsr |= (1 << 27); + SETQ; } if (rn_hi > max) { rn_hi = max; - state->Cpsr |= (1 << 27); + SETQ; } else if (rn_hi < min) { rn_hi = min; - state->Cpsr |= (1 << 27); + SETQ; } - ARMul_CPSRAltered(state); state->Reg[rd_idx] = (rn_lo & 0xFFFF) | ((rn_hi & 0xFFFF) << 16); return 1; } @@ -6359,21 +6354,20 @@ L_stm_s_takeabort: if (max < rn_lo) { rn_lo = max; - state->Cpsr |= (1 << 27); + SETQ; } else if (rn_lo < 0) { rn_lo = 0; - state->Cpsr |= (1 << 27); + SETQ; } if (max < rn_hi) { rn_hi = max; - state->Cpsr |= (1 << 27); + SETQ; } else if (rn_hi < 0) { rn_hi = 0; - state->Cpsr |= (1 << 27); + SETQ; } - ARMul_CPSRAltered(state); state->Reg[rd_idx] = (rn_lo & 0xFFFF) | ((rn_hi << 16) & 0xFFFF); return 1; } -- cgit v1.2.3 From 82c3962b9545c1149bcd2a6753d83b94b198ac42 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Wed, 24 Dec 2014 09:26:48 -0500 Subject: armemu: Implement SMLALD/SMLSLD --- src/core/arm/interpreter/armemu.cpp | 35 +++++++++++++++++++++++++++++++++-- 1 file changed, 33 insertions(+), 2 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index b2f671f94..27467bb5d 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6503,8 +6503,39 @@ L_stm_s_takeabort: return 1; } break; - case 0x74: - printf ("Unhandled v6 insn: smlald/smlsld\n"); + case 0x74: // SMLALD and SMLSLD + { + const u8 rm_idx = BITS(8, 11); + const u8 rn_idx = BITS(0, 3); + const u8 rdlo_idx = BITS(12, 15); + const u8 rdhi_idx = BITS(16, 19); + const bool do_swap = (BIT(5) == 1); + + const u32 rdlo_val = state->Reg[rdlo_idx]; + const u32 rdhi_val = state->Reg[rdhi_idx]; + const u32 rn_val = state->Reg[rn_idx]; + u32 rm_val = state->Reg[rm_idx]; + + if (do_swap) + rm_val = (((rm_val & 0xFFFF) << 16) | (rm_val >> 16)); + + const s32 product1 = (s16)(rn_val & 0xFFFF) * (s16)(rm_val & 0xFFFF); + const s32 product2 = (s16)((rn_val >> 16) & 0xFFFF) * (s16)((rm_val >> 16) & 0xFFFF); + s64 result; + + // SMLALD + if (BIT(6) == 0) { + result = (product1 + product2) + (s64)(rdlo_val | ((s64)rdhi_val << 32)); + } + // SMLSLD + else { + result = (product1 - product2) + (s64)(rdlo_val | ((s64)rdhi_val << 32)); + } + + state->Reg[rdlo_idx] = (result & 0xFFFFFFFF); + state->Reg[rdhi_idx] = ((result >> 32) & 0xFFFFFFFF); + return 1; + } break; case 0x75: printf ("Unhandled v6 insn: smmla/smmls/smmul\n"); -- cgit v1.2.3 From 35dbfc7ab0514e04c4aec4514167bba875d01285 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Thu, 25 Dec 2014 13:33:49 -0500 Subject: armemu: Implement SMMUL, SMMLA, and SMMLS. --- src/core/arm/interpreter/armemu.cpp | 32 ++++++++++++++++++++++++++++++-- 1 file changed, 30 insertions(+), 2 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index b2f671f94..8d803a0af 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6506,8 +6506,36 @@ L_stm_s_takeabort: case 0x74: printf ("Unhandled v6 insn: smlald/smlsld\n"); break; - case 0x75: - printf ("Unhandled v6 insn: smmla/smmls/smmul\n"); + case 0x75: // SMMLA, SMMUL, and SMMLS + { + const u8 rm_idx = BITS(8, 11); + const u8 rn_idx = BITS(0, 3); + const u8 ra_idx = BITS(12, 15); + const u8 rd_idx = BITS(16, 19); + const bool do_round = (BIT(5) == 1); + + const u32 rm_val = state->Reg[rm_idx]; + const u32 rn_val = state->Reg[rn_idx]; + + // Assume SMMUL by default. + s64 result = (s64)(s32)rn_val * (s64)(s32)rm_val; + + if (ra_idx != 15) { + const u32 ra_val = state->Reg[ra_idx]; + + // SMMLA, otherwise SMMLS + if (BIT(6) == 0) + result += ((s64)ra_val << 32); + else + result = ((s64)ra_val << 32) - result; + } + + if (do_round) + result += 0x80000000; + + state->Reg[rd_idx] = ((result >> 32) & 0xFFFFFFFF); + return 1; + } break; case 0x78: if (BITS(20, 24) == 0x18) -- cgit v1.2.3 From 4783133bbd651590b5116be95a5deda31fe9f4dc Mon Sep 17 00:00:00 2001 From: bunnei Date: Tue, 23 Dec 2014 22:45:52 -0500 Subject: ARM: Add a mechanism for faking CPU time elapsed during HLE. - Also a few cleanups. --- src/core/arm/arm_interface.h | 6 ++++ src/core/arm/dyncom/arm_dyncom.cpp | 49 +++----------------------- src/core/arm/dyncom/arm_dyncom.h | 14 +++++--- src/core/arm/interpreter/arm_interpreter.cpp | 51 +++------------------------- src/core/arm/interpreter/arm_interpreter.h | 6 ++++ src/core/hle/hle.cpp | 8 +++++ 6 files changed, 39 insertions(+), 95 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index c59355339..3b7209418 100644 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h @@ -77,6 +77,12 @@ public: */ virtual u64 GetTicks() const = 0; + /** + * Advance the CPU core by the specified number of ticks (e.g. to simulate CPU execution time) + * @param ticks Number of ticks to advance the CPU core + */ + virtual void AddTicks(u64 ticks) = 0; + /** * Saves the current CPU context * @param ctx Thread context to save diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp index 6d4fb1b48..a838fd25a 100644 --- a/src/core/arm/dyncom/arm_dyncom.cpp +++ b/src/core/arm/dyncom/arm_dyncom.cpp @@ -47,68 +47,38 @@ ARM_DynCom::ARM_DynCom() : ticks(0) { ARM_DynCom::~ARM_DynCom() { } -/** - * Set the Program Counter to an address - * @param addr Address to set PC to - */ void ARM_DynCom::SetPC(u32 pc) { state->pc = state->Reg[15] = pc; } -/* - * Get the current Program Counter - * @return Returns current PC - */ u32 ARM_DynCom::GetPC() const { return state->Reg[15]; } -/** - * Get an ARM register - * @param index Register index (0-15) - * @return Returns the value in the register - */ u32 ARM_DynCom::GetReg(int index) const { return state->Reg[index]; } -/** - * Set an ARM register - * @param index Register index (0-15) - * @param value Value to set register to - */ void ARM_DynCom::SetReg(int index, u32 value) { state->Reg[index] = value; } -/** - * Get the current CPSR register - * @return Returns the value of the CPSR register - */ u32 ARM_DynCom::GetCPSR() const { return state->Cpsr; } -/** - * Set the current CPSR register - * @param cpsr Value to set CPSR to - */ void ARM_DynCom::SetCPSR(u32 cpsr) { state->Cpsr = cpsr; } -/** - * Returns the number of clock ticks since the last reset - * @return Returns number of clock ticks - */ u64 ARM_DynCom::GetTicks() const { return ticks; } -/** - * Executes the given number of instructions - * @param num_instructions Number of instructions to executes - */ +void ARM_DynCom::AddTicks(u64 ticks) { + this->ticks += ticks; +} + void ARM_DynCom::ExecuteInstructions(int num_instructions) { state->NumInstrsToExecute = num_instructions; @@ -118,11 +88,6 @@ void ARM_DynCom::ExecuteInstructions(int num_instructions) { ticks += InterpreterMainLoop(state.get()); } -/** - * Saves the current CPU context - * @param ctx Thread context to save - * @todo Do we need to save Reg[15] and NextInstr? - */ void ARM_DynCom::SaveContext(ThreadContext& ctx) { memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers)); memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers)); @@ -139,11 +104,6 @@ void ARM_DynCom::SaveContext(ThreadContext& ctx) { ctx.mode = state->NextInstr; } -/** - * Loads a CPU context - * @param ctx Thread context to load - * @param Do we need to load Reg[15] and NextInstr? - */ void ARM_DynCom::LoadContext(const ThreadContext& ctx) { memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers)); memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers)); @@ -160,7 +120,6 @@ void ARM_DynCom::LoadContext(const ThreadContext& ctx) { state->NextInstr = ctx.mode; } -/// Prepare core for thread reschedule (if needed to correctly handle state) void ARM_DynCom::PrepareReschedule() { state->NumInstrsToExecute = 0; } diff --git a/src/core/arm/dyncom/arm_dyncom.h b/src/core/arm/dyncom/arm_dyncom.h index 6fa2a0ba7..7284dcd07 100644 --- a/src/core/arm/dyncom/arm_dyncom.h +++ b/src/core/arm/dyncom/arm_dyncom.h @@ -27,14 +27,14 @@ public: * Get the current Program Counter * @return Returns current PC */ - u32 GetPC() const; + u32 GetPC() const override; /** * Get an ARM register * @param index Register index (0-15) * @return Returns the value in the register */ - u32 GetReg(int index) const; + u32 GetReg(int index) const override; /** * Set an ARM register @@ -47,7 +47,7 @@ public: * Get the current CPSR register * @return Returns the value of the CPSR register */ - u32 GetCPSR() const; + u32 GetCPSR() const override; /** * Set the current CPSR register @@ -59,7 +59,13 @@ public: * Returns the number of clock ticks since the last reset * @return Returns number of clock ticks */ - u64 GetTicks() const; + u64 GetTicks() const override; + + /** + * Advance the CPU core by the specified number of ticks (e.g. to simulate CPU execution time) + * @param ticks Number of ticks to advance the CPU core + */ + void AddTicks(u64 ticks) override; /** * Saves the current CPU context diff --git a/src/core/arm/interpreter/arm_interpreter.cpp b/src/core/arm/interpreter/arm_interpreter.cpp index be04fc1a1..80ebc359e 100644 --- a/src/core/arm/interpreter/arm_interpreter.cpp +++ b/src/core/arm/interpreter/arm_interpreter.cpp @@ -38,78 +38,43 @@ ARM_Interpreter::~ARM_Interpreter() { delete state; } -/** - * Set the Program Counter to an address - * @param addr Address to set PC to - */ void ARM_Interpreter::SetPC(u32 pc) { state->pc = state->Reg[15] = pc; } -/* - * Get the current Program Counter - * @return Returns current PC - */ u32 ARM_Interpreter::GetPC() const { return state->pc; } -/** - * Get an ARM register - * @param index Register index (0-15) - * @return Returns the value in the register - */ u32 ARM_Interpreter::GetReg(int index) const { return state->Reg[index]; } -/** - * Set an ARM register - * @param index Register index (0-15) - * @param value Value to set register to - */ void ARM_Interpreter::SetReg(int index, u32 value) { state->Reg[index] = value; } -/** - * Get the current CPSR register - * @return Returns the value of the CPSR register - */ u32 ARM_Interpreter::GetCPSR() const { return state->Cpsr; } -/** - * Set the current CPSR register - * @param cpsr Value to set CPSR to - */ void ARM_Interpreter::SetCPSR(u32 cpsr) { state->Cpsr = cpsr; } -/** - * Returns the number of clock ticks since the last reset - * @return Returns number of clock ticks - */ u64 ARM_Interpreter::GetTicks() const { - return ARMul_Time(state); + return state->NumInstrs; +} + +void ARM_Interpreter::AddTicks(u64 ticks) { + state->NumInstrs += ticks; } -/** - * Executes the given number of instructions - * @param num_instructions Number of instructions to executes - */ void ARM_Interpreter::ExecuteInstructions(int num_instructions) { state->NumInstrsToExecute = num_instructions - 1; ARMul_Emulate32(state); } -/** - * Saves the current CPU context - * @param ctx Thread context to save - * @todo Do we need to save Reg[15] and NextInstr? - */ void ARM_Interpreter::SaveContext(ThreadContext& ctx) { memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers)); memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers)); @@ -126,11 +91,6 @@ void ARM_Interpreter::SaveContext(ThreadContext& ctx) { ctx.mode = state->NextInstr; } -/** - * Loads a CPU context - * @param ctx Thread context to load - * @param Do we need to load Reg[15] and NextInstr? - */ void ARM_Interpreter::LoadContext(const ThreadContext& ctx) { memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers)); memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers)); @@ -147,7 +107,6 @@ void ARM_Interpreter::LoadContext(const ThreadContext& ctx) { state->NextInstr = ctx.mode; } -/// Prepare core for thread reschedule (if needed to correctly handle state) void ARM_Interpreter::PrepareReschedule() { state->NumInstrsToExecute = 0; } diff --git a/src/core/arm/interpreter/arm_interpreter.h b/src/core/arm/interpreter/arm_interpreter.h index b685215a0..019dad5df 100644 --- a/src/core/arm/interpreter/arm_interpreter.h +++ b/src/core/arm/interpreter/arm_interpreter.h @@ -60,6 +60,12 @@ public: */ u64 GetTicks() const override; + /** + * Advance the CPU core by the specified number of ticks (e.g. to simulate CPU execution time) + * @param ticks Number of ticks to advance the CPU core + */ + void AddTicks(u64 ticks) override; + /** * Saves the current CPU context * @param ctx Thread context to save diff --git a/src/core/hle/hle.cpp b/src/core/hle/hle.cpp index 2d314a4cf..33ac12507 100644 --- a/src/core/hle/hle.cpp +++ b/src/core/hle/hle.cpp @@ -43,7 +43,15 @@ void CallSVC(u32 opcode) { void Reschedule(const char *reason) { _dbg_assert_msg_(Kernel, reason != 0 && strlen(reason) < 256, "Reschedule: Invalid or too long reason."); + + // TODO(bunnei): It seems that games depend on some CPU execution time elapsing during HLE + // routines. This simulates that time by artificially advancing the number of CPU "ticks". + // The value was chosen empirically, it seems to work well enough for everything tested, but + // is likely not ideal. We should find a more accurate way to simulate timing with HLE. + Core::g_app_core->AddTicks(4000); + Core::g_app_core->PrepareReschedule(); + g_reschedule = true; } -- cgit v1.2.3 From 84a0438cf5cb6e367e16a6873fd3b36b4aa77b21 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Fri, 26 Dec 2014 23:40:15 -0500 Subject: armemu: Implement UHADD8, UHADD16, UHSUB8, UHSUB16, UHASX, and UHSAX --- src/core/arm/interpreter/armemu.cpp | 75 ++++++++++++++++++++++++++++++++++++- 1 file changed, 73 insertions(+), 2 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index d54dbeac5..9b680c1e2 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6139,8 +6139,79 @@ L_stm_s_takeabort: printf ("Unhandled v6 insn: uqsub16\n"); } break; - case 0x67: - printf ("Unhandled v6 insn: uhadd/uhsub\n"); + case 0x67: // UHADD16, UHASX, UHSAX, UHSUB16, UHADD8, and UHSUB8. + { + const u8 op2 = BITS(5, 7); + + const u8 rm_idx = BITS(0, 3); + const u8 rn_idx = BITS(16, 19); + const u8 rd_idx = BITS(12, 15); + + const u32 rm_val = state->Reg[rm_idx]; + const u32 rn_val = state->Reg[rn_idx]; + + if (op2 == 0x00 || op2 == 0x01 || op2 == 0x02 || op2 == 0x03) + { + u32 lo_val = 0; + u32 hi_val = 0; + + // UHADD16 + if (op2 == 0x00) { + lo_val = (rn_val & 0xFFFF) + (rm_val & 0xFFFF); + hi_val = ((rn_val >> 16) & 0xFFFF) + ((rm_val >> 16) & 0xFFFF); + } + // UHASX + else if (op2 == 0x01) { + lo_val = (rn_val & 0xFFFF) - ((rm_val >> 16) & 0xFFFF); + hi_val = ((rn_val >> 16) & 0xFFFF) + (rm_val & 0xFFFF); + } + // UHSAX + else if (op2 == 0x02) { + lo_val = (rn_val & 0xFFFF) + ((rm_val >> 16) & 0xFFFF); + hi_val = ((rn_val >> 16) & 0xFFFF) - (rm_val & 0xFFFF); + } + // UHSUB16 + else if (op2 == 0x03) { + lo_val = (rn_val & 0xFFFF) - (rm_val & 0xFFFF); + hi_val = ((rn_val >> 16) & 0xFFFF) - ((rm_val >> 16) & 0xFFFF); + } + + lo_val >>= 1; + hi_val >>= 1; + + state->Reg[rd_idx] = (lo_val & 0xFFFF) | ((hi_val & 0xFFFF) << 16); + return 1; + } + else if (op2 == 0x04 || op2 == 0x07) { + u32 sum1; + u32 sum2; + u32 sum3; + u32 sum4; + + // UHADD8 + if (op2 == 0x04) { + sum1 = (rn_val & 0xFF) + (rm_val & 0xFF); + sum2 = ((rn_val >> 8) & 0xFF) + ((rm_val >> 8) & 0xFF); + sum3 = ((rn_val >> 16) & 0xFF) + ((rm_val >> 16) & 0xFF); + sum4 = ((rn_val >> 24) & 0xFF) + ((rm_val >> 24) & 0xFF); + } + // UHSUB8 + else { + sum1 = (rn_val & 0xFF) - (rm_val & 0xFF); + sum2 = ((rn_val >> 8) & 0xFF) - ((rm_val >> 8) & 0xFF); + sum3 = ((rn_val >> 16) & 0xFF) - ((rm_val >> 16) & 0xFF); + sum4 = ((rn_val >> 24) & 0xFF) - ((rm_val >> 24) & 0xFF); + } + + sum1 >>= 1; + sum2 >>= 1; + sum3 >>= 1; + sum4 >>= 1; + + state->Reg[rd_idx] = (sum1 & 0xFF) | ((sum2 & 0xFF) << 8) | ((sum3 & 0xFF) << 16) | ((sum4 & 0xFF) << 24); + return 1; + } + } break; case 0x68: { -- cgit v1.2.3 From 52d889d85d3212622b4e911cb40ef7cd3437adf7 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sat, 27 Dec 2014 00:57:32 -0500 Subject: dyncom: Implement UHADD8, UHADD16, UHSUB8, UHSUB16, UHASX, and UHSAX --- src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 134 +++++++++++++++++++++++-- 1 file changed, 123 insertions(+), 11 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 460001b1a..9b355fc6e 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -3086,15 +3086,47 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(tst)(unsigned int inst, int index) inst_base->load_r15 = 1; return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(uadd16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UADD16"); } ARM_INST_PTR INTERPRETER_TRANSLATE(uadd8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UADD8"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uadd16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UADD16"); } ARM_INST_PTR INTERPRETER_TRANSLATE(uaddsubx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UADDSUBX"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UHADD16"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UHADD8"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uhaddsubx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UHADDSUBX"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UHSUB16"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UHSUB8"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uhsubaddx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UHSUBADDX"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd8)(unsigned int inst, int index) +{ + arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); + generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; + + inst_base->cond = BITS(inst, 28, 31); + inst_base->idx = index; + inst_base->br = NON_BRANCH; + inst_base->load_r15 = 0; + + inst_cream->op1 = BITS(inst, 20, 21); + inst_cream->op2 = BITS(inst, 5, 7); + inst_cream->Rm = BITS(inst, 0, 3); + inst_cream->Rn = BITS(inst, 16, 19); + inst_cream->Rd = BITS(inst, 12, 15); + + return inst_base; +} +ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd16)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(uhadd8)(inst, index); +} +ARM_INST_PTR INTERPRETER_TRANSLATE(uhaddsubx)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(uhadd8)(inst, index); +} +ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub8)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(uhadd8)(inst, index); +} +ARM_INST_PTR INTERPRETER_TRANSLATE(uhsub16)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(uhadd8)(inst, index); +} +ARM_INST_PTR INTERPRETER_TRANSLATE(uhsubaddx)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(uhadd8)(inst, index); +} ARM_INST_PTR INTERPRETER_TRANSLATE(umaal)(unsigned int inst, int index) { arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(umaal_inst)); @@ -6622,15 +6654,95 @@ unsigned InterpreterMainLoop(ARMul_State* state) FETCH_INST; GOTO_NEXT_INST; } - UADD16_INST: UADD8_INST: + UADD16_INST: UADDSUBX_INST: - UHADD16_INST: + UHADD8_INST: + UHADD16_INST: UHADDSUBX_INST: - UHSUB16_INST: - UHSUB8_INST: UHSUBADDX_INST: + UHSUB8_INST: + UHSUB16_INST: + { + INC_ICOUNTER; + if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { + generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; + + const u32 rm_val = RM; + const u32 rn_val = RN; + const u8 op2 = inst_cream->op2; + + + if (op2 == 0x00 || op2 == 0x01 || op2 == 0x02 || op2 == 0x03) + { + u32 lo_val = 0; + u32 hi_val = 0; + + // UHADD16 + if (op2 == 0x00) { + lo_val = (rn_val & 0xFFFF) + (rm_val & 0xFFFF); + hi_val = ((rn_val >> 16) & 0xFFFF) + ((rm_val >> 16) & 0xFFFF); + } + // UHASX + else if (op2 == 0x01) { + lo_val = (rn_val & 0xFFFF) - ((rm_val >> 16) & 0xFFFF); + hi_val = ((rn_val >> 16) & 0xFFFF) + (rm_val & 0xFFFF); + } + // UHSAX + else if (op2 == 0x02) { + lo_val = (rn_val & 0xFFFF) + ((rm_val >> 16) & 0xFFFF); + hi_val = ((rn_val >> 16) & 0xFFFF) - (rm_val & 0xFFFF); + } + // UHSUB16 + else if (op2 == 0x03) { + lo_val = (rn_val & 0xFFFF) - (rm_val & 0xFFFF); + hi_val = ((rn_val >> 16) & 0xFFFF) - ((rm_val >> 16) & 0xFFFF); + } + + lo_val >>= 1; + hi_val >>= 1; + + RD = (lo_val & 0xFFFF) | ((hi_val & 0xFFFF) << 16); + } + else if (op2 == 0x04 || op2 == 0x07) { + u32 sum1; + u32 sum2; + u32 sum3; + u32 sum4; + + // UHADD8 + if (op2 == 0x04) { + sum1 = (rn_val & 0xFF) + (rm_val & 0xFF); + sum2 = ((rn_val >> 8) & 0xFF) + ((rm_val >> 8) & 0xFF); + sum3 = ((rn_val >> 16) & 0xFF) + ((rm_val >> 16) & 0xFF); + sum4 = ((rn_val >> 24) & 0xFF) + ((rm_val >> 24) & 0xFF); + } + // UHSUB8 + else { + sum1 = (rn_val & 0xFF) - (rm_val & 0xFF); + sum2 = ((rn_val >> 8) & 0xFF) - ((rm_val >> 8) & 0xFF); + sum3 = ((rn_val >> 16) & 0xFF) - ((rm_val >> 16) & 0xFF); + sum4 = ((rn_val >> 24) & 0xFF) - ((rm_val >> 24) & 0xFF); + } + + sum1 >>= 1; + sum2 >>= 1; + sum3 >>= 1; + sum4 >>= 1; + + RD = (sum1 & 0xFF) | ((sum2 & 0xFF) << 8) | ((sum3 & 0xFF) << 16) | ((sum4 & 0xFF) << 24); + } + + } + + cpu->Reg[15] += GET_INST_SIZE(cpu); + INC_PC(sizeof(generic_arm_inst)); + FETCH_INST; + GOTO_NEXT_INST; + } + + UMAAL_INST: { INC_ICOUNTER; -- cgit v1.2.3 From 60523113a9301e16bae91af61063bd8833926e8c Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sat, 27 Dec 2014 17:06:19 -0500 Subject: armemu: Implement UQADD8, UQADD16, UQSUB16, UQASX, and UQSAX --- src/core/arm/interpreter/armemu.cpp | 67 ++++++++++++++++++++++++++---------- src/core/arm/interpreter/armsupp.cpp | 41 ++++++++++++++++++++++ src/core/arm/skyeye_common/armemu.h | 4 +++ 3 files changed, 93 insertions(+), 19 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 9b680c1e2..5d26456c7 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6117,26 +6117,55 @@ L_stm_s_takeabort: } printf("Unhandled v6 insn: uasx/usax\n"); break; - case 0x66: - if ((instr & 0x0FF00FF0) == 0x06600FF0) { //uqsub8 - u32 rd = (instr >> 12) & 0xF; - u32 rm = (instr >> 16) & 0xF; - u32 rn = (instr >> 0) & 0xF; - u32 subfrom = state->Reg[rm]; - u32 tosub = state->Reg[rn]; - - u8 b1 = (u8)((u8)(subfrom)-(u8)(tosub)); - if (b1 > (u8)(subfrom)) b1 = 0; - u8 b2 = (u8)((u8)(subfrom >> 8) - (u8)(tosub >> 8)); - if (b2 > (u8)(subfrom >> 8)) b2 = 0; - u8 b3 = (u8)((u8)(subfrom >> 16) - (u8)(tosub >> 16)); - if (b3 > (u8)(subfrom >> 16)) b3 = 0; - u8 b4 = (u8)((u8)(subfrom >> 24) - (u8)(tosub >> 24)); - if (b4 > (u8)(subfrom >> 24)) b4 = 0; - state->Reg[rd] = (u32)(b1 | b2 << 8 | b3 << 16 | b4 << 24); + case 0x66: // UQADD16, UQASX, UQSAX, UQSUB16, UQADD8, and UQSUB8 + { + const u8 rd_idx = BITS(12, 15); + const u8 rm_idx = BITS(0, 3); + const u8 rn_idx = BITS(16, 19); + const u8 op2 = BITS(5, 7); + const u32 rm_val = state->Reg[rm_idx]; + const u32 rn_val = state->Reg[rn_idx]; + + u16 lo_val = 0; + u16 hi_val = 0; + + // UQADD16 + if (op2 == 0x00) { + lo_val = ARMul_UnsignedSaturatedAdd16(rn_val & 0xFFFF, rm_val & 0xFFFF); + hi_val = ARMul_UnsignedSaturatedAdd16((rn_val >> 16) & 0xFFFF, (rm_val >> 16) & 0xFFFF); + } + // UQASX + else if (op2 == 0x01) { + lo_val = ARMul_UnsignedSaturatedSub16(rn_val & 0xFFFF, (rm_val >> 16) & 0xFFFF); + hi_val = ARMul_UnsignedSaturatedAdd16((rn_val >> 16) & 0xFFFF, rm_val & 0xFFFF); + } + // UQSAX + else if (op2 == 0x02) { + lo_val = ARMul_UnsignedSaturatedAdd16(rn_val & 0xFFFF, (rm_val >> 16) & 0xFFFF); + hi_val = ARMul_UnsignedSaturatedSub16((rn_val >> 16) & 0xFFFF, rm_val & 0xFFFF); + } + // UQSUB16 + else if (op2 == 0x03) { + lo_val = ARMul_UnsignedSaturatedSub16(rn_val & 0xFFFF, rm_val & 0xFFFF); + hi_val = ARMul_UnsignedSaturatedSub16((rn_val >> 16) & 0xFFFF, (rm_val >> 16) & 0xFFFF); + } + // UQADD8 + else if (op2 == 0x04) { + lo_val = ARMul_UnsignedSaturatedAdd8(rn_val, rm_val) | + ARMul_UnsignedSaturatedAdd8(rn_val >> 8, rm_val >> 8) << 8; + hi_val = ARMul_UnsignedSaturatedAdd8(rn_val >> 16, rm_val >> 16) | + ARMul_UnsignedSaturatedAdd8(rn_val >> 24, rm_val >> 24) << 8; + } + // UQSUB8 + else { + lo_val = ARMul_UnsignedSaturatedSub8(rn_val, rm_val) | + ARMul_UnsignedSaturatedSub8(rn_val >> 8, rm_val >> 8) << 8; + hi_val = ARMul_UnsignedSaturatedSub8(rn_val >> 16, rm_val >> 16) | + ARMul_UnsignedSaturatedSub8(rn_val >> 24, rm_val >> 24) << 8; + } + + state->Reg[rd_idx] = ((lo_val & 0xFFFF) | hi_val << 16); return 1; - } else { - printf ("Unhandled v6 insn: uqsub16\n"); } break; case 0x67: // UHADD16, UHASX, UHSAX, UHSUB16, UHADD8, and UHSUB8. diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp index 6774f8a74..186b1bd73 100644 --- a/src/core/arm/interpreter/armsupp.cpp +++ b/src/core/arm/interpreter/armsupp.cpp @@ -469,6 +469,47 @@ ARMul_SubOverflow (ARMul_State * state, ARMword a, ARMword b, ARMword result) ASSIGNV (SubOverflow (a, b, result)); } +/* 8-bit unsigned saturated addition */ +u8 ARMul_UnsignedSaturatedAdd8(u8 left, u8 right) +{ + u8 result = left + right; + + if (result < left) + result = 0xFF; + + return result; +} + +/* 16-bit unsigned saturated addition */ +u16 ARMul_UnsignedSaturatedAdd16(u16 left, u16 right) +{ + u16 result = left + right; + + if (result < left) + result = 0xFFFF; + + return result; +} + +/* 8-bit unsigned saturated subtraction */ +u8 ARMul_UnsignedSaturatedSub8(u8 left, u8 right) +{ + if (left <= right) + return 0; + + return left - right; +} + +/* 16-bit unsigned saturated subtraction */ +u16 ARMul_UnsignedSaturatedSub16(u16 left, u16 right) +{ + if (left <= right) + return 0; + + return left - right; +} + + /* This function does the work of generating the addresses used in an LDC instruction. The code here is always post-indexed, it's up to the caller to get the input address correct and to handle base register diff --git a/src/core/arm/skyeye_common/armemu.h b/src/core/arm/skyeye_common/armemu.h index 3ea14b5a3..0b87dd39c 100644 --- a/src/core/arm/skyeye_common/armemu.h +++ b/src/core/arm/skyeye_common/armemu.h @@ -603,6 +603,10 @@ extern void ARMul_MSRCpsr (ARMul_State *, ARMword, ARMword); extern void ARMul_SubOverflow (ARMul_State *, ARMword, ARMword, ARMword); extern void ARMul_AddOverflow (ARMul_State *, ARMword, ARMword, ARMword); extern void ARMul_AddOverflowQ(ARMul_State*, ARMword, ARMword); +extern u8 ARMul_UnsignedSaturatedAdd8(u8, u8); +extern u16 ARMul_UnsignedSaturatedAdd16(u16, u16); +extern u8 ARMul_UnsignedSaturatedSub8(u8, u8); +extern u16 ARMul_UnsignedSaturatedSub16(u16, u16); extern void ARMul_SubCarry (ARMul_State *, ARMword, ARMword, ARMword); extern void ARMul_AddCarry (ARMul_State *, ARMword, ARMword, ARMword); extern tdstate ARMul_ThumbDecode (ARMul_State *, ARMword, ARMword, ARMword *); -- cgit v1.2.3 From af69b0840b67328f23a8123e4a6dec9c11eada96 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sat, 27 Dec 2014 17:24:34 -0500 Subject: dyncom: Implement UQADD8, UQADD16, UQSUB8, UQSUB16, UQASX, and UQSAX. --- src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 105 +++++++++++++++++++++++-- src/core/arm/skyeye_common/armdefs.h | 5 ++ src/core/arm/skyeye_common/armemu.h | 4 - 3 files changed, 102 insertions(+), 12 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 9b355fc6e..7306794fe 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -3249,12 +3249,44 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(blx_1_thumb)(unsigned int tinst, int index) return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UQADD16"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UQADD8"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uqaddsubx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UQADDSUBX"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UQSUB16"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UQSUB8"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(uqsubaddx)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("UQSUBADDX"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd8)(unsigned int inst, int index) +{ + arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); + generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; + + inst_base->cond = BITS(inst, 28, 31); + inst_base->idx = index; + inst_base->br = NON_BRANCH; + inst_base->load_r15 = 0; + + inst_cream->Rm = BITS(inst, 0, 3); + inst_cream->Rn = BITS(inst, 16, 19); + inst_cream->Rd = BITS(inst, 12, 15); + inst_cream->op1 = BITS(inst, 20, 21); + inst_cream->op2 = BITS(inst, 5, 7); + + return inst_base; +} +ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd16)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(uqadd8)(inst, index); +} +ARM_INST_PTR INTERPRETER_TRANSLATE(uqaddsubx)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(uqadd8)(inst, index); +} +ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub8)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(uqadd8)(inst, index); +} +ARM_INST_PTR INTERPRETER_TRANSLATE(uqsub16)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(uqadd8)(inst, index); +} +ARM_INST_PTR INTERPRETER_TRANSLATE(uqsubaddx)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(uqadd8)(inst, index); +} ARM_INST_PTR INTERPRETER_TRANSLATE(usad8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("USAD8"); } ARM_INST_PTR INTERPRETER_TRANSLATE(usada8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("USADA8"); } ARM_INST_PTR INTERPRETER_TRANSLATE(usat)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("USAT"); } @@ -6876,12 +6908,69 @@ unsigned InterpreterMainLoop(ARMul_State* state) goto DISPATCH; } - UQADD16_INST: UQADD8_INST: + UQADD16_INST: UQADDSUBX_INST: - UQSUB16_INST: UQSUB8_INST: + UQSUB16_INST: UQSUBADDX_INST: + { + INC_ICOUNTER; + + if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { + generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; + + const u8 op2 = inst_cream->op2; + const u32 rm_val = RM; + const u32 rn_val = RN; + + u16 lo_val = 0; + u16 hi_val = 0; + + // UQADD16 + if (op2 == 0x00) { + lo_val = ARMul_UnsignedSaturatedAdd16(rn_val & 0xFFFF, rm_val & 0xFFFF); + hi_val = ARMul_UnsignedSaturatedAdd16((rn_val >> 16) & 0xFFFF, (rm_val >> 16) & 0xFFFF); + } + // UQASX + else if (op2 == 0x01) { + lo_val = ARMul_UnsignedSaturatedSub16(rn_val & 0xFFFF, (rm_val >> 16) & 0xFFFF); + hi_val = ARMul_UnsignedSaturatedAdd16((rn_val >> 16) & 0xFFFF, rm_val & 0xFFFF); + } + // UQSAX + else if (op2 == 0x02) { + lo_val = ARMul_UnsignedSaturatedAdd16(rn_val & 0xFFFF, (rm_val >> 16) & 0xFFFF); + hi_val = ARMul_UnsignedSaturatedSub16((rn_val >> 16) & 0xFFFF, rm_val & 0xFFFF); + } + // UQSUB16 + else if (op2 == 0x03) { + lo_val = ARMul_UnsignedSaturatedSub16(rn_val & 0xFFFF, rm_val & 0xFFFF); + hi_val = ARMul_UnsignedSaturatedSub16((rn_val >> 16) & 0xFFFF, (rm_val >> 16) & 0xFFFF); + } + // UQADD8 + else if (op2 == 0x04) { + lo_val = ARMul_UnsignedSaturatedAdd8(rn_val, rm_val) | + ARMul_UnsignedSaturatedAdd8(rn_val >> 8, rm_val >> 8) << 8; + hi_val = ARMul_UnsignedSaturatedAdd8(rn_val >> 16, rm_val >> 16) | + ARMul_UnsignedSaturatedAdd8(rn_val >> 24, rm_val >> 24) << 8; + } + // UQSUB8 + else { + lo_val = ARMul_UnsignedSaturatedSub8(rn_val, rm_val) | + ARMul_UnsignedSaturatedSub8(rn_val >> 8, rm_val >> 8) << 8; + hi_val = ARMul_UnsignedSaturatedSub8(rn_val >> 16, rm_val >> 16) | + ARMul_UnsignedSaturatedSub8(rn_val >> 24, rm_val >> 24) << 8; + } + + RD = ((lo_val & 0xFFFF) | hi_val << 16); + } + + cpu->Reg[15] += GET_INST_SIZE(cpu); + INC_PC(sizeof(generic_arm_inst)); + FETCH_INST; + GOTO_NEXT_INST; + } + USAD8_INST: USADA8_INST: USAT_INST: diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h index 34eb5aaf7..5b6e5f8cd 100644 --- a/src/core/arm/skyeye_common/armdefs.h +++ b/src/core/arm/skyeye_common/armdefs.h @@ -790,6 +790,11 @@ extern void ARMul_FixSPSR(ARMul_State*, ARMword, ARMword); extern void ARMul_ConsolePrint(ARMul_State*, const char*, ...); extern void ARMul_SelectProcessor(ARMul_State*, unsigned); +extern u8 ARMul_UnsignedSaturatedAdd8(u8, u8); +extern u16 ARMul_UnsignedSaturatedAdd16(u16, u16); +extern u8 ARMul_UnsignedSaturatedSub8(u8, u8); +extern u16 ARMul_UnsignedSaturatedSub16(u16, u16); + #define DIFF_LOG 0 #define SAVE_LOG 0 diff --git a/src/core/arm/skyeye_common/armemu.h b/src/core/arm/skyeye_common/armemu.h index 0b87dd39c..3ea14b5a3 100644 --- a/src/core/arm/skyeye_common/armemu.h +++ b/src/core/arm/skyeye_common/armemu.h @@ -603,10 +603,6 @@ extern void ARMul_MSRCpsr (ARMul_State *, ARMword, ARMword); extern void ARMul_SubOverflow (ARMul_State *, ARMword, ARMword, ARMword); extern void ARMul_AddOverflow (ARMul_State *, ARMword, ARMword, ARMword); extern void ARMul_AddOverflowQ(ARMul_State*, ARMword, ARMword); -extern u8 ARMul_UnsignedSaturatedAdd8(u8, u8); -extern u16 ARMul_UnsignedSaturatedAdd16(u16, u16); -extern u8 ARMul_UnsignedSaturatedSub8(u8, u8); -extern u16 ARMul_UnsignedSaturatedSub16(u16, u16); extern void ARMul_SubCarry (ARMul_State *, ARMword, ARMword, ARMword); extern void ARMul_AddCarry (ARMul_State *, ARMword, ARMword, ARMword); extern tdstate ARMul_ThumbDecode (ARMul_State *, ARMword, ARMword, ARMword *); -- cgit v1.2.3 From 059c65a27af538cba40aa43d2eeb3a544661a9b8 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 28 Dec 2014 06:07:24 -0500 Subject: armemu: Fix underflows in USAD8/USADA8 Initially reported by xdec. --- src/core/arm/interpreter/armemu.cpp | 8 ++++---- src/core/arm/interpreter/armsupp.cpp | 9 +++++++++ src/core/arm/skyeye_common/armemu.h | 1 + 3 files changed, 14 insertions(+), 4 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 9b680c1e2..404012b2a 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6643,10 +6643,10 @@ L_stm_s_takeabort: const u32 rm_val = state->Reg[rm_idx]; const u32 rn_val = state->Reg[rn_idx]; - const u8 diff1 = (u8)std::labs((rn_val & 0xFF) - (rm_val & 0xFF)); - const u8 diff2 = (u8)std::labs(((rn_val >> 8) & 0xFF) - ((rm_val >> 8) & 0xFF)); - const u8 diff3 = (u8)std::labs(((rn_val >> 16) & 0xFF) - ((rm_val >> 16) & 0xFF)); - const u8 diff4 = (u8)std::labs(((rn_val >> 24) & 0xFF) - ((rm_val >> 24) & 0xFF)); + const u8 diff1 = ARMul_UnsignedAbsoluteDifference(rn_val & 0xFF, rm_val & 0xFF); + const u8 diff2 = ARMul_UnsignedAbsoluteDifference((rn_val >> 8) & 0xFF, (rm_val >> 8) & 0xFF); + const u8 diff3 = ARMul_UnsignedAbsoluteDifference((rn_val >> 16) & 0xFF, (rm_val >> 16) & 0xFF); + const u8 diff4 = ARMul_UnsignedAbsoluteDifference((rn_val >> 24) & 0xFF, (rm_val >> 24) & 0xFF); u32 finalDif = (diff1 + diff2 + diff3 + diff4); diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp index 6774f8a74..61639d156 100644 --- a/src/core/arm/interpreter/armsupp.cpp +++ b/src/core/arm/interpreter/armsupp.cpp @@ -392,6 +392,15 @@ ARMul_NthReg (ARMword instr, unsigned number) return (bit - 1); } +/* Unsigned sum of absolute difference */ +u8 ARMul_UnsignedAbsoluteDifference(u8 left, u8 right) +{ + if (left > right) + return left - right; + + return right - left; +} + /* Assigns the N and Z flags depending on the value of result. */ void diff --git a/src/core/arm/skyeye_common/armemu.h b/src/core/arm/skyeye_common/armemu.h index 3ea14b5a3..04c5d2e1a 100644 --- a/src/core/arm/skyeye_common/armemu.h +++ b/src/core/arm/skyeye_common/armemu.h @@ -600,6 +600,7 @@ extern ARMword ARMul_SwitchMode (ARMul_State *, ARMword, ARMword); extern ARMword ARMul_Align (ARMul_State *, ARMword, ARMword); extern ARMword ARMul_SwitchMode (ARMul_State *, ARMword, ARMword); extern void ARMul_MSRCpsr (ARMul_State *, ARMword, ARMword); +extern u8 ARMul_UnsignedAbsoluteDifference(u8, u8); extern void ARMul_SubOverflow (ARMul_State *, ARMword, ARMword, ARMword); extern void ARMul_AddOverflow (ARMul_State *, ARMword, ARMword, ARMword); extern void ARMul_AddOverflowQ(ARMul_State*, ARMword, ARMword); -- cgit v1.2.3 From 5e16216afb0d41855aeabaff81f17cd4bee59fe5 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 28 Dec 2014 11:45:13 -0500 Subject: armemu: Simplify REVSH/UXTH/UXTAH --- src/core/arm/interpreter/armemu.cpp | 71 ++++++++++++------------------------- 1 file changed, 23 insertions(+), 48 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 5d26456c7..a955d6aac 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6496,58 +6496,33 @@ L_stm_s_takeabort: return 1; } - case 0x6f: { - ARMword Rm; - int ror = -1; - - switch (BITS(4, 11)) { - case 0x07: - ror = 0; - break; - case 0x47: - ror = 8; - break; - case 0x87: - ror = 16; - break; - case 0xc7: - ror = 24; - break; + case 0x6f: // UXTH, UXTAH, and REVSH. + { + const u8 op2 = BITS(5, 7); - case 0xfb: // REVSH - { - DEST = ((RHS & 0xFF) << 8) | ((RHS & 0xFF00) >> 8); - if (DEST & 0x8000) - DEST |= 0xffff0000; - return 1; - } - default: - break; + // REVSH + if (op2 == 0x05) { + DEST = ((RHS & 0xFF) << 8) | ((RHS & 0xFF00) >> 8); + if (DEST & 0x8000) + DEST |= 0xffff0000; + return 1; } + // UXTH and UXTAH + else if (op2 == 0x03) { + const u8 rotate = BITS(10, 11) * 8; + const ARMword rm = ((state->Reg[BITS(0, 3)] >> rotate) & 0xFFFF) | (((state->Reg[BITS(0, 3)] << (32 - rotate)) & 0xFFFF) & 0xFFFF); + + // UXTH + if (BITS(16, 19) == 0xf) { + state->Reg[BITS(12, 15)] = rm; + } + // UXTAH + else { + state->Reg[BITS(12, 15)] = state->Reg[BITS(16, 19)] + rm; + } - if (ror == -1) - break; - - Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF); - - /* UXT */ - /* state->Reg[BITS (12, 15)] = Rm; */ - /* dyf add */ - if (BITS(16, 19) == 0xf) { - state->Reg[BITS(12, 15)] = Rm; - } - else { - /* UXTAH */ - /* state->Reg[BITS (12, 15)] = state->Reg [BITS (16, 19)] + Rm; */ - // printf("rd is %x rn is %x rm is %x rotate is %x\n", state->Reg[BITS (12, 15)], state->Reg[BITS (16, 19)] - // , Rm, BITS(10, 11)); - // printf("icounter is %lld\n", state->NumInstrs); - state->Reg[BITS(12, 15)] = state->Reg[BITS(16, 19)] + Rm; - // printf("rd is %x\n", state->Reg[BITS (12, 15)]); - // exit(-1); + return 1; } - - return 1; } case 0x70: // ichfly -- cgit v1.2.3 From 914ecfe04fa21d9370491318373a7c34fe4a79af Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 28 Dec 2014 11:56:16 -0500 Subject: armemu: Simplify USAT16/UXTB/UXTAB --- src/core/arm/interpreter/armemu.cpp | 107 ++++++++++++++---------------------- 1 file changed, 42 insertions(+), 65 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index a955d6aac..dcc0acafe 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6422,79 +6422,56 @@ L_stm_s_takeabort: return 1; } break; - case 0x6e: { - ARMword Rm; - int ror = -1; - - switch (BITS(4, 11)) { - case 0x07: - ror = 0; - break; - case 0x47: - ror = 8; - break; - case 0x87: - ror = 16; - break; - case 0xc7: - ror = 24; - break; - - case 0x01: - case 0xf3: - //ichfly - //USAT16 - { - const u8 rd_idx = BITS(12, 15); - const u8 rn_idx = BITS(0, 3); - const u8 num_bits = BITS(16, 19); - const s16 max = 0xFFFF >> (16 - num_bits); - s16 rn_lo = (state->Reg[rn_idx]); - s16 rn_hi = (state->Reg[rn_idx] >> 16); - - if (max < rn_lo) { - rn_lo = max; - SETQ; - } else if (rn_lo < 0) { - rn_lo = 0; - SETQ; - } - - if (max < rn_hi) { - rn_hi = max; - SETQ; - } else if (rn_hi < 0) { - rn_hi = 0; - SETQ; - } + case 0x6e: // USAT, USAT16, UXTB, and UXTAB + { + const u8 op2 = BITS(5, 7); - state->Reg[rd_idx] = (rn_lo & 0xFFFF) | ((rn_hi << 16) & 0xFFFF); - return 1; + // USAT16 + if (op2 == 0x01) { + const u8 rd_idx = BITS(12, 15); + const u8 rn_idx = BITS(0, 3); + const u8 num_bits = BITS(16, 19); + const s16 max = 0xFFFF >> (16 - num_bits); + s16 rn_lo = (state->Reg[rn_idx]); + s16 rn_hi = (state->Reg[rn_idx] >> 16); + + if (max < rn_lo) { + rn_lo = max; + SETQ; + } else if (rn_lo < 0) { + rn_lo = 0; + SETQ; } - - default: - break; - } - - if (ror == -1) { - if (BITS(4, 6) == 0x7) { - printf("Unhandled v6 insn: usat\n"); - return 0; + + if (max < rn_hi) { + rn_hi = max; + SETQ; + } else if (rn_hi < 0) { + rn_hi = 0; + SETQ; } - break; + + state->Reg[rd_idx] = (rn_lo & 0xFFFF) | ((rn_hi << 16) & 0xFFFF); + return 1; } - - Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF); - - if (BITS(16, 19) == 0xf) + else if (op2 == 0x03) { + const u8 rotate = BITS(10, 11) * 8; + const u32 rm = ((state->Reg[BITS(0, 3)] >> rotate) & 0xFF) | (((state->Reg[BITS(0, 3)] << (32 - rotate)) & 0xFF) & 0xFF); + + if (BITS(16, 19) == 0xf) /* UXTB */ - state->Reg[BITS(12, 15)] = Rm; - else + state->Reg[BITS(12, 15)] = rm; + else /* UXTAB */ - state->Reg[BITS(12, 15)] = state->Reg[BITS(16, 19)] + Rm; + state->Reg[BITS(12, 15)] = state->Reg[BITS(16, 19)] + rm; - return 1; + return 1; + } + else { + printf("Unimplemented op: USAT"); + } } + break; case 0x6f: // UXTH, UXTAH, and REVSH. { -- cgit v1.2.3 From 9f5b53f9ff616d7df3b8ea3709963831f4e96f42 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 28 Dec 2014 12:13:13 -0500 Subject: armemu: Simplify REV/REV16/SXTH/SXTAH --- src/core/arm/interpreter/armemu.cpp | 64 +++++++++++++++---------------------- 1 file changed, 26 insertions(+), 38 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index dcc0acafe..1b3a3478d 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6350,51 +6350,39 @@ L_stm_s_takeabort: return 1; } - case 0x6b: - { - ARMword Rm; - int ror = -1; - switch (BITS(4, 11)) { - case 0x07: - ror = 0; - break; - case 0x47: - ror = 8; - break; - case 0x87: - ror = 16; - break; - case 0xc7: - ror = 24; - break; + case 0x6b: // REV, REV16, SXTH, and SXTAH + { + const u8 op2 = BITS(5, 7); - case 0xf3: // REV - DEST = ((RHS & 0xFF) << 24) | ((RHS & 0xFF00)) << 8 | ((RHS & 0xFF0000) >> 8) | ((RHS & 0xFF000000) >> 24); - return 1; - case 0xfb: // REV16 - DEST = ((RHS & 0xFF) << 8) | ((RHS & 0xFF00)) >> 8 | ((RHS & 0xFF0000) << 8) | ((RHS & 0xFF000000) >> 8); - return 1; - default: - break; + // REV + if (op2 == 0x01) { + DEST = ((RHS & 0xFF) << 24) | ((RHS & 0xFF00)) << 8 | ((RHS & 0xFF0000) >> 8) | ((RHS & 0xFF000000) >> 24); + return 1; } + // REV16 + else if (op2 == 0x05) { + DEST = ((RHS & 0xFF) << 8) | ((RHS & 0xFF00)) >> 8 | ((RHS & 0xFF0000) << 8) | ((RHS & 0xFF000000) >> 8); + return 1; + } + else if (op2 == 0x03) { + const u8 rotate = BITS(10, 11) * 8; - if (ror == -1) - break; - - Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF); - if (Rm & 0x8000) - Rm |= 0xffff0000; + u32 rm = ((state->Reg[BITS(0, 3)] >> rotate) & 0xFFFF) | (((state->Reg[BITS(0, 3)] << (32 - rotate)) & 0xFFFF) & 0xFFFF); + if (rm & 0x8000) + rm |= 0xffff0000; - if (BITS(16, 19) == 0xf) - /* SXTH */ - state->Reg[BITS(12, 15)] = Rm; - else - /* SXTAH */ - state->Reg[BITS(12, 15)] = state->Reg[BITS(16, 19)] + Rm; + // SXTH, otherwise SXTAH + if (BITS(16, 19) == 15) + state->Reg[BITS(12, 15)] = rm; + else + state->Reg[BITS(12, 15)] = state->Reg[BITS(16, 19)] + rm; - return 1; + return 1; + } } + break; + case 0x6c: // UXTB16 and UXTAB16 { const u8 rm_idx = BITS(0, 3); -- cgit v1.2.3 From 6ce2a38ec401019e96ab0e6896cb3cb59e64752e Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 28 Dec 2014 12:19:31 -0500 Subject: armemu: Simplify SSAT/SSAT16/SXTB/SXTAB --- src/core/arm/interpreter/armemu.cpp | 119 +++++++++++++++--------------------- 1 file changed, 48 insertions(+), 71 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 1b3a3478d..01d4e7708 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6272,84 +6272,61 @@ L_stm_s_takeabort: return 1; } } - printf("Unhandled v6 insn: pkh/sxtab/selsxtb\n"); - break; - case 0x6a: { - ARMword Rm; - int ror = -1; - - switch (BITS(4, 11)) { - case 0x07: - ror = 0; - break; - case 0x47: - ror = 8; - break; - case 0x87: - ror = 16; - break; - case 0xc7: - ror = 24; - break; - - case 0x01: - case 0xf3: - //ichfly - //SSAT16 - { - const u8 rd_idx = BITS(12, 15); - const u8 rn_idx = BITS(0, 3); - const u8 num_bits = BITS(16, 19) + 1; - const s16 min = -(0x8000 >> (16 - num_bits)); - const s16 max = (0x7FFF >> (16 - num_bits)); - s16 rn_lo = (state->Reg[rn_idx]); - s16 rn_hi = (state->Reg[rn_idx] >> 16); - - if (rn_lo > max) { - rn_lo = max; - SETQ; - } else if (rn_lo < min) { - rn_lo = min; - SETQ; - } - - if (rn_hi > max) { - rn_hi = max; - SETQ; - } else if (rn_hi < min) { - rn_hi = min; - SETQ; - } - - state->Reg[rd_idx] = (rn_lo & 0xFFFF) | ((rn_hi & 0xFFFF) << 16); - return 1; - } + printf("Unhandled v6 insn: pkh/sxtab/selsxtb\n"); + break; - default: - break; - } + case 0x6a: // SSAT, SSAT16, SXTB, and SXTAB + { + const u8 op2 = BITS(5, 7); + + // SSAT16 + if (op2 == 0x01) { + const u8 rd_idx = BITS(12, 15); + const u8 rn_idx = BITS(0, 3); + const u8 num_bits = BITS(16, 19) + 1; + const s16 min = -(0x8000 >> (16 - num_bits)); + const s16 max = (0x7FFF >> (16 - num_bits)); + s16 rn_lo = (state->Reg[rn_idx]); + s16 rn_hi = (state->Reg[rn_idx] >> 16); - if (ror == -1) { - if (BITS(4, 6) == 0x7) { - printf("Unhandled v6 insn: ssat\n"); - return 0; + if (rn_lo > max) { + rn_lo = max; + SETQ; + } else if (rn_lo < min) { + rn_lo = min; + SETQ; } - break; - } - Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF); - if (Rm & 0x80) - Rm |= 0xffffff00; + if (rn_hi > max) { + rn_hi = max; + SETQ; + } else if (rn_hi < min) { + rn_hi = min; + SETQ; + } - if (BITS(16, 19) == 0xf) - /* SXTB */ - state->Reg[BITS(12, 15)] = Rm; - else - /* SXTAB */ - state->Reg[BITS(12, 15)] = state->Reg[BITS(16, 19)] + Rm; + state->Reg[rd_idx] = (rn_lo & 0xFFFF) | ((rn_hi & 0xFFFF) << 16); + return 1; + } + else if (op2 == 0x03) { + const u8 rotation = BITS(10, 11) * 8; + u32 rm = ((state->Reg[BITS(0, 3)] >> rotation) & 0xFF) | (((state->Reg[BITS(0, 3)] << (32 - rotation)) & 0xFF) & 0xFF); + if (rm & 0x80) + rm |= 0xffffff00; + + // SXTB, otherwise SXTAB + if (BITS(16, 19) == 0xf) + state->Reg[BITS(12, 15)] = rm; + else + state->Reg[BITS(12, 15)] = state->Reg[BITS(16, 19)] + rm; - return 1; + return 1; + } + else { + printf("Unimplemented op: SSAT"); + } } + break; case 0x6b: // REV, REV16, SXTH, and SXTAH { -- cgit v1.2.3 From 7d322b5c6f088495cfcb39dc0c46ca5d2c94eb70 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 28 Dec 2014 12:40:51 -0500 Subject: dyncom: Implement USAD8/USADA8 --- src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 54 +++++++++++++++++++++++++- src/core/arm/skyeye_common/armdefs.h | 1 + src/core/arm/skyeye_common/armemu.h | 1 - 3 files changed, 53 insertions(+), 3 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 7306794fe..98d825272 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -3287,8 +3287,28 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(uqsubaddx)(unsigned int inst, int index) { return INTERPRETER_TRANSLATE(uqadd8)(inst, index); } -ARM_INST_PTR INTERPRETER_TRANSLATE(usad8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("USAD8"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(usada8)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("USADA8"); } +ARM_INST_PTR INTERPRETER_TRANSLATE(usada8)(unsigned int inst, int index) +{ + arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); + generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; + + inst_base->cond = BITS(inst, 28, 31); + inst_base->idx = index; + inst_base->br = NON_BRANCH; + inst_base->load_r15 = 0; + + inst_cream->op1 = BITS(inst, 20, 24); + inst_cream->op2 = BITS(inst, 5, 7); + inst_cream->Rm = BITS(inst, 8, 11); + inst_cream->Rn = BITS(inst, 0, 3); + inst_cream->Ra = BITS(inst, 12, 15); + + return inst_base; +} +ARM_INST_PTR INTERPRETER_TRANSLATE(usad8)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(usada8)(inst, index); +} ARM_INST_PTR INTERPRETER_TRANSLATE(usat)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("USAT"); } ARM_INST_PTR INTERPRETER_TRANSLATE(usat16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("USAT16"); } ARM_INST_PTR INTERPRETER_TRANSLATE(usub16)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("USUB16"); } @@ -6973,6 +6993,36 @@ unsigned InterpreterMainLoop(ARMul_State* state) USAD8_INST: USADA8_INST: + { + INC_ICOUNTER; + + if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { + generic_arm_inst* inst_cream = (generic_arm_inst*)inst_base->component; + + const u8 ra_idx = inst_cream->Ra; + const u32 rm_val = RM; + const u32 rn_val = RN; + + const u8 diff1 = ARMul_UnsignedAbsoluteDifference(rn_val & 0xFF, rm_val & 0xFF); + const u8 diff2 = ARMul_UnsignedAbsoluteDifference((rn_val >> 8) & 0xFF, (rm_val >> 8) & 0xFF); + const u8 diff3 = ARMul_UnsignedAbsoluteDifference((rn_val >> 16) & 0xFF, (rm_val >> 16) & 0xFF); + const u8 diff4 = ARMul_UnsignedAbsoluteDifference((rn_val >> 24) & 0xFF, (rm_val >> 24) & 0xFF); + + u32 finalDif = (diff1 + diff2 + diff3 + diff4); + + // Op is USADA8 if true. + if (ra_idx != 15) + finalDif += cpu->Reg[ra_idx]; + + RD = finalDif; + } + + cpu->Reg[15] += GET_INST_SIZE(cpu); + INC_PC(sizeof(generic_arm_inst)); + FETCH_INST; + GOTO_NEXT_INST; + } + USAT_INST: USAT16_INST: USUB16_INST: diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h index 5b6e5f8cd..c7509fcb2 100644 --- a/src/core/arm/skyeye_common/armdefs.h +++ b/src/core/arm/skyeye_common/armdefs.h @@ -794,6 +794,7 @@ extern u8 ARMul_UnsignedSaturatedAdd8(u8, u8); extern u16 ARMul_UnsignedSaturatedAdd16(u16, u16); extern u8 ARMul_UnsignedSaturatedSub8(u8, u8); extern u16 ARMul_UnsignedSaturatedSub16(u16, u16); +extern u8 ARMul_UnsignedAbsoluteDifference(u8, u8); #define DIFF_LOG 0 #define SAVE_LOG 0 diff --git a/src/core/arm/skyeye_common/armemu.h b/src/core/arm/skyeye_common/armemu.h index 04c5d2e1a..3ea14b5a3 100644 --- a/src/core/arm/skyeye_common/armemu.h +++ b/src/core/arm/skyeye_common/armemu.h @@ -600,7 +600,6 @@ extern ARMword ARMul_SwitchMode (ARMul_State *, ARMword, ARMword); extern ARMword ARMul_Align (ARMul_State *, ARMword, ARMword); extern ARMword ARMul_SwitchMode (ARMul_State *, ARMword, ARMword); extern void ARMul_MSRCpsr (ARMul_State *, ARMword, ARMword); -extern u8 ARMul_UnsignedAbsoluteDifference(u8, u8); extern void ARMul_SubOverflow (ARMul_State *, ARMword, ARMword, ARMword); extern void ARMul_AddOverflow (ARMul_State *, ARMword, ARMword, ARMword); extern void ARMul_AddOverflowQ(ARMul_State*, ARMword, ARMword); -- cgit v1.2.3 From 58cb62fe7b383ef5f91a35a89fb92ca3c5287b1c Mon Sep 17 00:00:00 2001 From: bunnei Date: Sun, 28 Dec 2014 16:18:52 -0500 Subject: armemu: Fix PKHTB to do an arithmetic shift and correctly decode immediate field. --- src/core/arm/interpreter/armemu.cpp | 18 +++++------------- 1 file changed, 5 insertions(+), 13 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 2873da897..9c6602f09 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -3100,7 +3100,6 @@ mainswitch: break; case 0x68: /* Store Word, No WriteBack, Post Inc, Reg. */ - //ichfly PKHBT PKHTB todo check this if ((instr & 0x70) == 0x10) { //pkhbt u8 idest = BITS(12, 15); u8 rfis = BITS(16, 19); @@ -3109,18 +3108,11 @@ mainswitch: state->Reg[idest] = (state->Reg[rfis] & 0xFFFF) | ((state->Reg[rlast] << ishi) & 0xFFFF0000); break; } else if ((instr & 0x70) == 0x50) { //pkhtb - const u8 rd_idx = BITS(12, 15); - const u8 rn_idx = BITS(16, 19); - const u8 rm_idx = BITS(0, 3); - const u8 imm5 = BITS(7, 11); - - ARMword val; - if (imm5 >= 32) - val = (state->Reg[rm_idx] >> 31); - else - val = (state->Reg[rm_idx] >> imm5); - - state->Reg[rd_idx] = (val & 0xFFFF) | ((state->Reg[rn_idx]) & 0xFFFF0000); + u8 rd_idx = BITS(12, 15); + u8 rn_idx = BITS(16, 19); + u8 rm_idx = BITS(0, 3); + u8 imm5 = BITS(7, 11) ? BITS(7, 11) : 31; + state->Reg[rd_idx] = ((static_cast(state->Reg[rm_idx]) >> imm5) & 0xFFFF) | ((state->Reg[rn_idx]) & 0xFFFF0000); break; } else if (BIT (4)) { #ifdef MODE32 -- cgit v1.2.3 From bf9b33aa9f195bdbca2b9f3de8681e930819ae5c Mon Sep 17 00:00:00 2001 From: bunnei Date: Sun, 28 Dec 2014 16:20:04 -0500 Subject: dyncom: Implement PKHBT and PKHTB. --- src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 59 +++++++++++++++++++++++++- 1 file changed, 57 insertions(+), 2 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 98d825272..4cd8fe6ac 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -1427,6 +1427,13 @@ typedef struct _blx_1_thumb { unsigned int instr; }blx_1_thumb; +typedef struct _pkh_inst { + u32 Rm; + u32 Rn; + u32 Rd; + u8 imm; +} pkh_inst; + typedef arm_inst * ARM_INST_PTR; #define CACHE_BUFFER_SIZE (64 * 1024 * 2000) @@ -2376,8 +2383,30 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(orr)(unsigned int inst, int index) } return inst_base; } -ARM_INST_PTR INTERPRETER_TRANSLATE(pkhbt)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("PKHBT"); } -ARM_INST_PTR INTERPRETER_TRANSLATE(pkhtb)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("PKHTB"); } + +ARM_INST_PTR INTERPRETER_TRANSLATE(pkhbt)(unsigned int inst, int index) +{ + arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(pkh_inst)); + pkh_inst *inst_cream = (pkh_inst *)inst_base->component; + + inst_base->cond = BITS(inst, 28, 31); + inst_base->idx = index; + inst_base->br = NON_BRANCH; + inst_base->load_r15 = 0; + + inst_cream->Rd = BITS(inst, 12, 15); + inst_cream->Rn = BITS(inst, 16, 19); + inst_cream->Rm = BITS(inst, 0, 3); + inst_cream->imm = BITS(inst, 7, 11); + + return inst_base; +} + +ARM_INST_PTR INTERPRETER_TRANSLATE(pkhtb)(unsigned int inst, int index) +{ + return INTERPRETER_TRANSLATE(pkhbt)(inst, index); +} + ARM_INST_PTR INTERPRETER_TRANSLATE(pld)(unsigned int inst, int index) { arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(pld_inst)); @@ -5659,8 +5688,34 @@ unsigned InterpreterMainLoop(ARMul_State* state) FETCH_INST; GOTO_NEXT_INST; } + PKHBT_INST: + { + INC_ICOUNTER; + if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { + pkh_inst *inst_cream = (pkh_inst *)inst_base->component; + RD = (RN & 0xFFFF) | ((RM << inst_cream->imm) & 0xFFFF0000); + } + cpu->Reg[15] += GET_INST_SIZE(cpu); + INC_PC(sizeof(pkh_inst)); + FETCH_INST; + GOTO_NEXT_INST; + } + PKHTB_INST: + { + INC_ICOUNTER; + if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { + pkh_inst *inst_cream = (pkh_inst *)inst_base->component; + int shift_imm = inst_cream->imm ? inst_cream->imm : 31; + RD = ((static_cast(RM) >> shift_imm) & 0xFFFF) | (RN & 0xFFFF0000); + } + cpu->Reg[15] += GET_INST_SIZE(cpu); + INC_PC(sizeof(pkh_inst)); + FETCH_INST; + GOTO_NEXT_INST; + } + PLD_INST: { INC_ICOUNTER; -- cgit v1.2.3 From 9c7f2570f774a05bfd085264c5db20074cd1f8d2 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 28 Dec 2014 18:41:40 -0500 Subject: vfp: Actually make the code somewhat readable --- src/core/arm/dyncom/arm_dyncom_dec.cpp | 74 +- src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 49 +- src/core/arm/skyeye_common/vfp/vfp.cpp | 663 +++++++- src/core/arm/skyeye_common/vfp/vfp.h | 6 + src/core/arm/skyeye_common/vfp/vfpinstr.cpp | 1925 +++++------------------- 5 files changed, 1053 insertions(+), 1664 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/dyncom/arm_dyncom_dec.cpp b/src/core/arm/dyncom/arm_dyncom_dec.cpp index 5d174a08f..551bb77a6 100644 --- a/src/core/arm/dyncom/arm_dyncom_dec.cpp +++ b/src/core/arm/dyncom/arm_dyncom_dec.cpp @@ -28,9 +28,40 @@ #include "core/arm/dyncom/arm_dyncom_dec.h" const ISEITEM arm_instruction[] = { - #define VFP_DECODE - #include "core/arm/skyeye_common/vfp/vfpinstr.cpp" - #undef VFP_DECODE + {"vmla", 4, ARMVFP2, 23, 27, 0x1C, 20, 21, 0x0, 9, 11, 0x5, 4, 4, 0}, + {"vmls", 7, ARMVFP2, 28, 31, 0xF, 25, 27, 0x1, 23, 23, 1, 11, 11, 0, 8, 9, 0x2, 6, 6, 1, 4, 4, 0}, + {"vnmla", 4, ARMVFP2, 23, 27, 0x1C, 20, 21, 0x1, 9, 11, 0x5, 4, 4, 0}, + {"vnmla", 5, ARMVFP2, 23, 27, 0x1C, 20, 21, 0x2, 9, 11, 0x5, 6, 6, 1, 4, 4, 0}, + {"vnmls", 5, ARMVFP2, 23, 27, 0x1C, 20, 21, 0x1, 9, 11, 0x5, 6, 6, 0, 4, 4, 0}, + {"vnmul", 5, ARMVFP2, 23, 27, 0x1C, 20, 21, 0x2, 9, 11, 0x5, 6, 6, 1, 4, 4, 0}, + {"vmul", 5, ARMVFP2, 23, 27, 0x1C, 20, 21, 0x2, 9, 11, 0x5, 6, 6, 0, 4, 4, 0}, + {"vadd", 5, ARMVFP2, 23, 27, 0x1C, 20, 21, 0x3, 9, 11, 0x5, 6, 6, 0, 4, 4, 0}, + {"vsub", 5, ARMVFP2, 23, 27, 0x1C, 20, 21, 0x3, 9, 11, 0x5, 6, 6, 1, 4, 4, 0}, + {"vdiv", 5, ARMVFP2, 23, 27, 0x1D, 20, 21, 0x0, 9, 11, 0x5, 6, 6, 0, 4, 4, 0}, + {"vmov(i)", 4, ARMVFP3, 23, 27, 0x1D, 20, 21, 0x3, 9, 11, 0x5, 4, 7, 0}, + {"vmov(r)", 5, ARMVFP3, 23, 27, 0x1D, 16, 21, 0x30, 9, 11, 0x5, 6, 7, 1, 4, 4, 0}, + {"vabs", 5, ARMVFP2, 23, 27, 0x1D, 16, 21, 0x30, 9, 11, 0x5, 6, 7, 3, 4, 4, 0}, + {"vneg", 5, ARMVFP2, 23, 27, 0x1D, 17, 21, 0x18, 9, 11, 0x5, 6, 7, 1, 4, 4, 0}, + {"vsqrt", 5, ARMVFP2, 23, 27, 0x1D, 16, 21, 0x31, 9, 11, 0x5, 6, 7, 3, 4, 4, 0}, + {"vcmp", 5, ARMVFP2, 23, 27, 0x1D, 16, 21, 0x34, 9, 11, 0x5, 6, 6, 1, 4, 4, 0}, + {"vcmp2", 5, ARMVFP2, 23, 27, 0x1D, 16, 21, 0x35, 9, 11, 0x5, 0, 6, 0x40}, + {"vcvt(bds)", 5, ARMVFP2, 23, 27, 0x1D, 16, 21, 0x37, 9, 11, 0x5, 6, 7, 3, 4, 4, 0}, + {"vcvt(bff)", 6, ARMVFP3, 23, 27, 0x1D, 19, 21, 0x7, 17, 17, 0x1, 9, 11,5, 6, 6, 1}, + {"vcvt(bfi)", 5, ARMVFP2, 23, 27, 0x1D, 19, 21, 0x7, 9, 11, 0x5, 6, 6, 1, 4, 4, 0}, + {"vmovbrs", 3, ARMVFP2, 21, 27, 0x70, 8, 11, 0xA, 0, 6, 0x10}, + {"vmsr", 2, ARMVFP2, 20, 27, 0xEE, 0, 11, 0xA10}, + {"vmovbrc", 4, ARMVFP2, 23, 27, 0x1C, 20, 20, 0x0, 8, 11, 0xB, 0,4,0x10}, + {"vmrs", 2, ARMVFP2, 20, 27, 0xEF, 0, 11, 0xA10}, + {"vmovbcr", 4, ARMVFP2, 24, 27, 0xE, 20, 20, 1, 8, 11, 0xB, 0,4,0x10}, + {"vmovbrrss", 3, ARMVFP2, 21, 27, 0x62, 8, 11, 0xA, 4, 4, 1}, + {"vmovbrrd", 3, ARMVFP2, 21, 27, 0x62, 6, 11, 0x2C, 4, 4, 1}, + {"vstr", 3, ARMVFP2, 24, 27, 0xD, 20, 21, 0, 9, 11,5}, + {"vpush", 3, ARMVFP2, 23, 27, 0x1A, 16, 21, 0x2D, 9, 11,5}, + {"vstm", 3, ARMVFP2, 25, 27, 0x6, 20, 20, 0, 9, 11,5}, + {"vpop", 3, ARMVFP2, 23, 27, 0x19, 16, 21, 0x3D, 9, 11,5}, + {"vldr", 3, ARMVFP2, 24, 27, 0xD, 20, 21, 1, 9, 11,5}, + {"vldm", 3, ARMVFP2, 25, 27, 0x6, 20, 20, 1, 9, 11,5}, + {"srs" , 4 , 6 , 25, 31, 0x0000007c, 22, 22, 0x00000001, 16, 20, 0x0000000d, 8, 11, 0x00000005}, {"rfe" , 4 , 6 , 25, 31, 0x0000007c, 22, 22, 0x00000000, 20, 20, 0x00000001, 8, 11, 0x0000000a}, {"bkpt" , 2 , 3 , 20, 31, 0x00000e12, 4, 7, 0x00000007}, @@ -187,9 +218,40 @@ const ISEITEM arm_instruction[] = { }; const ISEITEM arm_exclusion_code[] = { - #define VFP_DECODE_EXCLUSION - #include "core/arm/skyeye_common/vfp/vfpinstr.cpp" - #undef VFP_DECODE_EXCLUSION + {"vmla", 0, ARMVFP2, 0}, + {"vmls", 0, ARMVFP2, 0}, + {"vnmla", 0, ARMVFP2, 0}, + {"vnmla", 0, ARMVFP2, 0}, + {"vnmls", 0, ARMVFP2, 0}, + {"vnmul", 0, ARMVFP2, 0}, + {"vmul", 0, ARMVFP2, 0}, + {"vadd", 0, ARMVFP2, 0}, + {"vsub", 0, ARMVFP2, 0}, + {"vdiv", 0, ARMVFP2, 0}, + {"vmov(i)", 0, ARMVFP3, 0}, + {"vmov(r)", 0, ARMVFP3, 0}, + {"vabs", 0, ARMVFP2, 0}, + {"vneg", 0, ARMVFP2, 0}, + {"vsqrt", 0, ARMVFP2, 0}, + {"vcmp", 0, ARMVFP2, 0}, + {"vcmp2", 0, ARMVFP2, 0}, + {"vcvt(bff)", 0, ARMVFP3, 4, 4, 1}, + {"vcvt(bds)", 0, ARMVFP2, 0}, + {"vcvt(bfi)", 0, ARMVFP2, 0}, + {"vmovbrs", 0, ARMVFP2, 0}, + {"vmsr", 0, ARMVFP2, 0}, + {"vmovbrc", 0, ARMVFP2, 0}, + {"vmrs", 0, ARMVFP2, 0}, + {"vmovbcr", 0, ARMVFP2, 0}, + {"vmovbrrss", 0, ARMVFP2, 0}, + {"vmovbrrd", 0, ARMVFP2, 0}, + {"vstr", 0, ARMVFP2, 0}, + {"vpush", 0, ARMVFP2, 0}, + {"vstm", 0, ARMVFP2, 0}, + {"vpop", 0, ARMVFP2, 0}, + {"vldr", 0, ARMVFP2, 0}, + {"vldm", 0, ARMVFP2, 0}, + {"srs" , 0 , 6 , 0}, {"rfe" , 0 , 6 , 0}, {"bkpt" , 0 , 3 , 0}, diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 4cd8fe6ac..b4ee64203 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -3363,9 +3363,40 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb16)(unsigned int inst, int index) { UN typedef ARM_INST_PTR (*transop_fp_t)(unsigned int, int); const transop_fp_t arm_instruction_trans[] = { - #define VFP_INTERPRETER_TABLE - #include "core/arm/skyeye_common/vfp/vfpinstr.cpp" - #undef VFP_INTERPRETER_TABLE + INTERPRETER_TRANSLATE(vmla), + INTERPRETER_TRANSLATE(vmls), + INTERPRETER_TRANSLATE(vnmla), + INTERPRETER_TRANSLATE(vnmla), + INTERPRETER_TRANSLATE(vnmls), + INTERPRETER_TRANSLATE(vnmul), + INTERPRETER_TRANSLATE(vmul), + INTERPRETER_TRANSLATE(vadd), + INTERPRETER_TRANSLATE(vsub), + INTERPRETER_TRANSLATE(vdiv), + INTERPRETER_TRANSLATE(vmovi), + INTERPRETER_TRANSLATE(vmovr), + INTERPRETER_TRANSLATE(vabs), + INTERPRETER_TRANSLATE(vneg), + INTERPRETER_TRANSLATE(vsqrt), + INTERPRETER_TRANSLATE(vcmp), + INTERPRETER_TRANSLATE(vcmp2), + INTERPRETER_TRANSLATE(vcvtbds), + INTERPRETER_TRANSLATE(vcvtbff), + INTERPRETER_TRANSLATE(vcvtbfi), + INTERPRETER_TRANSLATE(vmovbrs), + INTERPRETER_TRANSLATE(vmsr), + INTERPRETER_TRANSLATE(vmovbrc), + INTERPRETER_TRANSLATE(vmrs), + INTERPRETER_TRANSLATE(vmovbcr), + INTERPRETER_TRANSLATE(vmovbrrss), + INTERPRETER_TRANSLATE(vmovbrrd), + INTERPRETER_TRANSLATE(vstr), + INTERPRETER_TRANSLATE(vpush), + INTERPRETER_TRANSLATE(vstm), + INTERPRETER_TRANSLATE(vpop), + INTERPRETER_TRANSLATE(vldr), + INTERPRETER_TRANSLATE(vldm), + INTERPRETER_TRANSLATE(srs), INTERPRETER_TRANSLATE(rfe), INTERPRETER_TRANSLATE(bkpt), @@ -4206,10 +4237,12 @@ unsigned InterpreterMainLoop(ARMul_State* state) // GCC and Clang have a C++ extension to support a lookup table of labels. Otherwise, fallback // to a clunky switch statement. #if defined __GNUC__ || defined __clang__ - void *InstLabel[] = { - #define VFP_INTERPRETER_LABEL - #include "core/arm/skyeye_common/vfp/vfpinstr.cpp" - #undef VFP_INTERPRETER_LABEL + void *InstLabel[] = { + &&VMLA_INST, &&VMLS_INST, &&VNMLA_INST, &&VNMLA_INST, &&VNMLS_INST, &&VNMUL_INST, &&VMUL_INST, &&VADD_INST, &&VSUB_INST, + &&VDIV_INST, &&VMOVI_INST, &&VMOVR_INST, &&VABS_INST, &&VNEG_INST, &&VSQRT_INST, &&VCMP_INST, &&VCMP2_INST, &&VCVTBDS_INST, + &&VCVTBFF_INST, &&VCVTBFI_INST, &&VMOVBRS_INST, &&VMSR_INST, &&VMOVBRC_INST, &&VMRS_INST, &&VMOVBCR_INST, &&VMOVBRRSS_INST, + &&VMOVBRRD_INST, &&VSTR_INST, &&VPUSH_INST, &&VSTM_INST, &&VPOP_INST, &&VLDR_INST, &&VLDM_INST, + &&SRS_INST,&&RFE_INST,&&BKPT_INST,&&BLX_INST,&&CPS_INST,&&PLD_INST,&&SETEND_INST,&&CLREX_INST,&&REV16_INST,&&USAD8_INST,&&SXTB_INST, &&UXTB_INST,&&SXTH_INST,&&SXTB16_INST,&&UXTH_INST,&&UXTB16_INST,&&CPY_INST,&&UXTAB_INST,&&SSUB8_INST,&&SHSUB8_INST,&&SSUBADDX_INST, &&STREX_INST,&&STREXB_INST,&&SWP_INST,&&SWPB_INST,&&SSUB16_INST,&&SSAT16_INST,&&SHSUBADDX_INST,&&QSUBADDX_INST,&&SHADDSUBX_INST, @@ -4243,7 +4276,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) DISPATCH: { if (!cpu->NirqSig) { - if (!(cpu->Cpsr & 0x80)) { + if (!(cpu->Cpsr & 0x80)) { goto END; } } diff --git a/src/core/arm/skyeye_common/vfp/vfp.cpp b/src/core/arm/skyeye_common/vfp/vfp.cpp index 454f60099..5c036caeb 100644 --- a/src/core/arm/skyeye_common/vfp/vfp.cpp +++ b/src/core/arm/skyeye_common/vfp/vfp.cpp @@ -32,8 +32,7 @@ //ARMul_State* persistent_state; /* function calls from SoftFloat lib don't have an access to ARMul_state. */ -unsigned -VFPInit (ARMul_State *state) +unsigned VFPInit(ARMul_State* state) { state->VFP[VFP_OFFSET(VFP_FPSID)] = VFP_FPSID_IMPLMEN<<24 | VFP_FPSID_SW<<23 | VFP_FPSID_SUBARCH<<16 | VFP_FPSID_PARTNUM<<8 | VFP_FPSID_VARIANT<<4 | VFP_FPSID_REVISION; @@ -46,8 +45,7 @@ VFPInit (ARMul_State *state) return 0; } -unsigned -VFPMRC (ARMul_State * state, unsigned type, u32 instr, u32 * value) +unsigned VFPMRC(ARMul_State* state, unsigned type, u32 instr, u32* value) { /* MRC ,,,,{,} */ int CoProc = BITS (8, 11); /* 10 or 11 */ @@ -61,10 +59,21 @@ VFPMRC (ARMul_State * state, unsigned type, u32 instr, u32 * value) /* CRn/opc1 CRm/opc2 */ - if (CoProc == 10 || CoProc == 11) { -#define VFP_MRC_TRANS -#include "core/arm/skyeye_common/vfp/vfpinstr.cpp" -#undef VFP_MRC_TRANS + if (CoProc == 10 || CoProc == 11) + { + if (OPC_1 == 0x0 && CRm == 0 && (OPC_2 & 0x3) == 0) + { + /* VMOV r to s */ + /* Transfering Rt is not mandatory, as the value of interest is pointed by value */ + VMOVBRS(state, BIT(20), Rt, BIT(7)|CRn<<1, value); + return ARMul_DONE; + } + + if (OPC_1 == 0x7 && CRm == 0 && OPC_2 == 0) + { + VMRS(state, CRn, Rt, value); + return ARMul_DONE; + } } DEBUG("Can't identify %x, CoProc %x, OPC_1 %x, Rt %x, CRn %x, CRm %x, OPC_2 %x\n", instr, CoProc, OPC_1, Rt, CRn, CRm, OPC_2); @@ -72,8 +81,7 @@ VFPMRC (ARMul_State * state, unsigned type, u32 instr, u32 * value) return ARMul_CANT; } -unsigned -VFPMCR (ARMul_State * state, unsigned type, u32 instr, u32 value) +unsigned VFPMCR(ARMul_State* state, unsigned type, u32 instr, u32 value) { /* MCR ,,,,{,} */ int CoProc = BITS (8, 11); /* 10 or 11 */ @@ -86,10 +94,33 @@ VFPMCR (ARMul_State * state, unsigned type, u32 instr, u32 value) /* TODO check access permission */ /* CRn/opc1 CRm/opc2 */ - if (CoProc == 10 || CoProc == 11) { -#define VFP_MCR_TRANS -#include "core/arm/skyeye_common/vfp/vfpinstr.cpp" -#undef VFP_MCR_TRANS + if (CoProc == 10 || CoProc == 11) + { + if (OPC_1 == 0x0 && CRm == 0 && (OPC_2 & 0x3) == 0) + { + /* VMOV s to r */ + /* Transfering Rt is not mandatory, as the value of interest is pointed by value */ + VMOVBRS(state, BIT(20), Rt, BIT(7)|CRn<<1, &value); + return ARMul_DONE; + } + + if (OPC_1 == 0x7 && CRm == 0 && OPC_2 == 0) + { + VMSR(state, CRn, Rt); + return ARMul_DONE; + } + + if ((OPC_1 & 0x4) == 0 && CoProc == 11 && CRm == 0) + { + VFP_DEBUG_UNIMPLEMENTED(VMOVBRC); + return ARMul_DONE; + } + + if (CoProc == 11 && CRm == 0) + { + VFP_DEBUG_UNIMPLEMENTED(VMOVBCR); + return ARMul_DONE; + } } DEBUG("Can't identify %x, CoProc %x, OPC_1 %x, Rt %x, CRn %x, CRm %x, OPC_2 %x\n", instr, CoProc, OPC_1, Rt, CRn, CRm, OPC_2); @@ -97,8 +128,7 @@ VFPMCR (ARMul_State * state, unsigned type, u32 instr, u32 value) return ARMul_CANT; } -unsigned -VFPMRRC (ARMul_State * state, unsigned type, u32 instr, u32 * value1, u32 * value2) +unsigned VFPMRRC(ARMul_State* state, unsigned type, u32 instr, u32* value1, u32* value2) { /* MCRR ,,,, */ int CoProc = BITS (8, 11); /* 10 or 11 */ @@ -107,10 +137,20 @@ VFPMRRC (ARMul_State * state, unsigned type, u32 instr, u32 * value1, u32 * valu int Rt2 = BITS (16, 19); int CRm = BITS (0, 3); - if (CoProc == 10 || CoProc == 11) { -#define VFP_MRRC_TRANS -#include "core/arm/skyeye_common/vfp/vfpinstr.cpp" -#undef VFP_MRRC_TRANS + if (CoProc == 10 || CoProc == 11) + { + if (CoProc == 10 && (OPC_1 & 0xD) == 1) + { + VFP_DEBUG_UNIMPLEMENTED(VMOVBRRSS); + return ARMul_DONE; + } + + if (CoProc == 11 && (OPC_1 & 0xD) == 1) + { + /* Transfering Rt and Rt2 is not mandatory, as the value of interest is pointed by value1 and value2 */ + VMOVBRRD(state, BIT(20), Rt, Rt2, BIT(5)<<4|CRm, value1, value2); + return ARMul_DONE; + } } DEBUG("Can't identify %x, CoProc %x, OPC_1 %x, Rt %x, Rt2 %x, CRm %x\n", instr, CoProc, OPC_1, Rt, Rt2, CRm); @@ -118,8 +158,7 @@ VFPMRRC (ARMul_State * state, unsigned type, u32 instr, u32 * value1, u32 * valu return ARMul_CANT; } -unsigned -VFPMCRR (ARMul_State * state, unsigned type, u32 instr, u32 value1, u32 value2) +unsigned VFPMCRR(ARMul_State* state, unsigned type, u32 instr, u32 value1, u32 value2) { /* MCRR ,,,, */ int CoProc = BITS (8, 11); /* 10 or 11 */ @@ -132,10 +171,20 @@ VFPMCRR (ARMul_State * state, unsigned type, u32 instr, u32 value1, u32 value2) /* CRn/opc1 CRm/opc2 */ - if (CoProc == 11 || CoProc == 10) { -#define VFP_MCRR_TRANS -#include "core/arm/skyeye_common/vfp/vfpinstr.cpp" -#undef VFP_MCRR_TRANS + if (CoProc == 11 || CoProc == 10) + { + if (CoProc == 10 && (OPC_1 & 0xD) == 1) + { + VFP_DEBUG_UNIMPLEMENTED(VMOVBRRSS); + return ARMul_DONE; + } + + if (CoProc == 11 && (OPC_1 & 0xD) == 1) + { + /* Transfering Rt and Rt2 is not mandatory, as the value of interest is pointed by value1 and value2 */ + VMOVBRRD(state, BIT(20), Rt, Rt2, BIT(5)<<4|CRm, &value1, &value2); + return ARMul_DONE; + } } DEBUG("Can't identify %x, CoProc %x, OPC_1 %x, Rt %x, Rt2 %x, CRm %x\n", instr, CoProc, OPC_1, Rt, Rt2, CRm); @@ -143,8 +192,7 @@ VFPMCRR (ARMul_State * state, unsigned type, u32 instr, u32 value1, u32 value2) return ARMul_CANT; } -unsigned -VFPSTC (ARMul_State * state, unsigned type, u32 instr, u32 * value) +unsigned VFPSTC(ARMul_State* state, unsigned type, u32 instr, u32 * value) { /* STC{L} ,,[],