From d66a12c6f6e612ba4574652a8087cd878c965b92 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Fri, 17 Apr 2015 20:44:54 -0400 Subject: dyncom: Remove unused/unnecessary VFP cruft --- src/core/arm/skyeye_common/armdefs.h | 26 -- src/core/arm/skyeye_common/armemu.h | 9 - src/core/arm/skyeye_common/vfp/vfp.cpp | 621 +-------------------------------- src/core/arm/skyeye_common/vfp/vfp.h | 22 +- 4 files changed, 7 insertions(+), 671 deletions(-) (limited to 'src/core/arm/skyeye_common') diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h index 743e935f0..64ca523e8 100644 --- a/src/core/arm/skyeye_common/armdefs.h +++ b/src/core/arm/skyeye_common/armdefs.h @@ -55,18 +55,6 @@ typedef u16 ARMhword; // must be 16 bits wide typedef u8 ARMbyte; // must be 8 bits wide typedef struct ARMul_State ARMul_State; -typedef unsigned ARMul_CPInits(ARMul_State* state); -typedef unsigned ARMul_CPExits(ARMul_State* state); -typedef unsigned ARMul_LDCs(ARMul_State* state, unsigned type, ARMword instr, ARMword value); -typedef unsigned ARMul_STCs(ARMul_State* state, unsigned type, ARMword instr, ARMword* value); -typedef unsigned ARMul_MRCs(ARMul_State* state, unsigned type, ARMword instr, ARMword* value); -typedef unsigned ARMul_MCRs(ARMul_State* state, unsigned type, ARMword instr, ARMword value); -typedef unsigned ARMul_MRRCs(ARMul_State* state, unsigned type, ARMword instr, ARMword* value1, ARMword* value2); -typedef unsigned ARMul_MCRRs(ARMul_State* state, unsigned type, ARMword instr, ARMword value1, ARMword value2); -typedef unsigned ARMul_CDPs(ARMul_State* state, unsigned type, ARMword instr); -typedef unsigned ARMul_CPReads(ARMul_State* state, unsigned reg, ARMword* value); -typedef unsigned ARMul_CPWrites(ARMul_State* state, unsigned reg, ARMword value); - #define VFP_REG_NUM 64 struct ARMul_State { @@ -117,20 +105,6 @@ struct ARMul_State unsigned NextInstr; unsigned VectorCatch; // Caught exception mask - ARMul_CPInits* CPInit[16]; // Coprocessor initialisers - ARMul_CPExits* CPExit[16]; // Coprocessor finalisers - ARMul_LDCs* LDC[16]; // LDC instruction - ARMul_STCs* STC[16]; // STC instruction - ARMul_MRCs* MRC[16]; // MRC instruction - ARMul_MCRs* MCR[16]; // MCR instruction - ARMul_MRRCs* MRRC[16]; // MRRC instruction - ARMul_MCRRs* MCRR[16]; // MCRR instruction - ARMul_CDPs* CDP[16]; // CDP instruction - ARMul_CPReads* CPRead[16]; // Read CP register - ARMul_CPWrites* CPWrite[16]; // Write CP register - unsigned char* CPData[16]; // Coprocessor data - unsigned char const* CPRegWords[16]; // Map of coprocessor register sizes - unsigned NresetSig; // Reset the processor unsigned NfiqSig; unsigned NirqSig; diff --git a/src/core/arm/skyeye_common/armemu.h b/src/core/arm/skyeye_common/armemu.h index 2a1c50779..b8113dfc1 100644 --- a/src/core/arm/skyeye_common/armemu.h +++ b/src/core/arm/skyeye_common/armemu.h @@ -57,12 +57,3 @@ enum { }; #define FLUSHPIPE state->NextInstr |= PRIMEPIPE - -// Coprocessor support functions. -extern void ARMul_CoProInit(ARMul_State*); -extern void ARMul_CoProExit(ARMul_State*); -extern void ARMul_CoProAttach(ARMul_State*, unsigned, ARMul_CPInits*, - ARMul_CPExits*, ARMul_LDCs*, ARMul_STCs*, - ARMul_MRCs*, ARMul_MCRs*, ARMul_MRRCs*, ARMul_MCRRs*, - ARMul_CDPs*, ARMul_CPReads*, ARMul_CPWrites*); -extern void ARMul_CoProDetach(ARMul_State*, unsigned); diff --git a/src/core/arm/skyeye_common/vfp/vfp.cpp b/src/core/arm/skyeye_common/vfp/vfp.cpp index d793261fd..d0fa157a2 100644 --- a/src/core/arm/skyeye_common/vfp/vfp.cpp +++ b/src/core/arm/skyeye_common/vfp/vfp.cpp @@ -37,296 +37,18 @@ unsigned VFPInit(ARMul_State* state) return 0; } -unsigned VFPMRC(ARMul_State* state, unsigned type, u32 instr, u32* value) -{ - /* MRC ,,,,{,} */ - int CoProc = BITS(instr, 8, 11); /* 10 or 11 */ - int OPC_1 = BITS(instr, 21, 23); - int Rt = BITS(instr, 12, 15); - int CRn = BITS(instr, 16, 19); - int CRm = BITS(instr, 0, 3); - int OPC_2 = BITS(instr, 5, 7); - - /* TODO check access permission */ - - /* CRn/opc1 CRm/opc2 */ - - if (CoProc == 10 || CoProc == 11) - { - if (OPC_1 == 0x0 && CRm == 0 && (OPC_2 & 0x3) == 0) - { - /* VMOV r to s */ - /* Transfering Rt is not mandatory, as the value of interest is pointed by value */ - VMOVBRS(state, BIT(instr, 20), Rt, BIT(instr, 7)|CRn<<1, value); - return ARMul_DONE; - } - - if (OPC_1 == 0x7 && CRm == 0 && OPC_2 == 0) - { - VMRS(state, CRn, Rt, value); - return ARMul_DONE; - } - } - LOG_WARNING(Core_ARM11, "Can't identify %x, CoProc %x, OPC_1 %x, Rt %x, CRn %x, CRm %x, OPC_2 %x\n", - instr, CoProc, OPC_1, Rt, CRn, CRm, OPC_2); - - return ARMul_CANT; -} - -unsigned VFPMCR(ARMul_State* state, unsigned type, u32 instr, u32 value) -{ - /* MCR ,,,,{,} */ - int CoProc = BITS(instr, 8, 11); /* 10 or 11 */ - int OPC_1 = BITS(instr, 21, 23); - int Rt = BITS(instr, 12, 15); - int CRn = BITS(instr, 16, 19); - int CRm = BITS(instr, 0, 3); - int OPC_2 = BITS(instr, 5, 7); - - /* TODO check access permission */ - - /* CRn/opc1 CRm/opc2 */ - if (CoProc == 10 || CoProc == 11) - { - if (OPC_1 == 0x0 && CRm == 0 && (OPC_2 & 0x3) == 0) - { - /* VMOV s to r */ - /* Transfering Rt is not mandatory, as the value of interest is pointed by value */ - VMOVBRS(state, BIT(instr, 20), Rt, BIT(instr, 7)|CRn<<1, &value); - return ARMul_DONE; - } - - if (OPC_1 == 0x7 && CRm == 0 && OPC_2 == 0) - { - VMSR(state, CRn, Rt); - return ARMul_DONE; - } - - if ((OPC_1 & 0x4) == 0 && CoProc == 11 && CRm == 0) - { - VFP_DEBUG_UNIMPLEMENTED(VMOVBRC); - return ARMul_DONE; - } - - if (CoProc == 11 && CRm == 0) - { - VFP_DEBUG_UNIMPLEMENTED(VMOVBCR); - return ARMul_DONE; - } - } - LOG_WARNING(Core_ARM11, "Can't identify %x, CoProc %x, OPC_1 %x, Rt %x, CRn %x, CRm %x, OPC_2 %x\n", - instr, CoProc, OPC_1, Rt, CRn, CRm, OPC_2); - - return ARMul_CANT; -} - -unsigned VFPMRRC(ARMul_State* state, unsigned type, u32 instr, u32* value1, u32* value2) -{ - /* MCRR ,,,, */ - int CoProc = BITS(instr, 8, 11); /* 10 or 11 */ - int OPC_1 = BITS(instr, 4, 7); - int Rt = BITS(instr, 12, 15); - int Rt2 = BITS(instr, 16, 19); - int CRm = BITS(instr, 0, 3); - - if (CoProc == 10 || CoProc == 11) - { - if (CoProc == 10 && (OPC_1 & 0xD) == 1) - { - VMOVBRRSS(state, BIT(instr, 20), Rt, Rt2, BIT(instr, 5)<<4|CRm, value1, value2); - return ARMul_DONE; - } - - if (CoProc == 11 && (OPC_1 & 0xD) == 1) - { - /* Transfering Rt and Rt2 is not mandatory, as the value of interest is pointed by value1 and value2 */ - VMOVBRRD(state, BIT(instr, 20), Rt, Rt2, BIT(instr, 5)<<4|CRm, value1, value2); - return ARMul_DONE; - } - } - LOG_WARNING(Core_ARM11, "Can't identify %x, CoProc %x, OPC_1 %x, Rt %x, Rt2 %x, CRm %x\n", - instr, CoProc, OPC_1, Rt, Rt2, CRm); - - return ARMul_CANT; -} - -unsigned VFPMCRR(ARMul_State* state, unsigned type, u32 instr, u32 value1, u32 value2) -{ - /* MCRR ,,,, */ - int CoProc = BITS(instr, 8, 11); /* 10 or 11 */ - int OPC_1 = BITS(instr, 4, 7); - int Rt = BITS(instr, 12, 15); - int Rt2 = BITS(instr, 16, 19); - int CRm = BITS(instr, 0, 3); - - /* TODO check access permission */ - - /* CRn/opc1 CRm/opc2 */ - - if (CoProc == 11 || CoProc == 10) - { - if (CoProc == 10 && (OPC_1 & 0xD) == 1) - { - VMOVBRRSS(state, BIT(instr, 20), Rt, Rt2, BIT(instr, 5)<<4|CRm, &value1, &value2); - return ARMul_DONE; - } - - if (CoProc == 11 && (OPC_1 & 0xD) == 1) - { - /* Transfering Rt and Rt2 is not mandatory, as the value of interest is pointed by value1 and value2 */ - VMOVBRRD(state, BIT(instr, 20), Rt, Rt2, BIT(instr, 5)<<4|CRm, &value1, &value2); - return ARMul_DONE; - } - } - LOG_WARNING(Core_ARM11, "Can't identify %x, CoProc %x, OPC_1 %x, Rt %x, Rt2 %x, CRm %x\n", - instr, CoProc, OPC_1, Rt, Rt2, CRm); - - return ARMul_CANT; -} - -unsigned VFPSTC(ARMul_State* state, unsigned type, u32 instr, u32 * value) -{ - /* STC{L} ,,[],