From 2161f52661f9866161165db480594672307940ad Mon Sep 17 00:00:00 2001 From: wwylele Date: Mon, 27 Jun 2016 21:38:49 +0300 Subject: ARM: add ClearInstructionCache function --- src/core/arm/dyncom/arm_dyncom.cpp | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/core/arm/dyncom/arm_dyncom.cpp') diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp index 13492a08b..ab77da965 100644 --- a/src/core/arm/dyncom/arm_dyncom.cpp +++ b/src/core/arm/dyncom/arm_dyncom.cpp @@ -12,6 +12,7 @@ #include "core/arm/dyncom/arm_dyncom.h" #include "core/arm/dyncom/arm_dyncom_interpreter.h" #include "core/arm/dyncom/arm_dyncom_run.h" +#include "core/arm/dyncom/arm_dyncom_trans.h" #include "core/core.h" #include "core/core_timing.h" @@ -23,6 +24,11 @@ ARM_DynCom::ARM_DynCom(PrivilegeMode initial_mode) { ARM_DynCom::~ARM_DynCom() { } +void ARM_DynCom::ClearInstructionCache() { + state->instruction_cache.clear(); + trans_cache_buf_top = 0; +} + void ARM_DynCom::SetPC(u32 pc) { state->Reg[15] = pc; } -- cgit v1.2.3