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These warnings don't offer meaningful information while decoding
shaders. Remove them.
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shader/node: Unpack bindless texture encoding
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Originally on the last commit I thought TLD4 acted the same as TLD4S and
didn't have a mask. It actually does have a component mask. This commit
corrects that.
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This commit fixes an issue where not all 4 results of tld4 were being
written, the color component was defaulted to red, among other things.
It also implements the bindless variant.
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Bindless textures were using u64 to pack the buffer and offset from
where they come from. Drop this in favor of separated entries in the
struct.
Remove the usage of std::set in favor of std::list (it's not std::vector
to avoid reference invalidations) for samplers and images.
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Implement Fast BRX, fix TXQ and addapt the Shader Cache for it
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Shader_Ir: Fix TLD4S from using a component mask.
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instructions that don't provide it
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Silences a few -Wshadow warnings.
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TLD4S always outputs 4 values, the previous code checked a component
mask and omitted those values that weren't part of it. This commit
corrects that and makes sure all 4 values are set.
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Ignore global memory operations instead of invoking undefined behaviour
when constant buffer tracking fails and we are blasting through asserts,
ignore the operation.
In the case of LDG this means filling the destination registers with
zeroes; for STG this means ignore the instruction as a whole.
The default behaviour is still to abort execution on failure.
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HSETP2 when used with a constant buffer parses the second operand type
as F32. This is not configurable.
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shader/image: Implement SULD and fix SUATOM
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shader_ir: Implement ICMP
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In the process remove implementation of SUATOM.MIN and SUATOM.MAX as
these require a distinction between U32 and S32. These have to be
implemented with imageCompSwap loop.
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* Implement SULD as float.
* Remove conditional declaration of GL_ARB_shader_viewport_layer_array.
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shader_ir/warp: Implement SHFL for Nvidia devices
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shader_ir: Implement shared memory
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shader/shift: Implement SHR wrapped and clamped variants
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Loads from shared memory.
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This instruction writes to a memory buffer shared with threads within
the same work group. It is known as "shared" memory in GLSL.
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Nvidia defaults to wrapped shifts, but this is undefined behaviour on
OpenGL's spec. Explicitly mask/clamp according to what the guest shader
requires.
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shader_ir/conversion: Implement F2I and F2F F16 selector
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float_set_predicate: Add missing negation bit for the second operand
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* texture_cache/surface_params: Remove unused local variable
* rasterizer_interface: Add missing documentation commentary
* maxwell_dma: Remove unused rasterizer reference
* video_core/gpu: Sort member declaration order to silent -Wreorder warning
* fermi_2d: Remove unused MemoryManager reference
* video_core: Silent unused variable warnings
* buffer_cache: Silent -Wreorder warnings
* kepler_memory: Remove unused MemoryManager reference
* gl_texture_cache: Add missing override
* buffer_cache: Add missing include
* shader/decode: Remove unused variables
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shader/decode: Implement S2R Tic
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Implement VOTE using Nvidia's intrinsics. Documentation about these can
be found here
https://developer.nvidia.com/reading-between-threads-shader-intrinsics
Instead of using portable ARB instructions I opted to use Nvidia
intrinsics because these are the closest we have to how Tegra X1
hardware renders.
To stub VOTE on non-Nvidia drivers (including nouveau) this commit
simulates a GPU with a warp size of one, returning what is meaningful
for the instruction being emulated:
* anyThreadNV(value) -> value
* allThreadsNV(value) -> value
* allThreadsEqualNV(value) -> true
ballotARB, also known as "uint64_t(activeThreadsNV())", emits
VOTE.ANY Rd, PT, PT;
on nouveau's compiler. This doesn't match exactly to Nvidia's code
VOTE.ALL Rd, PT, PT;
Which is emulated with activeThreadsNV() by this commit. In theory this
shouldn't really matter since .ANY, .ALL and .EQ affect the predicates
(set to PT on those cases) and not the registers.
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half_set_predicate: Fix HSETP2_C constant buffer offset
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Shader_Ir: Implement F16 Variants of F2F, F2I, I2F.
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shader_ir: Implement NOP
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Downgrade and suppress a series of GPU asserts and debug messages.
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This commit takes care of implementing the F16 Variants of the
conversion instructions and makes sure conversions are done.
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