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* shader: add FmulPostFactor LUT table
* shader: FMUL apply LUT
* Update src/video_core/engines/shader_bytecode.h
Co-Authored-By: Mat M. <mathew1800@gmail.com>
* nit: mistype
* clang-format & add missing import
* shader: remove post factor LUT.
* shader: move post factor LUT to function and fix incorrect order.
* clang-format
* shader: FMUL: add static to post factor LUT
* nit: typo
Co-authored-by: Mat M. <mathew1800@gmail.com>
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shader: implement LOP3 fast replace for old function
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Fix typo in the illegal 3D texture assert logic. We care about catching
arrayed 3D textures or 3D shadow textures, not regular 3D textures.
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ref: https://devtalk.nvidia.com/default/topic/1070081/cuda-programming-and-performance/reverse-lut-for-lop3-lut/
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shader/texture: Allow 2D shadow arrays and simplify code
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Shadow sampler 2D arrays are supported on OpenGL, so there's no reason
to forbid these. Enable textureLod usage on these.
Minor style changes.
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shader/decode: Fix constant buffer offsets
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shader/shift: Implement SHF
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Some instances were using cbuf34.offset instead of cbuf34.GetOffset().
This returned the an invalid offset. Address those instances and rename
offset to "shifted_offset" to avoid future bugs.
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shader/bfi: Implement register-constant buffer variant
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shader/arithmetic: Implement FCMP
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yuzu: Implement Vulkan frontend
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Partially implement Indexed samplers in general and specific code in GLSL
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Shifts a pair of registers to the right and returns the low register.
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Shifts a pair of registers to the left and returns the high register.
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shader/memory: Implement LDL.S16, LDS.S16, STL.S16 and STS.S16
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It's the same as the variant that was implemented, but it takes the
operands from another source.
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Compares the third operand with zero, then selects between the first and
second.
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ATOM operates atomically on global memory. For now only add ATOM.ADD
since that's what was found in commercial games.
This asserts for ATOM.ADD.S32 (handling the others as unimplemented),
although ATOM.ADD.U32 shouldn't be any different.
This change forces us to change the default type on SPIR-V storage
buffers from float to uint. We could also alias the buffers, but it's
simpler for now to just use uint. While we are at it, abstract the code
to avoid repetition.
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the type.
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Shader_IR: Implement TXD Array.
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shader_ir/memory: Implement u16 and u8 for STG and LDG
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Using the same technique we used for u8 on LDG, implement u16.
In the case of STG, load memory and insert the value we want to set
into it with bitfieldInsert. Then set that value.
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This commit extends the compilation of TXD to support array samplers on
TXD.
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shader/p2r: Implement P2R Pr
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shader/texture: Implement AOFFI and PTP for TLD4 and TLD4S
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shader/memory: Implement LDG.U8 and unaligned U8 loads
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P2R dumps predicate or condition codes state to a register. This is
useful for unit testing.
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shader/conversion: Implement byte selector in I2F
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LDG can load single bytes instead of full integers or packs of integers.
These have the advantage of loading bytes that are not aligned to 4
bytes.
To emulate these this commit gets the byte being referenced (by doing
"address & 3" and then using that to extract the byte from the loaded
integer:
result = bitfieldExtract(loaded_integer, (address % 4) * 8, 8)
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I2F's byte selector is used to choose what bytes to convert to float.
e.g. if the input is 0xaabbccdd and the selector is ".B3" it will
convert 0xaa. The default (when it's not shown in nvdisasm) is ".B0", in
that example the default would convert 0xdd to float.
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