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2018-06-05Merge pull request #521 from Subv/brabunnei
GPU: Corrected the branch targets for the shader bra instruction.
2018-06-04GPU: Corrected the branch targets for the shader bra instruction.Subv
2018-06-04gl_shader_decompiler: Implement SHL instruction.bunnei
2018-06-04GPU: Implement the ISCADD shader instructions.Subv
2018-06-04GPU: Added decodings for the ISCADD instructions.Subv
2018-06-04Merge pull request #514 from Subv/lop32ibunnei
GPU: Implemented the LOP32I instruction.
2018-06-04Merge pull request #510 from Subv/isetpbunnei
GPU: Implemented the ISETP_R and ISETP_C instructions
2018-06-04Merge pull request #512 from Subv/fsetbunnei
GPU: Corrected the FSET and I2F instructions.
2018-06-04Merge pull request #501 from Subv/shader_brabunnei
GPU: Partially implemented the bra shader instruction
2018-06-04GPU: Use the bf bit in FSET to determine whether to write 0xFFFFFFFF or 1.0f.Subv
2018-06-04GPU: Calculate the correct viewport dimensions based on the scale and ↵Subv
translate registers. This is how nouveau calculates the viewport width and height. For some reason some games set 0xFFFF in the VIEWPORT_HORIZ and VIEWPORT_VERT registers, maybe those are a misnomer and actually refer to something else?
2018-06-04GPU: Implemented the LOP32I instruction.Subv
2018-06-04GPU: Implemented the ISETP_R and ISETP_C shader instructions.Subv
2018-06-03GPU: Partially implemented the shader BRA instruction.Subv
2018-06-03GPU: Added decoding for the BRA instruction.Subv
2018-06-03Merge pull request #500 from Subv/long_queriesbunnei
GPU: Partial implementation of long GPU queries.
2018-06-03GPU: Partial implementation of long GPU queries.Subv
Long queries write a 128-bit result value to memory, which consists of a 64 bit query value and a 64 bit timestamp. In this implementation, only select=Zero of the Crop unit is implemented, this writes the query sequence as a 64 bit value, and a 0u64 value for the timestamp, since we emulate an infinitely fast GPU. This specific type was hwtested, but more rigorous tests should be performed in the future for the other types.
2018-06-03gl_shader_decompiler: Implement TEXS component mask.bunnei
2018-06-03Merge pull request #494 from bunnei/shader-texbunnei
gl_shader_decompiler: Implement TEX, fixes for TEXS.
2018-06-03gl_shader_decompiler: Implement RRO as a register move.bunnei
2018-05-31gl_shader_decompiler: Implement TEX instruction.bunnei
2018-05-31gl_shader_decompiler: Support multi-destination for TEXS.bunnei
2018-05-30Merge pull request #489 from Subv/vertexidbunnei
Shaders: Implemented reading the gl_InstanceID and gl_VertexID variables in the vertex shader.
2018-05-30Shaders: Implemented reading the gl_InstanceID and gl_VertexID variables in ↵Subv
the vertex shader.
2018-05-29gl_shader_decompiler: Partially implement F2F_R instruction.bunnei
2018-05-25shader_bytecode: Implement other variants of FMNMX.bunnei
2018-05-20Merge pull request #458 from Subv/fmnmxbunnei
Shaders: Implemented the FMNMX shader instruction.
2018-05-20Shaders: Implemented the FMNMX shader instruction.Subv
2018-05-19ShadersDecompiler: Added decoding for the PSETP instruction.Subv
2018-04-29maxwell_3d: Reset vertex counts after drawing.bunnei
2018-04-29shader_bytecode: Add decoding for FMNMX instruction.bunnei
2018-04-29Merge pull request #416 from bunnei/shader-ints-p3bunnei
gl_shader_decompiler: Implement MOV32I, partially implement I2I, I2F
2018-04-28fermi_2d: Fix surface copy block height.bunnei
2018-04-28gl_shader_decompiler: Partially implement I2I_R, and I2F_R.bunnei
2018-04-28shader_bytecode: Add decodings for i2i instructions.bunnei
2018-04-28gl_shader_decompiler: Implement MOV32_IMM instruction.bunnei
2018-04-27general: Convert assertion macros over to be fmt-compatibleLioncash
2018-04-26gl_shader_decompiler: Boilerplate for handling integer instructions.bunnei
2018-04-25Merge pull request #396 from Subv/shader_opsbunnei
Shaders: Implemented the FSET instruction.
2018-04-25GPU: Partially implemented the Fermi2D surface copy operation.Subv
The hardware allows for some rather complicated operations to be performed on the data during the copy, this is not implemented. Only same-format same-size raw copies are implemented for now.
2018-04-25Shaders: Added bit decodings for the I2I instruction.Subv
2018-04-25GPU: Added surface copy registers to Fermi2DSubv
2018-04-25GPU: Added boilerplate code for the Fermi2D engineSubv
2018-04-25GPU: Reduce the number of registers of Maxwell3D to 0xE00.Subv
The rest are just macro shim registers.
2018-04-25GPU: Move the Maxwell3D macro uploading code to the inside of the Maxwell3D ↵Subv
processor. It doesn't belong in the PFIFO handler.
2018-04-25video-core: Move logging macros over to new fmt-capable onesLioncash
2018-04-24Shaders: Added decodings for the FSET instructions.Subv
2018-04-24memory_manager: Make GpuToCpuAddress return an optional.bunnei
2018-04-24memory_manager: Use GPUVAdddr, not PAddr, for GPU addresses.bunnei
2018-04-24Merge pull request #386 from Subv/gpu_querybunnei
GPU: Added asserts to our code for handling the QUERY_GET GPU command.