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AgeCommit message (Collapse)Author
2016-11-26dynarmic: Add ticks based on ticks executed, not ticks requestedMerryMage
2016-11-24Expose page table to dynarmic for optimized reads and writes to the JITJames Rowe
2016-09-21Use negative priorities to avoid special-casing the self-includeYuri Kunde Schlesner
2016-09-21Remove empty newlines in #include blocks.Emmanuel Gil Peyrot
This makes clang-format useful on those. Also add a bunch of forgotten transitive includes, which otherwise prevented compilation.
2016-09-18Manually tweak source formatting and then re-run clang-formatYuri Kunde Schlesner
2016-09-18Sources: Run clang-format on everything.Emmanuel Gil Peyrot
2016-09-18Dyncom: Disable clang-format on the decoding table.Emmanuel Gil Peyrot
2016-09-15arm_dynarmic: Implement GetVFPSystemReg/SetVFPSystemReg.bunnei
2016-09-15arm: ResetContext shouldn't be part of ARM_Interface.bunnei
2016-09-15arm_dynarmic/arm_dyncom: Remove unnecessary "virtual" keyword.bunnei
2016-09-15dyncom: Use VFP_FPSCR/VFP_FPEXC.bunnei
2016-09-15dynarmic: Implement ARM CPU interface.bunnei
2016-08-27ARM: add ClearInstructionCache functionwwylele
2016-08-22dyncom: Read-after-write in SMLAMerryMage
In the case when RD === RN, RD was updated before AddOverflow was called to check for an overflow, resulting in an incorrect state of the Q flag.
2016-08-14Dyncom: Correct implementation of STM for R15MerryMage
2016-07-28dyncom: Fix translation of thumb REVSHMerryMage
2016-06-12Make arm_dyncom_trans* into a fully fledged compilation unitarchshift
2016-06-12arm_dyncom_interpreter: slightly change AllocBuffer to be intuitivearchshift
2016-06-10arm_dyncom_interpreter: Add specialized GetAddressingOpLoadStoreT funcarchshift
This allows us to get the addressing operation for STRT, LDRT, STRBT, and LDRBT. We do this so that translation functions don't need to see the addressing ops directly.
2016-06-10arm_dyncom_interpreter: rename operation functions to fit style guidearchshift
2016-06-10arm_dyncom_interpreter: Rename anonymous enum to TransExtDataarchshift
2016-06-10arm_dyncom_interpreter.cpp: #include translation info from inc filesarchshift
2016-05-26Merge pull request #1568 from JayFoxRox/fix-printfMat M
Fix ftoi and disable VFPv3
2016-05-18Remove `exceptions` parameter from `normaliseround` VFP functionsJannik Vogel
2016-05-18Fix exception propagation for VFP single precisionJannik Vogel
2016-05-18Fix exception propagation for VFP double precisionJannik Vogel
2016-05-18Fix read-after-write in SMUAD, SMLAD, SMUSD, SMLSDJannik Vogel
2016-05-17Set fpscr for new threadsJannik Vogel
2016-05-16Fix ftoi behaviourJannik Vogel
2016-05-16Respect fpscr in ftoizJannik Vogel
2016-05-16Disable VFP3 instructionsJannik Vogel
2016-05-09dyncom: Reset the context into user mode correctlyLioncash
The other mode was system mode.
2016-04-29Common: Remove section measurement from profiler (#1731)Yuri Kunde Schlesner
This has been entirely superseded by MicroProfile. The rest of the code can go when a simpler frametime/FPS meter is added to the GUI.
2016-04-09Fix BLX LR opcode interpretationmailwl
2016-04-08Update cpsr (T)humb bit while creating threadmailwl
2016-04-06Fix thumb ADR instruction alignmentmailwl
2016-04-05Merge pull request #1643 from MerryMage/make_uniqueMathew Maidment
Common: Remove Common::make_unique, use std::make_unique
2016-04-05Common: Remove Common::make_unique, use std::make_uniqueMerryMage
2016-03-31Merge pull request #1618 from MerryMage/one-stepMathew Maidment
Prevent cache overflow when single stepping
2016-03-30DynCom: Optimize single steppingMerryMage
2016-03-21armstate: Correct FIQ register bankingLioncash
FIQ has seven banked registers (R8 to R14), not two.
2016-01-19ARM_Disasm::DisassembleMemHalf: actually use width in determining opcode namerob turner
2015-12-30arm_dyncom_dec: Fix decoding of VMLSLioncash
Previously, all VMLS variants would misdecode as CDP (which isn't necessarily wrong in itself, however VMLS has it's own label of execution)
2015-12-28dyncom: Handle modifying the APSR via an MRC instructionLioncash
2015-12-20dyncom: Remove PC dispatch from several instructionsLioncash
These instructions aren't capable of using the PC as a destination
2015-12-19dyncom: Handle unprivileged load/store variants correctlyLioncash
LDRT/LDRBT/STRBT/STRT should simulate the load or store as if the host CPU is in user mode. STRT is also allowed to use the PC as an operand
2015-12-06dyncom: Remove static keyword from header functionsLioncash
2015-12-06arm_interface: Make GetNumInstructions constLioncash
2015-12-06arm_interface: directly initialize class membersLioncash
2015-12-06dyncom: const correctness changesLioncash
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