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path: root/src/core/arm/arm_interface.h
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2022-07-15dynarmic: Abort watchpoints ASAPMerry
2022-06-21dynarmic: Stop ReadCode callbacks to unmapped addressesLiam
2022-06-16core/debugger: memory breakpoint supportLiam
2022-06-01core/debugger: Improved stepping mechanism and misc fixesLiam
2022-06-01core/debugger: Implement new GDB stub debuggerLiam
2022-04-24Remove unused PrepareReschedule functionMerry
2022-04-20core/arm: separate backtrace collectionLiam
2022-04-03dynarmic: Better interruptsmerry
2022-02-02general: Replace NonCopyable struct with equivalentsLioncash
2021-05-27core/arm_interface: Call SVC after end of dynarmic block.Markus Wick
So we can modify all of dynarmic states within SVC without ExceptionalExit. Especially as the ExceptionalExit hack is dropped on upstream dynarmic.
2021-05-26core/arm: Drop ChangeProcessorID.Markus Wick
This code was used to switch the CPU ID on thread switches. However since "hle: kernel: multicore: Replace n-JITs impl. with 4 JITs.", the CPU ID is not a constant. This has been dead code since this rewrite, and dropped in dynarmic as well. So there is no need to keep it.
2021-01-11core: arm: arm_interface: Fix shadowing errors.bunnei
2020-11-29core: arm: Implement InvalidateCacheRange for CPU cache invalidation.bunnei
2020-11-29hle: kernel: multicore: Replace n-JITs impl. with 4 JITs.bunnei
2020-10-20Revert "core: Fix clang build"bunnei
2020-10-17core: Fix clang buildLioncash
Recent changes to the build system that made more warnings be flagged as errors caused building via clang to break. Fixes #4795
2020-06-27Core/Common: Address Feedback.Fernando Sahmkow
2020-06-27SVC: Implement 32-bits wrappers and update Dynarmic.Fernando Sahmkow
2020-06-27SingleCore: Use Cycle Timing instead of Host Timing.Fernando Sahmkow
2020-06-27General: Move ARM_Interface into Threads.Fernando Sahmkow
2020-06-27Core: Refactor ARM Interface.Fernando Sahmkow
2020-06-27ARM/WaitTree: Better track the CallStack for each thread.Fernando Sahmkow
2020-06-27Scheduler: Remove arm_interface lock and a few corrections.Fernando Sahmkow
2020-06-27General: Add better safety for JIT use.Fernando Sahmkow
2020-06-27General: Recover Prometheus project from harddrive failure Fernando Sahmkow
This commit: Implements CPU Interrupts, Replaces Cycle Timing for Host Timing, Reworks the Kernel's Scheduler, Introduce Idle State and Suspended State, Recreates the bootmanager, Initializes Multicore system.
2020-04-17arm_interface: Ensure ThreadContext is zero'd out.bunnei
2020-03-02core: Implement separate A32/A64 ARM interfaces.bunnei
2019-11-26core: Prepare various classes for memory read/write migrationLioncash
Amends a few interfaces to be able to handle the migration over to the new Memory class by passing the class by reference as a function parameter where necessary. Notably, within the filesystem services, this eliminates two ReadBlock() calls by using the helper functions of HLERequestContext to do that for us.
2019-07-11core/arm: Remove obsolete Unicorn memory mappingLioncash
This was initially necessary when AArch64 JIT emulation was in its infancy and all memory-related instructions weren't implemented. Given the JIT now has all of these facilities implemented, we can remove these functions from the CPU interface.
2019-05-25arm_interface: Expand backtrace generationZach Hilman
Returns results as a vector of entries for further processing. Logs addresses, offsets, and mangled name.
2019-04-11core/cpu_core_manager: Create threads separately from initialization.Lioncash
Our initialization process is a little wonky than one would expect when it comes to code flow. We initialize the CPU last, as opposed to hardware, where the CPU obviously needs to be first, otherwise nothing else would work, and we have code that adds checks to get around this. For example, in the page table setting code, we check to see if the system is turned on before we even notify the CPU instances of a page table switch. This results in dead code (at the moment), because the only time a page table switch will occur is when the system is *not* running, preventing the emulated CPU instances from being notified of a page table switch in a convenient manner (technically the code path could be taken, but we don't emulate the process creation svc handlers yet). This moves the threads creation into its own member function of the core manager and restores a little order (and predictability) to our initialization process. Previously, in the multi-threaded cases, we'd kick off several threads before even the main kernel process was created and ready to execute (gross!). Now the initialization process is like so: Initialization: 1. Timers 2. CPU 3. Kernel 4. Filesystem stuff (kind of gross, but can be amended trivially) 5. Applet stuff (ditto in terms of being kind of gross) 6. Main process (will be moved into the loading step in a following change) 7. Telemetry (this should be initialized last in the future). 8. Services (4 and 5 should ideally be alongside this). 9. GDB (gross. Uses namespace scope state. Needs to be refactored into a class or booted altogether). 10. Renderer 11. GPU (will also have its threads created in a separate step in a following change). Which... isn't *ideal* per-se, however getting rid of the wonky intertwining of CPU state initialization out of this mix gets rid of most of the footguns when it comes to our initialization process.
2018-12-30arm_interface: Make LogBacktrace() a const member functionLioncash
This function doesn't modify instance state, so it can be made const.
2018-12-29Moved log backtrace to arm_interface.cpp. Added printing of error code to fatalDavid Marcec
2018-12-19Moved backtrace to ArmInterfaceDavid Marcec
2018-12-03Moved backtrace to ArmInterfaceDavid Marcec
Added to both dynarmic and unicorn
2018-09-30arm_interface: Add missing fpsr/tpidr members to the ThreadContext structLioncash
Internally within the kernel, it also includes a member variable for the floating-point status register, and TPIDR, so we should do the same here to match it. While we're at it, also fix up the size of the struct and add a static assertion to ensure it always stays the correct size.
2018-09-20arm_interface: Replace kernel vm_manager include with a forward declarationLioncash
Avoids an unnecessary inclusion and also uncovers three places where indirect inclusions were relied upon, which allows us to also resolve those.
2018-09-18arm_interface: Remove ARM11-isms from the CPU interfaceLioncash
This modifies the CPU interface to more accurately match an AArch64-supporting CPU as opposed to an ARM11 one. Two of the methods don't even make sense to keep around for this interface, as Adv Simd is used, rather than the VFP in the primary execution state. This is essentially a modernization change that should have occurred from the get-go.
2018-09-15Port #4182 from Citra: "Prefix all size_t with std::"fearlessTobi
2018-08-24core: Namespace all code in the arm subdirectory under the Core namespaceLioncash
Gets all of these types and interfaces out of the global namespace.
2018-07-21Merge pull request #750 from lioncash/ctxbunnei
arm_interface: Remove unused tls_address member of ThreadContext
2018-07-20CPU: Save and restore the TPIDR_EL0 system register on every context switch.Subv
Note that there's currently a dynarmic bug preventing this register from being written.
2018-07-20arm_interface: Remove unused tls_address member of ThreadContextLioncash
Currently, the TLS address is set within the scheduler, making this member unused.
2018-07-16scheduler: Clear exclusive state when switching contextsMerryMage
2018-03-18Merge pull request #193 from N00byKing/3184_2_robotic_boogaloobunnei
Implement Pull #3184 from citra: core/arm: Improve timing accuracy before service calls in JIT (Rebased)
2018-03-16arm_interface: Support unmapping previously mapped memory.bunnei
2018-02-25Implements citra-emu/citra#3184N00byKing
2018-01-16clang-formatMerryMage
2018-01-12arm_dynarmic: Implement coreMerryMage
2018-01-02arm: Remove SkyEye/Dyncom code that is ARMv6-only.bunnei