3 files changed, 14 insertions, 20 deletions

diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp
index c779e3fd4..31eb879a2 100644
--- a/src/core/arm/dyncom/arm_dyncom.cpp
+++ b/src/core/arm/dyncom/arm_dyncom.cpp
@@ -15,7 +15,7 @@ const static cpu_config_t s_arm11_cpu_info = {
     "armv6", "arm11", 0x0007b000, 0x0007f000, NONCACHE
 };
 
-ARM_DynCom::ARM_DynCom() : ticks(0) {
+ARM_DynCom::ARM_DynCom() {
     state = std::unique_ptr<ARMul_State>(new ARMul_State);
 
     ARMul_EmulateInit();
@@ -74,11 +74,11 @@ void ARM_DynCom::SetCPSR(u32 cpsr) {
 }
 
 u64 ARM_DynCom::GetTicks() const {
-    return ticks;
+    // TODO(Subv): Remove ARM_DynCom::GetTicks() and use CoreTiming::GetTicks() directly once ARMemu is gone
+    return CoreTiming::GetTicks();
 }
 
 void ARM_DynCom::AddTicks(u64 ticks) {
-    this->ticks += ticks;
     down_count -= ticks;
     if (down_count < 0)
         CoreTiming::Advance();
diff --git a/src/core/arm/dyncom/arm_dyncom.h b/src/core/arm/dyncom/arm_dyncom.h
index 7284dcd07..9e102a46e 100644
--- a/src/core/arm/dyncom/arm_dyncom.h
+++ b/src/core/arm/dyncom/arm_dyncom.h
@@ -89,8 +89,5 @@ public:
     void ExecuteInstructions(int num_instructions) override;
 
 private:
-
     std::unique_ptr<ARMul_State> state;
-    u64 ticks;
-
 };
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
index 426fc6474..e3ca02e98 100644
--- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
@@ -5891,16 +5891,13 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
 
     SMULW_INST:
     {
-        if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) {
-            smlad_inst *inst_cream = (smlad_inst *)inst_base->component;
-            int64_t rm = RM;
-            int64_t rn = RN;
-            if (inst_cream->m)
-                rm = BITS(rm, 16, 31);
-            else
-                rm = BITS(rm, 0, 15);
-            int64_t rst = rm * rn;
-            RD = BITS(rst, 16, 47);
+        if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
+            smlad_inst* const inst_cream = (smlad_inst*)inst_base->component;
+
+            s16 rm = (inst_cream->m == 1) ? ((RM >> 16) & 0xFFFF) : (RM & 0xFFFF);
+
+            s64 result = (s64)rm * (s64)(s32)RN;
+            RD = BITS(result, 16, 47);
         }
         cpu->Reg[15] += GET_INST_SIZE(cpu);
         INC_PC(sizeof(smlad_inst));
@@ -6699,10 +6696,10 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
     {
         if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
             umaal_inst* const inst_cream = (umaal_inst*)inst_base->component;
-            const u32 rm = RM;
-            const u32 rn = RN;
-            const u32 rd_lo = RDLO;
-            const u32 rd_hi = RDHI;
+            const u64 rm = RM;
+            const u64 rn = RN;
+            const u64 rd_lo = RDLO;
+            const u64 rd_hi = RDHI;
             const u64 result = (rm * rn) + rd_lo + rd_hi;
 
             RDLO = (result & 0xFFFFFFFF);