4 files changed, 40 insertions, 11 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp
index 1638bc41d..3b8b43994 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp
@@ -195,14 +195,16 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable*
     if (page_table) {
         config.page_table = reinterpret_cast<std::array<std::uint8_t*, NUM_PAGE_TABLE_ENTRIES>*>(
             page_table->pointers.data());
+        config.absolute_offset_page_table = true;
+        config.page_table_pointer_mask_bits = Common::PageTable::ATTRIBUTE_BITS;
+        config.detect_misaligned_access_via_page_table = 16 | 32 | 64 | 128;
+        config.only_detect_misalignment_via_page_table_on_page_boundary = true;
+
         config.fastmem_pointer = page_table->fastmem_arena;
+
+        config.fastmem_exclusive_access = config.fastmem_pointer != nullptr;
+        config.recompile_on_exclusive_fastmem_failure = true;
     }
-    config.absolute_offset_page_table = true;
-    config.page_table_pointer_mask_bits = Common::PageTable::ATTRIBUTE_BITS;
-    config.detect_misaligned_access_via_page_table = 16 | 32 | 64 | 128;
-    config.only_detect_misalignment_via_page_table_on_page_boundary = true;
-    config.fastmem_exclusive_access = true;
-    config.recompile_on_exclusive_fastmem_failure = true;
 
     // Multi-process state
     config.processor_id = core_index;
@@ -254,6 +256,7 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable*
         }
         if (!Settings::values.cpuopt_fastmem) {
             config.fastmem_pointer = nullptr;
+            config.fastmem_exclusive_access = false;
         }
         if (!Settings::values.cpuopt_fastmem_exclusives) {
             config.fastmem_exclusive_access = false;
diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.cpp b/src/core/arm/dynarmic/arm_dynarmic_64.cpp
index 921a5a734..1d46f6d40 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_64.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic_64.cpp
@@ -250,7 +250,7 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable*
         config.fastmem_address_space_bits = address_space_bits;
         config.silently_mirror_fastmem = false;
 
-        config.fastmem_exclusive_access = true;
+        config.fastmem_exclusive_access = config.fastmem_pointer != nullptr;
         config.recompile_on_exclusive_fastmem_failure = true;
     }
 
@@ -314,6 +314,7 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable*
         }
         if (!Settings::values.cpuopt_fastmem) {
             config.fastmem_pointer = nullptr;
+            config.fastmem_exclusive_access = false;
         }
         if (!Settings::values.cpuopt_fastmem_exclusives) {
             config.fastmem_exclusive_access = false;
diff --git a/src/core/arm/dynarmic/arm_dynarmic_cp15.cpp b/src/core/arm/dynarmic/arm_dynarmic_cp15.cpp
index e9123c13d..200efe4db 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_cp15.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic_cp15.cpp
@@ -8,6 +8,10 @@
 #include "core/core.h"
 #include "core/core_timing.h"
 
+#ifdef _MSC_VER
+#include <intrin.h>
+#endif
+
 using Callback = Dynarmic::A32::Coprocessor::Callback;
 using CallbackOrAccessOneWord = Dynarmic::A32::Coprocessor::CallbackOrAccessOneWord;
 using CallbackOrAccessTwoWords = Dynarmic::A32::Coprocessor::CallbackOrAccessTwoWords;
@@ -47,12 +51,31 @@ CallbackOrAccessOneWord DynarmicCP15::CompileSendOneWord(bool two, unsigned opc1
         switch (opc2) {
         case 4:
             // CP15_DATA_SYNC_BARRIER
-            // This is a dummy write, we ignore the value written here.
-            return &dummy_value;
+            return Callback{
+                [](Dynarmic::A32::Jit*, void*, std::uint32_t, std::uint32_t) -> std::uint64_t {
+#ifdef _MSC_VER
+                    _mm_mfence();
+                    _mm_lfence();
+#else
+                    asm volatile("mfence\n\tlfence\n\t" : : : "memory");
+#endif
+                    return 0;
+                },
+                std::nullopt,
+            };
         case 5:
             // CP15_DATA_MEMORY_BARRIER
-            // This is a dummy write, we ignore the value written here.
-            return &dummy_value;
+            return Callback{
+                [](Dynarmic::A32::Jit*, void*, std::uint32_t, std::uint32_t) -> std::uint64_t {
+#ifdef _MSC_VER
+                    _mm_mfence();
+#else
+                    asm volatile("mfence\n\t" : : : "memory");
+#endif
+                    return 0;
+                },
+                std::nullopt,
+            };
         }
     }
 
diff --git a/src/core/arm/dynarmic/arm_dynarmic_cp15.h b/src/core/arm/dynarmic/arm_dynarmic_cp15.h
index 5b2a51636..d90b3e568 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_cp15.h
+++ b/src/core/arm/dynarmic/arm_dynarmic_cp15.h
@@ -35,6 +35,8 @@ public:
     ARM_Dynarmic_32& parent;
     u32 uprw = 0;
     u32 uro = 0;
+
+    friend class ARM_Dynarmic_32;
 };
 
 } // namespace Core