4 files changed, 39 insertions, 6 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp
index 2e0e16b6e..1638bc41d 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp
@@ -144,7 +144,7 @@ public:
 
     u64 GetTicksRemaining() override {
         if (parent.uses_wall_clock) {
-            if (!parent.interrupt_handlers[parent.core_index].IsInterrupted()) {
+            if (!IsInterrupted()) {
                 return minimum_run_cycles;
             }
             return 0U;
@@ -174,6 +174,10 @@ public:
         parent.jit.load()->HaltExecution(hr);
     }
 
+    bool IsInterrupted() {
+        return parent.system.Kernel().PhysicalCore(parent.core_index).IsInterrupted();
+    }
+
     ARM_Dynarmic_32& parent;
     Core::Memory::Memory& memory;
     std::size_t num_interpreted_instructions{};
diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.cpp b/src/core/arm/dynarmic/arm_dynarmic_64.cpp
index bf971b7dc..921a5a734 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_64.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic_64.cpp
@@ -183,7 +183,7 @@ public:
 
     u64 GetTicksRemaining() override {
         if (parent.uses_wall_clock) {
-            if (!parent.interrupt_handlers[parent.core_index].IsInterrupted()) {
+            if (!IsInterrupted()) {
                 return minimum_run_cycles;
             }
             return 0U;
@@ -217,6 +217,10 @@ public:
         parent.jit.load()->HaltExecution(hr);
     }
 
+    bool IsInterrupted() {
+        return parent.system.Kernel().PhysicalCore(parent.core_index).IsInterrupted();
+    }
+
     ARM_Dynarmic_64& parent;
     Core::Memory::Memory& memory;
     u64 tpidrro_el0 = 0;
diff --git a/src/core/arm/dynarmic/arm_dynarmic_cp15.cpp b/src/core/arm/dynarmic/arm_dynarmic_cp15.cpp
index e9123c13d..200efe4db 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_cp15.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic_cp15.cpp
@@ -8,6 +8,10 @@
 #include "core/core.h"
 #include "core/core_timing.h"
 
+#ifdef _MSC_VER
+#include <intrin.h>
+#endif
+
 using Callback = Dynarmic::A32::Coprocessor::Callback;
 using CallbackOrAccessOneWord = Dynarmic::A32::Coprocessor::CallbackOrAccessOneWord;
 using CallbackOrAccessTwoWords = Dynarmic::A32::Coprocessor::CallbackOrAccessTwoWords;
@@ -47,12 +51,31 @@ CallbackOrAccessOneWord DynarmicCP15::CompileSendOneWord(bool two, unsigned opc1
         switch (opc2) {
         case 4:
             // CP15_DATA_SYNC_BARRIER
-            // This is a dummy write, we ignore the value written here.
-            return &dummy_value;
+            return Callback{
+                [](Dynarmic::A32::Jit*, void*, std::uint32_t, std::uint32_t) -> std::uint64_t {
+#ifdef _MSC_VER
+                    _mm_mfence();
+                    _mm_lfence();
+#else
+                    asm volatile("mfence\n\tlfence\n\t" : : : "memory");
+#endif
+                    return 0;
+                },
+                std::nullopt,
+            };
         case 5:
             // CP15_DATA_MEMORY_BARRIER
-            // This is a dummy write, we ignore the value written here.
-            return &dummy_value;
+            return Callback{
+                [](Dynarmic::A32::Jit*, void*, std::uint32_t, std::uint32_t) -> std::uint64_t {
+#ifdef _MSC_VER
+                    _mm_mfence();
+#else
+                    asm volatile("mfence\n\t" : : : "memory");
+#endif
+                    return 0;
+                },
+                std::nullopt,
+            };
         }
     }
 
diff --git a/src/core/arm/dynarmic/arm_dynarmic_cp15.h b/src/core/arm/dynarmic/arm_dynarmic_cp15.h
index 5b2a51636..d90b3e568 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_cp15.h
+++ b/src/core/arm/dynarmic/arm_dynarmic_cp15.h
@@ -35,6 +35,8 @@ public:
     ARM_Dynarmic_32& parent;
     u32 uprw = 0;
     u32 uro = 0;
+
+    friend class ARM_Dynarmic_32;
 };
 
 } // namespace Core