1 files changed, 23 insertions, 29 deletions

diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp
index a35c5c8dc..32e315f4b 100644
--- a/src/core/arm/interpreter/armemu.cpp
+++ b/src/core/arm/interpreter/armemu.cpp
@@ -23,17 +23,6 @@
 #include "armemu.h"
 #include "armos.h"
 
-void
-XScale_set_fsr_far(ARMul_State * state, ARMword fsr, ARMword _far)
-{
-    _dbg_assert_msg_(ARM11, false, "ImplementMe: XScale_set_fsr_far!");
-    //if (!state->is_XScale || (read_cp14_reg(10) & (1UL << 31)) == 0)
-    //    return;
-    //
-    //write_cp15_reg(state, 5, 0, 0, fsr);
-    //write_cp15_reg(state, 6, 0, 0, _far);
-}
-
 #define ARMul_Debug(x,y,z) 0 // Disabling this /bunnei
 
 //#include "skyeye_callback.h"
@@ -4745,7 +4734,7 @@ TEST_EMULATE:
         else if (state->Emulate != RUN)
             break;
     }
-    while (!state->stop_simulator);
+    while (state->NumInstrsToExecute--);
 
     state->decoded = decoded;
     state->loaded = loaded;
@@ -5536,14 +5525,15 @@ Handle_Load_Double (ARMul_State * state, ARMword instr)
         addr = base;
 
     /* The address must be aligned on a 8 byte boundary.  */
-    if (addr & 0x7) {
-#ifdef ABORTS
-        ARMul_DATAABORT (addr);
-#else
-        ARMul_UndefInstr (state, instr);
-#endif
-        return;
-    }
+    // FIX(Normatt): Disable strict alignment on LDRD/STRD
+//    if (addr & 0x7) {
+//#ifdef ABORTS
+//        ARMul_DATAABORT (addr);
+//#else
+//        ARMul_UndefInstr (state, instr);
+//#endif
+//        return;
+//    }
 
     /* For pre indexed or post indexed addressing modes,
        check that the destination registers do not overlap
@@ -5640,14 +5630,15 @@ Handle_Store_Double (ARMul_State * state, ARMword instr)
         addr = base;
 
     /* The address must be aligned on a 8 byte boundary.  */
-    if (addr & 0x7) {
-#ifdef ABORTS
-        ARMul_DATAABORT (addr);
-#else
-        ARMul_UndefInstr (state, instr);
-#endif
-        return;
-    }
+    // FIX(Normatt): Disable strict alignment on LDRD/STRD
+//    if (addr & 0x7) {
+//#ifdef ABORTS
+//        ARMul_DATAABORT (addr);
+//#else
+//        ARMul_UndefInstr (state, instr);
+//#endif
+//        return;
+//    }
 
     /* For pre indexed or post indexed addressing modes,
        check that the destination registers do not overlap
@@ -6405,6 +6396,8 @@ handle_v6_insn (ARMul_State * state, ARMword instr)
         if (state->Aborted) {
             TAKEABORT;
         }
+        // FIX(Normmatt): Handle RD in STREX/STREXB
+        state->Reg[DESTReg] = 0; //Always succeed
 
         return 1;
      }
@@ -6432,7 +6425,8 @@ handle_v6_insn (ARMul_State * state, ARMword instr)
         if (state->Aborted) {
             TAKEABORT;
         }
-
+        // FIX(Normmatt): Handle RD in STREX/STREXB
+        state->Reg[DESTReg] = 0; //Always succeed
         //printf("In %s, strexb not implemented\n", __FUNCTION__);
         UNDEF_LSRBPC;
         /* WRITESDEST (dest); */