diff options
| author | archshift <gh@archshift.com> | 2016-06-08 21:03:49 -0700 |
|---|---|---|
| committer | archshift <gh@archshift.com> | 2016-06-08 21:03:49 -0700 |
| commit | a371744575bcec6a92c3bb8801b980530a4443a5 (patch) | |
| tree | b621cbc12e9d1bfda6374a099d4d7e3ff36244b5 /src/core/arm/dyncom/arm_dyncom_interpreter.cpp | |
| parent | c7ffd8a920cb2504c7cb9ec7f06e1a95cba73953 (diff) | |
arm_dyncom_interpreter: rename operation functions to fit style guide
Diffstat (limited to 'src/core/arm/dyncom/arm_dyncom_interpreter.cpp')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 5f61b0ebb..01d5d478e 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -649,7 +649,7 @@ static void LnSWoUB(ScaledRegisterOffset)(ARMul_State* cpu, unsigned int inst, u virt_addr = addr; } -shtop_fp_t get_shifter_op(unsigned int inst) { +shtop_fp_t GetShifterOp(unsigned int inst) { if (BIT(inst, 25)) { return DPO(Immediate); } else if (BITS(inst, 4, 11) == 0) { @@ -674,7 +674,7 @@ shtop_fp_t get_shifter_op(unsigned int inst) { return nullptr; } -get_addr_fp_t get_calc_addr_op(unsigned int inst) { +get_addr_fp_t GetAddressingOp(unsigned int inst) { if (BITS(inst, 24, 27) == 5 && BIT(inst, 21) == 0) { return LnSWoUB(ImmediateOffset); } else if (BITS(inst, 24, 27) == 7 && BIT(inst, 21) == 0 && BITS(inst, 4, 11) == 0) { @@ -718,7 +718,7 @@ get_addr_fp_t get_calc_addr_op(unsigned int inst) { } // Specialized for LDRT, LDRBT, STRT, and STRBT, which have specific addressing mode requirements -get_addr_fp_t get_calc_addr_op_loadstoret(unsigned int inst) { +get_addr_fp_t GetAddressingOpLoadStoreT(unsigned int inst) { if (BITS(inst, 25, 27) == 2) { return LnSWoUB(ImmediatePostIndexed); } else if (BITS(inst, 25, 27) == 3) { |
