From e9848339ddac3d6fe32a0ce0fbe6029c4ad40429 Mon Sep 17 00:00:00 2001 From: TSRBerry <20988865+TSRBerry@users.noreply.github.com> Date: Sat, 1 Jul 2023 04:14:34 +0200 Subject: [Ryujinx.Tests] Address dotnet-format issues (#5389) * dotnet format style --severity info Some changes were manually reverted. * dotnet format analyzers --serverity info Some changes have been minimally adapted. * Restore a few unused methods and variables * Fix new dotnet-format issues after rebase * Address review comments * Address most dotnet format whitespace warnings * Apply dotnet format whitespace formatting A few of them have been manually reverted and the corresponding warning was silenced * Format if-blocks correctly * Run dotnet format after rebase and remove unused usings - analyzers - style - whitespace * Add comments to disabled warnings * Simplify properties and array initialization, Use const when possible, Remove trailing commas * cpu tests: Disable CA2211 for CodeBaseAddress and DataBaseAddress * Revert "Simplify properties and array initialization, Use const when possible, Remove trailing commas" This reverts commit 9462e4136c0a2100dc28b20cf9542e06790aa67e. * dotnet format whitespace after rebase * Apply suggestions from code review Co-authored-by: Ac_K * First dotnet format pass * Fix naming rule violations * Remove naming rule violation exceptions * Fix comment style * Use targeted new * Remove redundant code * Remove comment alignment * Remove naming rule exceptions * Add trailing commas * Use nameof expression * Reformat to add remaining trailing commas --------- Co-authored-by: Ac_K --- src/Ryujinx.Tests/Cpu/CpuTestMul32.cs | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'src/Ryujinx.Tests/Cpu/CpuTestMul32.cs') diff --git a/src/Ryujinx.Tests/Cpu/CpuTestMul32.cs b/src/Ryujinx.Tests/Cpu/CpuTestMul32.cs index 0743e913..58da762d 100644 --- a/src/Ryujinx.Tests/Cpu/CpuTestMul32.cs +++ b/src/Ryujinx.Tests/Cpu/CpuTestMul32.cs @@ -9,7 +9,7 @@ namespace Ryujinx.Tests.Cpu { #if Mul32 -#region "ValueSource (Opcodes)" + #region "ValueSource (Opcodes)" private static uint[] _Smlabb_Smlabt_Smlatb_Smlatt_() { return new[] @@ -49,10 +49,10 @@ namespace Ryujinx.Tests.Cpu 0xe12000e0u, // SMULWT R0, R0, R0 }; } -#endregion + #endregion [Test, Pairwise, Description("SMLA , , , ")] - public void Smla___32bit([ValueSource("_Smlabb_Smlabt_Smlatb_Smlatt_")] uint opcode, + public void Smla___32bit([ValueSource(nameof(_Smlabb_Smlabt_Smlatb_Smlatt_))] uint opcode, [Values(0u, 0xdu)] uint rn, [Values(1u, 0xdu)] uint rm, [Values(2u, 0xdu)] uint ra, @@ -74,7 +74,7 @@ namespace Ryujinx.Tests.Cpu } [Test, Pairwise, Description("SMLAW , , , ")] - public void Smlaw__32bit([ValueSource("_Smlawb_Smlawt_")] uint opcode, + public void Smlaw__32bit([ValueSource(nameof(_Smlawb_Smlawt_))] uint opcode, [Values(0u, 0xdu)] uint rn, [Values(1u, 0xdu)] uint rm, [Values(2u, 0xdu)] uint ra, @@ -96,7 +96,7 @@ namespace Ryujinx.Tests.Cpu } [Test, Pairwise, Description("SMUL , , ")] - public void Smul___32bit([ValueSource("_Smulbb_Smulbt_Smultb_Smultt_")] uint opcode, + public void Smul___32bit([ValueSource(nameof(_Smulbb_Smulbt_Smultb_Smultt_))] uint opcode, [Values(0u, 0xdu)] uint rn, [Values(1u, 0xdu)] uint rm, [Values(2u, 0xdu)] uint rd, @@ -115,7 +115,7 @@ namespace Ryujinx.Tests.Cpu } [Test, Pairwise, Description("SMULW , , ")] - public void Smulw__32bit([ValueSource("_Smulwb_Smulwt_")] uint opcode, + public void Smulw__32bit([ValueSource(nameof(_Smulwb_Smulwt_))] uint opcode, [Values(0u, 0xdu)] uint rn, [Values(1u, 0xdu)] uint rm, [Values(2u, 0xdu)] uint rd, @@ -134,4 +134,4 @@ namespace Ryujinx.Tests.Cpu } #endif } -} \ No newline at end of file +} -- cgit v1.2.3