From 7ccff037e87f82f3461f3e1422235e29800eaa2f Mon Sep 17 00:00:00 2001 From: gdkchan Date: Thu, 14 Sep 2023 14:58:11 -0300 Subject: Fix some Vulkan validation errors (mostly related to barriers) (#5603) * Replace image barriers inside render pass with more generic memory barrier * Remove forceStorage since it was creating images with storage bit for formats that are not StorageImage compatible * Add missing flags on subpass dependency * Don't call vkCmdSetScissor with a scissor count of 0 * One semaphore per swapchain image * Remove compute stage from read to write barriers * Try to improve Pipeline.Barrier nonsense * Set PipelineStateFlags based on supported stages --- src/Ryujinx.Graphics.Vulkan/FramebufferParams.cs | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'src/Ryujinx.Graphics.Vulkan/FramebufferParams.cs') diff --git a/src/Ryujinx.Graphics.Vulkan/FramebufferParams.cs b/src/Ryujinx.Graphics.Vulkan/FramebufferParams.cs index 7600c2d5..662bb80f 100644 --- a/src/Ryujinx.Graphics.Vulkan/FramebufferParams.cs +++ b/src/Ryujinx.Graphics.Vulkan/FramebufferParams.cs @@ -257,14 +257,22 @@ namespace Ryujinx.Graphics.Vulkan if (realIndex != -1) { - _colors[realIndex].Storage?.InsertReadToWriteBarrier(cbs, AccessFlags.ColorAttachmentWriteBit, PipelineStageFlags.ColorAttachmentOutputBit); + _colors[realIndex].Storage?.InsertReadToWriteBarrier( + cbs, + AccessFlags.ColorAttachmentWriteBit, + PipelineStageFlags.ColorAttachmentOutputBit, + insideRenderPass: true); } } } public void InsertClearBarrierDS(CommandBufferScoped cbs) { - _depthStencil?.Storage?.InsertReadToWriteBarrier(cbs, AccessFlags.DepthStencilAttachmentWriteBit, PipelineStageFlags.LateFragmentTestsBit); + _depthStencil?.Storage?.InsertReadToWriteBarrier( + cbs, + AccessFlags.DepthStencilAttachmentWriteBit, + PipelineStageFlags.LateFragmentTestsBit, + insideRenderPass: true); } } } -- cgit v1.2.3