From 9becbd7d728fc2002c176dfd9d1d1aae86f86b12 Mon Sep 17 00:00:00 2001
From: TSRBerry <20988865+TSRBerry@users.noreply.github.com>
Date: Wed, 28 Jun 2023 08:59:13 +0200
Subject: [Ryujinx.Graphics.Shader] Address dotnet-format issues (#5373)

* dotnet format style --severity info

Some changes were manually reverted.

* Restore a few unused methods and variables

* Silence dotnet format IDE0060 warnings

* Silence dotnet format IDE0052 warnings

* Silence dotnet format IDE0059 warnings

* Address or silence dotnet format CA1069 warnings

* Address or silence dotnet format CA2211 warnings

* Address review comments

* Fix formatting for switch expressions

* Address most dotnet format whitespace warnings

* Apply dotnet format whitespace formatting

A few of them have been manually reverted and the corresponding warning was silenced

* Format if-blocks correctly

* Run dotnet format whitespace after rebase

* Run dotnet format style after rebase

* Run dotnet format whitespace after rebase

* Run dotnet format style after rebase

* Run dotnet format after rebase and remove unused usings

- analyzers
- style
- whitespace

* Disable 'prefer switch expression' rule

* Add comments to disabled warnings

* Fix naming rule violation, Convert shader properties to auto-property and convert values to const

* Simplify properties and array initialization, Use const when possible, Remove trailing commas

* Run dotnet format after rebase

* Address IDE0251 warnings

* Address a few disabled IDE0060 warnings

* Silence IDE0060 in .editorconfig

* Run dotnet format after rebase

* Revert "Simplify properties and array initialization, Use const when possible, Remove trailing commas"

This reverts commit 9462e4136c0a2100dc28b20cf9542e06790aa67e.

* dotnet format whitespace after rebase

* First dotnet format pass

* Fix naming rule violations

* Add trailing commas

* Remove unused members and most unnecessary value assignments

* Remove more unnecessary assignments

* Remove NRE suppressor
---
 .../Instructions/InstEmitIntegerLogical.cs                    | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

(limited to 'src/Ryujinx.Graphics.Shader/Instructions/InstEmitIntegerLogical.cs')

diff --git a/src/Ryujinx.Graphics.Shader/Instructions/InstEmitIntegerLogical.cs b/src/Ryujinx.Graphics.Shader/Instructions/InstEmitIntegerLogical.cs
index 1f3f66ae..5993c93d 100644
--- a/src/Ryujinx.Graphics.Shader/Instructions/InstEmitIntegerLogical.cs
+++ b/src/Ryujinx.Graphics.Shader/Instructions/InstEmitIntegerLogical.cs
@@ -1,7 +1,6 @@
 using Ryujinx.Graphics.Shader.Decoders;
 using Ryujinx.Graphics.Shader.IntermediateRepresentation;
 using Ryujinx.Graphics.Shader.Translation;
-
 using static Ryujinx.Graphics.Shader.Instructions.InstEmitAluHelper;
 using static Ryujinx.Graphics.Shader.Instructions.InstEmitHelper;
 using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
@@ -103,10 +102,10 @@ namespace Ryujinx.Graphics.Shader.Instructions
 
             Operand res = logicOp switch
             {
-                LogicOp.And => res = context.BitwiseAnd(srcA, srcB),
-                LogicOp.Or => res = context.BitwiseOr(srcA, srcB),
-                LogicOp.Xor => res = context.BitwiseExclusiveOr(srcA, srcB),
-                _ => srcB
+                LogicOp.And => context.BitwiseAnd(srcA, srcB),
+                LogicOp.Or => context.BitwiseOr(srcA, srcB),
+                LogicOp.Xor => context.BitwiseExclusiveOr(srcA, srcB),
+                _ => srcB,
             };
 
             EmitLopPredWrite(context, res, predOp, destPred);
@@ -164,4 +163,4 @@ namespace Ryujinx.Graphics.Shader.Instructions
             }
         }
     }
-}
\ No newline at end of file
+}
-- 
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