From cee712105850ac3385cd0091a923438167433f9f Mon Sep 17 00:00:00 2001
From: TSR Berry <20988865+TSRBerry@users.noreply.github.com>
Date: Sat, 8 Apr 2023 01:22:00 +0200
Subject: Move solution and projects to src
---
src/Ryujinx.Cpu/ExceptionCallbacks.cs | 64 +++++++++++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
create mode 100644 src/Ryujinx.Cpu/ExceptionCallbacks.cs
(limited to 'src/Ryujinx.Cpu/ExceptionCallbacks.cs')
diff --git a/src/Ryujinx.Cpu/ExceptionCallbacks.cs b/src/Ryujinx.Cpu/ExceptionCallbacks.cs
new file mode 100644
index 00000000..d9293302
--- /dev/null
+++ b/src/Ryujinx.Cpu/ExceptionCallbacks.cs
@@ -0,0 +1,64 @@
+namespace Ryujinx.Cpu
+{
+ ///
+ /// Exception callback without any additional arguments.
+ ///
+ /// Context for the thread where the exception was triggered
+ public delegate void ExceptionCallbackNoArgs(IExecutionContext context);
+
+ ///
+ /// Exception callback.
+ ///
+ /// Context for the thread where the exception was triggered
+ /// Address of the instruction that caused the exception
+ /// Immediate value of the instruction that caused the exception, or for undefined instruction, the instruction itself
+ public delegate void ExceptionCallback(IExecutionContext context, ulong address, int imm);
+
+ ///
+ /// Stores handlers for the various CPU exceptions.
+ ///
+ public readonly struct ExceptionCallbacks
+ {
+ ///
+ /// Handler for CPU interrupts triggered using .
+ ///
+ public readonly ExceptionCallbackNoArgs InterruptCallback;
+
+ ///
+ /// Handler for CPU software interrupts caused by the Arm BRK instruction.
+ ///
+ public readonly ExceptionCallback BreakCallback;
+
+ ///
+ /// Handler for CPU software interrupts caused by the Arm SVC instruction.
+ ///
+ public readonly ExceptionCallback SupervisorCallback;
+
+ ///
+ /// Handler for CPU software interrupts caused by any undefined Arm instruction.
+ ///
+ public readonly ExceptionCallback UndefinedCallback;
+
+ ///
+ /// Creates a new exception callbacks structure.
+ ///
+ ///
+ /// All handlers are optional, and if null, the CPU will just continue executing as if nothing happened.
+ ///
+ /// Handler for CPU interrupts triggered using
+ /// Handler for CPU software interrupts caused by the Arm BRK instruction
+ /// Handler for CPU software interrupts caused by the Arm SVC instruction
+ /// Handler for CPU software interrupts caused by any undefined Arm instruction
+ public ExceptionCallbacks(
+ ExceptionCallbackNoArgs interruptCallback = null,
+ ExceptionCallback breakCallback = null,
+ ExceptionCallback supervisorCallback = null,
+ ExceptionCallback undefinedCallback = null)
+ {
+ InterruptCallback = interruptCallback;
+ BreakCallback = breakCallback;
+ SupervisorCallback = supervisorCallback;
+ UndefinedCallback = undefinedCallback;
+ }
+ }
+}
--
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