From ff53dcf5607a82ad38388502b4cf5cc8cca77733 Mon Sep 17 00:00:00 2001
From: TSRBerry <20988865+TSRBerry@users.noreply.github.com>
Date: Mon, 26 Jun 2023 07:25:06 +0200
Subject: [ARMeilleure] Address dotnet-format issues (#5357)

* dotnet format style --severity info

Some changes were manually reverted.

* dotnet format analyzers --serverity info

Some changes have been minimally adapted.

* Restore a few unused methods and variables

* Silence dotnet format IDE0060 warnings

* Silence dotnet format IDE0052 warnings

* Address or silence dotnet format IDE1006 warnings

* Address or silence dotnet format CA2208 warnings

* Address dotnet format CA1822 warnings

* Address or silence dotnet format CA1069 warnings

* Silence CA1806 and CA1834 issues

* Address dotnet format CA1401 warnings

* Fix new dotnet-format issues after rebase

* Address review comments

* Address dotnet format CA2208 warnings properly

* Fix formatting for switch expressions

* Address most dotnet format whitespace warnings

* Apply dotnet format whitespace formatting

A few of them have been manually reverted and the corresponding warning was silenced

* Add previously silenced warnings back

I have no clue how these disappeared

* Revert formatting changes for OpCodeTable.cs

* Enable formatting for a few cases again

* Format if-blocks correctly

* Enable formatting for a few more cases again

* Fix inline comment alignment

* Run dotnet format after rebase and remove unused usings

- analyzers
- style
- whitespace

* Disable 'prefer switch expression' rule

* Add comments to disabled warnings

* Remove a few unused parameters

* Adjust namespaces

* Simplify properties and array initialization, Use const when possible, Remove trailing commas

* Start working on disabled warnings

* Fix and silence a few dotnet-format warnings again

* Address IDE0251 warnings

* Address a few disabled IDE0060 warnings

* Silence IDE0060 in .editorconfig

* Revert "Simplify properties and array initialization, Use const when possible, Remove trailing commas"

This reverts commit 9462e4136c0a2100dc28b20cf9542e06790aa67e.

* dotnet format whitespace after rebase

* First dotnet format pass

* Remove unnecessary formatting exclusion

* Add unsafe dotnet format changes

* Change visibility of JitSupportDarwin to internal
---
 src/ARMeilleure/Decoders/Decoder.cs | 34 +++++++++++++++++-----------------
 1 file changed, 17 insertions(+), 17 deletions(-)

(limited to 'src/ARMeilleure/Decoders/Decoder.cs')

diff --git a/src/ARMeilleure/Decoders/Decoder.cs b/src/ARMeilleure/Decoders/Decoder.cs
index 426465aa..d8abeb9c 100644
--- a/src/ARMeilleure/Decoders/Decoder.cs
+++ b/src/ARMeilleure/Decoders/Decoder.cs
@@ -20,11 +20,11 @@ namespace ARMeilleure.Decoders
 
         public static Block[] Decode(IMemoryManager memory, ulong address, ExecutionMode mode, bool highCq, DecoderMode dMode)
         {
-            List<Block> blocks = new List<Block>();
+            List<Block> blocks = new();
 
-            Queue<Block> workQueue = new Queue<Block>();
+            Queue<Block> workQueue = new();
 
-            Dictionary<ulong, Block> visited = new Dictionary<ulong, Block>();
+            Dictionary<ulong, Block> visited = new();
 
             Debug.Assert(MaxInstsPerFunctionLowCq <= MaxInstsPerFunction);
 
@@ -163,7 +163,7 @@ namespace ARMeilleure.Decoders
         {
             index = 0;
 
-            int left  = 0;
+            int left = 0;
             int right = blocks.Count - 1;
 
             while (left <= right)
@@ -196,9 +196,9 @@ namespace ARMeilleure.Decoders
 
         private static void FillBlock(
             IMemoryManager memory,
-            ExecutionMode  mode,
-            Block          block,
-            ulong          limitAddress)
+            ExecutionMode mode,
+            Block block,
+            ulong limitAddress)
         {
             ulong address = block.Address;
             int itBlockSize = 0;
@@ -241,12 +241,12 @@ namespace ARMeilleure.Decoders
         private static bool IsUnconditionalBranch(OpCode opCode)
         {
             return opCode is OpCodeBImmAl ||
-                   opCode is OpCodeBReg   || IsAarch32UnconditionalBranch(opCode);
+                   opCode is OpCodeBReg || IsAarch32UnconditionalBranch(opCode);
         }
 
         private static bool IsAarch32UnconditionalBranch(OpCode opCode)
         {
-            if (!(opCode is OpCode32 op))
+            if (opCode is not OpCode32 op)
             {
                 return false;
             }
@@ -290,9 +290,9 @@ namespace ARMeilleure.Decoders
 
                 if (opCode is IOpCode32Mem opMem)
                 {
-                    rt     = opMem.Rt;
-                    rn     = opMem.Rn;
-                    wBack  = opMem.WBack;
+                    rt = opMem.Rt;
+                    rn = opMem.Rn;
+                    wBack = opMem.WBack;
                     isLoad = opMem.IsLoad;
 
                     // For the dual load, we also need to take into account the
@@ -306,10 +306,10 @@ namespace ARMeilleure.Decoders
                 {
                     const int pcMask = 1 << RegisterAlias.Aarch32Pc;
 
-                    rt     = (opMemMult.RegisterMask & pcMask) != 0 ? RegisterAlias.Aarch32Pc : 0;
-                    rn     =  opMemMult.Rn;
-                    wBack  =  opMemMult.PostOffset != 0;
-                    isLoad =  opMemMult.IsLoad;
+                    rt = (opMemMult.RegisterMask & pcMask) != 0 ? RegisterAlias.Aarch32Pc : 0;
+                    rn = opMemMult.Rn;
+                    wBack = opMemMult.PostOffset != 0;
+                    isLoad = opMemMult.IsLoad;
                 }
                 else
                 {
@@ -388,4 +388,4 @@ namespace ARMeilleure.Decoders
             }
         }
     }
-}
\ No newline at end of file
+}
-- 
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