From 142cededd4db2ff4f83a4833580d343a4f0a8cde Mon Sep 17 00:00:00 2001
From: riperiperi <rhy3756547@hotmail.com>
Date: Tue, 31 Aug 2021 06:51:57 +0100
Subject: Implement Shader Instructions SUATOM and SURED (#2090)

* Initial Implementation

* Further improvements (no support for float/64-bit types)

* Merge atomic and reduce instructions, add missing format switch

* Fix rebase issues.

* Not used.

* Whoops. Fixed.

* Partial implementation of inc/dec, cleanup and TODOs

* Remove testing path

* Address Feedback
---
 Ryujinx.Graphics.Shader/Decoders/ReductionType.cs | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

(limited to 'Ryujinx.Graphics.Shader/Decoders/ReductionType.cs')

diff --git a/Ryujinx.Graphics.Shader/Decoders/ReductionType.cs b/Ryujinx.Graphics.Shader/Decoders/ReductionType.cs
index 4c8bd37e..90814c69 100644
--- a/Ryujinx.Graphics.Shader/Decoders/ReductionType.cs
+++ b/Ryujinx.Graphics.Shader/Decoders/ReductionType.cs
@@ -7,6 +7,8 @@ namespace Ryujinx.Graphics.Shader.Decoders
         U64         = 2,
         FP32FtzRn   = 3,
         FP16x2FtzRn = 4,
-        S64         = 5
+        S64         = 5,
+        SD32        = 6,
+        SD64        = 7
     }
 }
\ No newline at end of file
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