From 142cededd4db2ff4f83a4833580d343a4f0a8cde Mon Sep 17 00:00:00 2001
From: riperiperi <rhy3756547@hotmail.com>
Date: Tue, 31 Aug 2021 06:51:57 +0100
Subject: Implement Shader Instructions SUATOM and SURED (#2090)

* Initial Implementation

* Further improvements (no support for float/64-bit types)

* Merge atomic and reduce instructions, add missing format switch

* Fix rebase issues.

* Not used.

* Whoops. Fixed.

* Partial implementation of inc/dec, cleanup and TODOs

* Remove testing path

* Address Feedback
---
 Ryujinx.Graphics.Shader/Decoders/OpCodeSuatom.cs | 46 ++++++++++++++++++++++++
 1 file changed, 46 insertions(+)
 create mode 100644 Ryujinx.Graphics.Shader/Decoders/OpCodeSuatom.cs

(limited to 'Ryujinx.Graphics.Shader/Decoders/OpCodeSuatom.cs')

diff --git a/Ryujinx.Graphics.Shader/Decoders/OpCodeSuatom.cs b/Ryujinx.Graphics.Shader/Decoders/OpCodeSuatom.cs
new file mode 100644
index 00000000..7c807b36
--- /dev/null
+++ b/Ryujinx.Graphics.Shader/Decoders/OpCodeSuatom.cs
@@ -0,0 +1,46 @@
+using Ryujinx.Graphics.Shader.Instructions;
+
+namespace Ryujinx.Graphics.Shader.Decoders
+{
+    class OpCodeSuatom : OpCodeTextureBase
+    {
+        public Register Rd { get; }
+        public Register Ra { get; }
+        public Register Rb { get; }
+        public Register Rc { get; }
+
+        public ReductionType Type { get; }
+        public AtomicOp AtomicOp { get; }
+        public ImageDimensions Dimensions { get; }
+        public ClampMode ClampMode { get; }
+
+        public bool ByteAddress { get; }
+        public bool UseType { get; }
+        public bool IsBindless { get; }
+
+        public bool CompareAndSwap { get; }
+
+        public new static OpCode Create(InstEmitter emitter, ulong address, long opCode) => new OpCodeSuatom(emitter, address, opCode);
+
+        public OpCodeSuatom(InstEmitter emitter, ulong address, long opCode) : base(emitter, address, opCode)
+        {
+            Rd = new Register(opCode.Extract(0,  8), RegisterType.Gpr);
+            Ra = new Register(opCode.Extract(8,  8), RegisterType.Gpr);
+            Rb = new Register(opCode.Extract(20, 8), RegisterType.Gpr);
+            Rc = new Register(opCode.Extract(39, 8), RegisterType.Gpr);
+
+            bool supportsBindless = opCode.Extract(54);
+
+            Type = (ReductionType)opCode.Extract(supportsBindless ? 36 : 51, 3);
+            ByteAddress = opCode.Extract(28);
+            AtomicOp = (AtomicOp)opCode.Extract(29, 4); // Only useful if CAS is not true.
+            Dimensions = (ImageDimensions)opCode.Extract(33, 3);
+            ClampMode = (ClampMode)opCode.Extract(49, 2);
+
+            IsBindless = supportsBindless && !opCode.Extract(51);
+            UseType = !supportsBindless || opCode.Extract(52);
+
+            CompareAndSwap = opCode.Extract(55);
+        }
+    }
+}
-- 
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