From 1876b346fea647e8284a66bb6d62c38801035cff Mon Sep 17 00:00:00 2001
From: gdk <gab.dark.100@gmail.com>
Date: Sun, 13 Oct 2019 03:02:07 -0300
Subject: Initial work

---
 Ryujinx.Graphics.Shader/Decoders/OpCode.cs | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)
 create mode 100644 Ryujinx.Graphics.Shader/Decoders/OpCode.cs

(limited to 'Ryujinx.Graphics.Shader/Decoders/OpCode.cs')

diff --git a/Ryujinx.Graphics.Shader/Decoders/OpCode.cs b/Ryujinx.Graphics.Shader/Decoders/OpCode.cs
new file mode 100644
index 00000000..94af49e0
--- /dev/null
+++ b/Ryujinx.Graphics.Shader/Decoders/OpCode.cs
@@ -0,0 +1,30 @@
+using Ryujinx.Graphics.Shader.Instructions;
+
+namespace Ryujinx.Graphics.Shader.Decoders
+{
+    class OpCode
+    {
+        public InstEmitter Emitter { get; }
+
+        public ulong Address   { get; }
+        public long  RawOpCode { get; }
+
+        public Register Predicate { get; protected set; }
+
+        public bool InvertPredicate { get; protected set; }
+
+        // When inverted, the always true predicate == always false.
+        public bool NeverExecute => Predicate.Index == RegisterConsts.PredicateTrueIndex && InvertPredicate;
+
+        public OpCode(InstEmitter emitter, ulong address, long opCode)
+        {
+            Emitter   = emitter;
+            Address   = address;
+            RawOpCode = opCode;
+
+            Predicate = new Register(opCode.Extract(16, 3), RegisterType.Predicate);
+
+            InvertPredicate = opCode.Extract(19);
+        }
+    }
+}
\ No newline at end of file
-- 
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