From 3dfa4232f839ee9e1d6e00cf8dc4ba1f4b0943cf Mon Sep 17 00:00:00 2001
From: Thog <me@thog.eu>
Date: Sat, 25 Apr 2020 16:17:22 +0200
Subject: Fix building of previous commit

---
 Ryujinx.Graphics.Gpu/State/GpuState.cs | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'Ryujinx.Graphics.Gpu/State')

diff --git a/Ryujinx.Graphics.Gpu/State/GpuState.cs b/Ryujinx.Graphics.Gpu/State/GpuState.cs
index fb495eff..677fed66 100644
--- a/Ryujinx.Graphics.Gpu/State/GpuState.cs
+++ b/Ryujinx.Graphics.Gpu/State/GpuState.cs
@@ -132,7 +132,7 @@ namespace Ryujinx.Graphics.Gpu.State
         /// <summary>
         /// Initializes registers with the default state.
         /// </summary>
-        private static void InitializeDefaultState(int[] memory)
+        private void InitializeDefaultState(int[] memory)
         {
             // Enable Rasterizer
             memory[(int)MethodOffset.RasterizeEnable] = 1;
@@ -151,7 +151,7 @@ namespace Ryujinx.Graphics.Gpu.State
             memory[0x4e7] = 0xff;
 
             // Conditional rendering condition.
-            _backingMemory[0x556] = (int)Condition.Always;
+            memory[0x556] = (int)Condition.Always;
 
             // Default color mask.
             for (int index = 0; index < Constants.TotalRenderTargets; index++)
@@ -390,7 +390,7 @@ namespace Ryujinx.Graphics.Gpu.State
         public void Set<T>(MethodOffset offset, T data) where T : struct
         {
             ReadOnlySpan<int> intSpan = MemoryMarshal.Cast<T, int>(MemoryMarshal.CreateReadOnlySpan(ref data, 1));
-            intSpan.CopyTo(_backingMemory.AsSpan().Slice((int)offset, intSpan.Length));
+            intSpan.CopyTo(_memory.AsSpan().Slice((int)offset, intSpan.Length));
         }
     }
 }
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