From 8a7d99cdeae2355511d4eb43aefb76d0d886bcf8 Mon Sep 17 00:00:00 2001 From: gdkchan Date: Fri, 26 Apr 2019 01:55:12 -0300 Subject: Refactoring and optimization on CPU translation (#661) * Refactoring and optimization on CPU translation * Remove now unused property * Rename ilBlock -> block (local) * Change equality comparison on RegisterMask for consistency Co-Authored-By: gdkchan * Add back the aggressive inlining attribute to the Synchronize method * Implement IEquatable on the Register struct * Fix identation --- ChocolArm64/Instructions/InstEmitException.cs | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'ChocolArm64/Instructions/InstEmitException.cs') diff --git a/ChocolArm64/Instructions/InstEmitException.cs b/ChocolArm64/Instructions/InstEmitException.cs index 9444397a..7922c62b 100644 --- a/ChocolArm64/Instructions/InstEmitException.cs +++ b/ChocolArm64/Instructions/InstEmitException.cs @@ -1,4 +1,5 @@ using ChocolArm64.Decoders; +using ChocolArm64.IntermediateRepresentation; using ChocolArm64.State; using ChocolArm64.Translation; using System.Reflection.Emit; @@ -21,7 +22,7 @@ namespace ChocolArm64.Instructions { OpCodeException64 op = (OpCodeException64)context.CurrOp; - context.EmitStoreState(); + context.EmitStoreContext(); context.EmitLdarg(TranslatedSub.StateArgIdx); @@ -48,7 +49,7 @@ namespace ChocolArm64.Instructions if (context.CurrBlock.Next != null) { - context.EmitLoadState(); + context.EmitLoadContext(); } else { @@ -62,7 +63,7 @@ namespace ChocolArm64.Instructions { OpCode64 op = context.CurrOp; - context.EmitStoreState(); + context.EmitStoreContext(); context.EmitLdarg(TranslatedSub.StateArgIdx); @@ -73,7 +74,7 @@ namespace ChocolArm64.Instructions if (context.CurrBlock.Next != null) { - context.EmitLoadState(); + context.EmitLoadContext(); } else { -- cgit v1.2.3