From 8a7d99cdeae2355511d4eb43aefb76d0d886bcf8 Mon Sep 17 00:00:00 2001 From: gdkchan Date: Fri, 26 Apr 2019 01:55:12 -0300 Subject: Refactoring and optimization on CPU translation (#661) * Refactoring and optimization on CPU translation * Remove now unused property * Rename ilBlock -> block (local) * Change equality comparison on RegisterMask for consistency Co-Authored-By: gdkchan * Add back the aggressive inlining attribute to the Synchronize method * Implement IEquatable on the Register struct * Fix identation --- ChocolArm64/Instructions/InstEmit32Helper.cs | 29 ++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) (limited to 'ChocolArm64/Instructions/InstEmit32Helper.cs') diff --git a/ChocolArm64/Instructions/InstEmit32Helper.cs b/ChocolArm64/Instructions/InstEmit32Helper.cs index 792e96f5..49377981 100644 --- a/ChocolArm64/Instructions/InstEmit32Helper.cs +++ b/ChocolArm64/Instructions/InstEmit32Helper.cs @@ -1,4 +1,5 @@ using ChocolArm64.Decoders; +using ChocolArm64.IntermediateRepresentation; using ChocolArm64.State; using ChocolArm64.Translation; using System; @@ -31,7 +32,7 @@ namespace ChocolArm64.Instructions { if (register == RegisterAlias.Aarch32Pc) { - context.EmitStoreState(); + context.EmitStoreContext(); EmitBxWritePc(context); } @@ -112,13 +113,13 @@ namespace ChocolArm64.Instructions switch (mode) { case Aarch32Mode.User: - case Aarch32Mode.System: return RegisterAlias.SpUsr; - case Aarch32Mode.Fiq: return RegisterAlias.SpFiq; - case Aarch32Mode.Irq: return RegisterAlias.SpIrq; - case Aarch32Mode.Supervisor: return RegisterAlias.SpSvc; - case Aarch32Mode.Abort: return RegisterAlias.SpAbt; - case Aarch32Mode.Hypervisor: return RegisterAlias.SpHyp; - case Aarch32Mode.Undefined: return RegisterAlias.SpUnd; + case Aarch32Mode.System: return RegisterAlias.SpUsr; + case Aarch32Mode.Fiq: return RegisterAlias.SpFiq; + case Aarch32Mode.Irq: return RegisterAlias.SpIrq; + case Aarch32Mode.Supervisor: return RegisterAlias.SpSvc; + case Aarch32Mode.Abort: return RegisterAlias.SpAbt; + case Aarch32Mode.Hypervisor: return RegisterAlias.SpHyp; + case Aarch32Mode.Undefined: return RegisterAlias.SpUnd; default: throw new ArgumentException(nameof(mode)); } @@ -128,12 +129,12 @@ namespace ChocolArm64.Instructions { case Aarch32Mode.User: case Aarch32Mode.Hypervisor: - case Aarch32Mode.System: return RegisterAlias.LrUsr; - case Aarch32Mode.Fiq: return RegisterAlias.LrFiq; - case Aarch32Mode.Irq: return RegisterAlias.LrIrq; - case Aarch32Mode.Supervisor: return RegisterAlias.LrSvc; - case Aarch32Mode.Abort: return RegisterAlias.LrAbt; - case Aarch32Mode.Undefined: return RegisterAlias.LrUnd; + case Aarch32Mode.System: return RegisterAlias.LrUsr; + case Aarch32Mode.Fiq: return RegisterAlias.LrFiq; + case Aarch32Mode.Irq: return RegisterAlias.LrIrq; + case Aarch32Mode.Supervisor: return RegisterAlias.LrSvc; + case Aarch32Mode.Abort: return RegisterAlias.LrAbt; + case Aarch32Mode.Undefined: return RegisterAlias.LrUnd; default: throw new ArgumentException(nameof(mode)); } -- cgit v1.2.3