From f39a864050589ac7e757a9d72b46ac693125b382 Mon Sep 17 00:00:00 2001
From: gdkchan <gab.dark.100@gmail.com>
Date: Fri, 2 Mar 2018 19:21:54 -0300
Subject: Add EXT, CMTST (vector) and UMULL (vector) instructions

---
 ChocolArm64/Instruction/AInstEmitSimdMove.cs | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

(limited to 'ChocolArm64/Instruction/AInstEmitSimdMove.cs')

diff --git a/ChocolArm64/Instruction/AInstEmitSimdMove.cs b/ChocolArm64/Instruction/AInstEmitSimdMove.cs
index aabb8f34..a4e53370 100644
--- a/ChocolArm64/Instruction/AInstEmitSimdMove.cs
+++ b/ChocolArm64/Instruction/AInstEmitSimdMove.cs
@@ -57,6 +57,31 @@ namespace ChocolArm64.Instruction
             }
         }
 
+        public static void Ext_V(AILEmitterCtx Context)
+        {
+            AOpCodeSimdExt Op = (AOpCodeSimdExt)Context.CurrOp;
+
+            int Bytes = Context.CurrOp.GetBitsCount() >> 3;
+
+            for (int Index = 0; Index < Bytes; Index++)
+            {
+                int Position = Op.Imm4 + Index;
+
+                int Reg = Position < Bytes ? Op.Rn : Op.Rm;
+
+                Position &= Bytes - 1;
+
+                EmitVectorExtractZx(Context, Reg, Position, 0);
+
+                EmitVectorInsert(Context, Op.Rd, Index, 0);
+            }
+
+            if (Op.RegisterSize == ARegisterSize.SIMD64)
+            {
+                EmitVectorZeroUpper(Context, Op.Rd);
+            }
+        }
+
         public static void Fcsel_S(AILEmitterCtx Context)
         {
             AOpCodeSimdFcond Op = (AOpCodeSimdFcond)Context.CurrOp;
-- 
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