From f9f111bc85a4735391a8479e9a8d36a30ae7f3a9 Mon Sep 17 00:00:00 2001
From: gdkchan <gab.dark.100@gmail.com>
Date: Fri, 11 May 2018 20:10:27 -0300
Subject: Add intrinsics support (#121)

* Initial intrinsics support

* Update tests to work with the new Vector128 type and intrinsics

* Drop SSE4.1 requirement

* Fix copy-paste mistake
---
 ChocolArm64/Instruction/AInstEmitSimdCmp.cs | 82 +++++++++++++++++++++++++----
 1 file changed, 73 insertions(+), 9 deletions(-)

(limited to 'ChocolArm64/Instruction/AInstEmitSimdCmp.cs')

diff --git a/ChocolArm64/Instruction/AInstEmitSimdCmp.cs b/ChocolArm64/Instruction/AInstEmitSimdCmp.cs
index f155d7e8..583ad702 100644
--- a/ChocolArm64/Instruction/AInstEmitSimdCmp.cs
+++ b/ChocolArm64/Instruction/AInstEmitSimdCmp.cs
@@ -3,6 +3,7 @@ using ChocolArm64.State;
 using ChocolArm64.Translation;
 using System;
 using System.Reflection.Emit;
+using System.Runtime.Intrinsics.X86;
 
 using static ChocolArm64.Instruction.AInstEmitAluHelper;
 using static ChocolArm64.Instruction.AInstEmitSimdHelper;
@@ -13,17 +14,38 @@ namespace ChocolArm64.Instruction
     {
         public static void Cmeq_V(AILEmitterCtx Context)
         {
-            EmitVectorCmp(Context, OpCodes.Beq_S);
+            if (AOptimizations.UseSse2 && Context.CurrOp is AOpCodeSimdReg)
+            {
+                EmitSse2Call(Context, nameof(Sse2.CompareEqual));
+            }
+            else
+            {
+                EmitVectorCmp(Context, OpCodes.Beq_S);
+            }
         }
 
         public static void Cmge_V(AILEmitterCtx Context)
         {
-            EmitVectorCmp(Context, OpCodes.Bge_S);
+            if (AOptimizations.UseSse2 && Context.CurrOp is AOpCodeSimdReg)
+            {
+                EmitSse2Call(Context, nameof(Sse2.CompareGreaterThanOrEqual));
+            }
+            else
+            {
+                EmitVectorCmp(Context, OpCodes.Bge_S);
+            }
         }
 
         public static void Cmgt_V(AILEmitterCtx Context)
         {
-            EmitVectorCmp(Context, OpCodes.Bgt_S);
+            if (AOptimizations.UseSse2 && Context.CurrOp is AOpCodeSimdReg)
+            {
+                EmitSse2Call(Context, nameof(Sse2.CompareGreaterThan));
+            }
+            else
+            {
+                EmitVectorCmp(Context, OpCodes.Bgt_S);
+            }
         }
 
         public static void Cmhi_V(AILEmitterCtx Context)
@@ -112,32 +134,74 @@ namespace ChocolArm64.Instruction
 
         public static void Fcmeq_S(AILEmitterCtx Context)
         {
-            EmitScalarFcmp(Context, OpCodes.Beq_S);
+            if (AOptimizations.UseSse2 && Context.CurrOp is AOpCodeSimdReg)
+            {
+                EmitSse2CallF(Context, nameof(Sse2.CompareEqualScalar));
+            }
+            else
+            {
+                EmitScalarFcmp(Context, OpCodes.Beq_S);
+            }
         }
 
         public static void Fcmeq_V(AILEmitterCtx Context)
         {
-            EmitVectorFcmp(Context, OpCodes.Beq_S);
+            if (AOptimizations.UseSse2 && Context.CurrOp is AOpCodeSimdReg)
+            {
+                EmitSse2CallF(Context, nameof(Sse2.CompareEqual));
+            }
+            else
+            {
+                EmitVectorFcmp(Context, OpCodes.Beq_S);
+            }
         }
 
         public static void Fcmge_S(AILEmitterCtx Context)
         {
-            EmitScalarFcmp(Context, OpCodes.Bge_S);
+            if (AOptimizations.UseSse2 && Context.CurrOp is AOpCodeSimdReg)
+            {
+                EmitSse2CallF(Context, nameof(Sse2.CompareGreaterThanOrEqualScalar));
+            }
+            else
+            {
+                EmitScalarFcmp(Context, OpCodes.Bge_S);
+            }
         }
 
         public static void Fcmge_V(AILEmitterCtx Context)
         {
-            EmitVectorFcmp(Context, OpCodes.Bge_S);
+            if (AOptimizations.UseSse2 && Context.CurrOp is AOpCodeSimdReg)
+            {
+                EmitSse2CallF(Context, nameof(Sse2.CompareGreaterThanOrEqual));
+            }
+            else
+            {
+                EmitVectorFcmp(Context, OpCodes.Bge_S);
+            }
         }
 
         public static void Fcmgt_S(AILEmitterCtx Context)
         {
-            EmitScalarFcmp(Context, OpCodes.Bgt_S);
+            if (AOptimizations.UseSse2 && Context.CurrOp is AOpCodeSimdReg)
+            {
+                EmitSse2CallF(Context, nameof(Sse2.CompareGreaterThanScalar));
+            }
+            else
+            {
+                EmitScalarFcmp(Context, OpCodes.Bgt_S);
+            }
         }
 
         public static void Fcmgt_V(AILEmitterCtx Context)
         {
-            EmitVectorFcmp(Context, OpCodes.Bgt_S);
+            if (AOptimizations.UseSse2 && Context.CurrOp is AOpCodeSimdReg)
+            {
+                EmitSse2CallF(Context, nameof(Sse2.CompareGreaterThan));
+            }
+            else
+            {
+                EmitVectorFcmp(Context, OpCodes.Bgt_S);
+            }
         }
 
         public static void Fcmle_S(AILEmitterCtx Context)
-- 
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