From 729ff5337cab8d1fd4cc66d7792d410172f25f62 Mon Sep 17 00:00:00 2001 From: gdkchan Date: Tue, 13 Sep 2022 03:24:09 -0300 Subject: Fix increment on Arm32 NEON VLDn/VSTn instructions with regs > 1 (#3695) * Fix increment on Arm32 NEON VLDn/VSTn instructions with regs > 1 * PPTC version bump * PR feedback --- ARMeilleure/Decoders/OpCode32SimdMemPair.cs | 7 ++- ARMeilleure/Decoders/OpCodeTable.cs | 64 ++++++++++++++++-------- ARMeilleure/Instructions/InstEmitSimdMemory32.cs | 8 +-- ARMeilleure/Translation/PTC/Ptc.cs | 2 +- 4 files changed, 50 insertions(+), 31 deletions(-) (limited to 'ARMeilleure') diff --git a/ARMeilleure/Decoders/OpCode32SimdMemPair.cs b/ARMeilleure/Decoders/OpCode32SimdMemPair.cs index 4cee05e8..2da0dea3 100644 --- a/ARMeilleure/Decoders/OpCode32SimdMemPair.cs +++ b/ARMeilleure/Decoders/OpCode32SimdMemPair.cs @@ -1,11 +1,10 @@ using ARMeilleure.State; -using System; namespace ARMeilleure.Decoders { class OpCode32SimdMemPair : OpCode32, IOpCode32Simd { - private static int[] RegsMap = + private static int[] _regsMap = { 1, 1, 4, 2, 1, 1, 3, 1, @@ -40,9 +39,9 @@ namespace ARMeilleure.Decoders WBack = Rm != RegisterAlias.Aarch32Pc; RegisterIndex = Rm != RegisterAlias.Aarch32Pc && Rm != RegisterAlias.Aarch32Sp; - Regs = RegsMap[(opCode >> 8) & 0xf]; + Regs = _regsMap[(opCode >> 8) & 0xf]; - Increment = Math.Min(Regs, ((opCode >> 8) & 0x1) + 1); + Increment = ((opCode >> 8) & 0x1) + 1; } } } diff --git a/ARMeilleure/Decoders/OpCodeTable.cs b/ARMeilleure/Decoders/OpCodeTable.cs index c5f86712..b222a21f 100644 --- a/ARMeilleure/Decoders/OpCodeTable.cs +++ b/ARMeilleure/Decoders/OpCodeTable.cs @@ -888,18 +888,31 @@ namespace ARMeilleure.Decoders SetA32("111100100x00xxxxxxxx1100xxx1xxxx", InstName.Vfma, InstEmit32.Vfma_V, OpCode32SimdReg.Create); SetA32("111100100x10xxxxxxxx1100xxx1xxxx", InstName.Vfms, InstEmit32.Vfms_V, OpCode32SimdReg.Create); SetA32("1111001x0x<xxxx", InstName.Vld4, InstEmit32.Vld4, OpCode32SimdMemSingle.Create); + SetA32("111101000x10xxxxxxxx000x<>>xxxxxxx0000>xx1xxxx", InstName.Vshr, InstEmit32.Vshr, OpCode32SimdShImm.Create); SetA32("111100101x>>>xxxxxxx100000x1xxx0", InstName.Vshrn, InstEmit32.Vshrn, OpCode32SimdShImmNarrow.Create); SetA32("1111001x1x>>>xxxxxxx0001>xx1xxxx", InstName.Vsra, InstEmit32.Vsra, OpCode32SimdShImm.Create); - SetA32("111101001x00xxxxxxxx<<00xxxxxxxx", InstName.Vst1, InstEmit32.Vst1, OpCode32SimdMemSingle.Create); - SetA32("111101000x00xxxxxxxx0111xxxxxxxx", InstName.Vst1, InstEmit32.Vst1, OpCode32SimdMemPair.Create); // Regs = 1. - SetA32("111101000x00xxxxxxxx1010xxxxxxxx", InstName.Vst1, InstEmit32.Vst1, OpCode32SimdMemPair.Create); // Regs = 2. - SetA32("111101000x00xxxxxxxx0110xxxxxxxx", InstName.Vst1, InstEmit32.Vst1, OpCode32SimdMemPair.Create); // Regs = 3. + SetA32("111101001x00xxxxxxxx0000xxx0xxxx", InstName.Vst1, InstEmit32.Vst1, OpCode32SimdMemSingle.Create); + SetA32("111101001x00xxxxxxxx0100xx0xxxxx", InstName.Vst1, InstEmit32.Vst1, OpCode32SimdMemSingle.Create); + SetA32("111101001x00xxxxxxxx1000x000xxxx", InstName.Vst1, InstEmit32.Vst1, OpCode32SimdMemSingle.Create); + SetA32("111101001x00xxxxxxxx1000x011xxxx", InstName.Vst1, InstEmit32.Vst1, OpCode32SimdMemSingle.Create); + SetA32("111101000x00xxxxxxxx0111xx0xxxxx", InstName.Vst1, InstEmit32.Vst1, OpCode32SimdMemPair.Create); // Regs = 1. + SetA32("111101000x00xxxxxxxx1010xx< 1 ? op.Increment : 1; int eBytes = 1 << op.Size; Operand n = context.Copy(GetIntA32(context, op.Rn)); @@ -144,7 +145,7 @@ namespace ARMeilleure.Instructions int elemD = d + reg; for (int i = 0; i < count; i++) { - // Write an element from a double simd register + // Accesses an element from a double simd register, // add ebytes for each element. Operand address = context.Add(n, Const(offset)); int index = ((elemD & 1) << (3 - op.Size)) + elem; @@ -161,7 +162,6 @@ namespace ARMeilleure.Instructions } else { - if (load) { EmitLoadSimd(context, address, GetVecA32(elemD >> 1), elemD >> 1, index, op.Size); @@ -173,7 +173,7 @@ namespace ARMeilleure.Instructions } offset += eBytes; - elemD += op.Increment; + elemD += increment; } } } diff --git a/ARMeilleure/Translation/PTC/Ptc.cs b/ARMeilleure/Translation/PTC/Ptc.cs index 3a950354..71f69ef7 100644 --- a/ARMeilleure/Translation/PTC/Ptc.cs +++ b/ARMeilleure/Translation/PTC/Ptc.cs @@ -27,7 +27,7 @@ namespace ARMeilleure.Translation.PTC private const string OuterHeaderMagicString = "PTCohd\0\0"; private const string InnerHeaderMagicString = "PTCihd\0\0"; - private const uint InternalVersion = 3683; //! To be incremented manually for each change to the ARMeilleure project. + private const uint InternalVersion = 3695; //! To be incremented manually for each change to the ARMeilleure project. private const string ActualDir = "0"; private const string BackupDir = "1"; -- cgit v1.2.3