From 6a1a03566aa04d6e3e32547821aae0bc587d1128 Mon Sep 17 00:00:00 2001 From: merry Date: Thu, 21 Apr 2022 00:25:43 +0100 Subject: T32: Implement load/store single (immediate) (#3186) * T32: Implement load/store single (immediate) * tests * tidy formatting * address comments --- ARMeilleure/Decoders/OpCodeT32MemImm12.cs | 25 +++++++++++++++++++++++++ ARMeilleure/Decoders/OpCodeT32MemImm8.cs | 29 +++++++++++++++++++++++++++++ ARMeilleure/Decoders/OpCodeTable.cs | 26 ++++++++++++++++++++++++++ 3 files changed, 80 insertions(+) create mode 100644 ARMeilleure/Decoders/OpCodeT32MemImm12.cs create mode 100644 ARMeilleure/Decoders/OpCodeT32MemImm8.cs (limited to 'ARMeilleure') diff --git a/ARMeilleure/Decoders/OpCodeT32MemImm12.cs b/ARMeilleure/Decoders/OpCodeT32MemImm12.cs new file mode 100644 index 00000000..7838604b --- /dev/null +++ b/ARMeilleure/Decoders/OpCodeT32MemImm12.cs @@ -0,0 +1,25 @@ +namespace ARMeilleure.Decoders +{ + class OpCodeT32MemImm12 : OpCodeT32, IOpCode32Mem + { + public int Rt { get; } + public int Rn { get; } + public bool WBack => false; + public bool IsLoad { get; } + public bool Index => true; + public bool Add => true; + public int Immediate { get; } + + public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32MemImm12(inst, address, opCode); + + public OpCodeT32MemImm12(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode) + { + Rt = (opCode >> 12) & 0xf; + Rn = (opCode >> 16) & 0xf; + + Immediate = opCode & 0xfff; + + IsLoad = ((opCode >> 20) & 1) != 0; + } + } +} \ No newline at end of file diff --git a/ARMeilleure/Decoders/OpCodeT32MemImm8.cs b/ARMeilleure/Decoders/OpCodeT32MemImm8.cs new file mode 100644 index 00000000..d8b7763c --- /dev/null +++ b/ARMeilleure/Decoders/OpCodeT32MemImm8.cs @@ -0,0 +1,29 @@ +namespace ARMeilleure.Decoders +{ + class OpCodeT32MemImm8 : OpCodeT32, IOpCode32Mem + { + public int Rt { get; } + public int Rn { get; } + public bool WBack { get; } + public bool IsLoad { get; } + public bool Index { get; } + public bool Add { get; } + public int Immediate { get; } + + public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32MemImm8(inst, address, opCode); + + public OpCodeT32MemImm8(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode) + { + Rt = (opCode >> 12) & 0xf; + Rn = (opCode >> 16) & 0xf; + + Index = ((opCode >> 10) & 1) != 0; + Add = ((opCode >> 9) & 1) != 0; + WBack = ((opCode >> 8) & 1) != 0; + + Immediate = opCode & 0xff; + + IsLoad = ((opCode >> 20) & 1) != 0; + } + } +} \ No newline at end of file diff --git a/ARMeilleure/Decoders/OpCodeTable.cs b/ARMeilleure/Decoders/OpCodeTable.cs index 28650256..197645cd 100644 --- a/ARMeilleure/Decoders/OpCodeTable.cs +++ b/ARMeilleure/Decoders/OpCodeTable.cs @@ -1065,6 +1065,26 @@ namespace ARMeilleure.Decoders SetT32("11110x011011xxxx0xxx1111xxxxxxxx", InstName.Cmp, InstEmit32.Cmp, OpCodeT32AluImm.Create); SetT32("11101010100xxxxxxxx", InstName.Str, InstEmit32.Str, OpCodeT32MemImm8.Create); + SetT32("111110001100xxxxxxxxxxxxxxxxxxxx", InstName.Str, InstEmit32.Str, OpCodeT32MemImm12.Create); + SetT32("111110000000xxxxxxxx1<<>xxxxxxxx", InstName.Strb, InstEmit32.Strb, OpCodeT32MemImm8.Create); + SetT32("111110001000xxxxxxxxxxxxxxxxxxxx", InstName.Strb, InstEmit32.Strb, OpCodeT32MemImm12.Create); + SetT32("111110000010xxxxxxxx1<<>xxxxxxxx", InstName.Strh, InstEmit32.Strh, OpCodeT32MemImm8.Create); + SetT32("111110001010xxxxxxxxxxxxxxxxxxxx", InstName.Strh, InstEmit32.Strh, OpCodeT32MemImm12.Create); SetT32("11101011101