From f5235fff29e797ed76022bbd51e4e64577c83457 Mon Sep 17 00:00:00 2001
From: merry <git@mary.rs>
Date: Thu, 25 Aug 2022 11:12:13 +0100
Subject: ARMeilleure: Hardware accelerate SHA256 (#3585)

* ARMeilleure/HardwareCapabilities: Add Sha

* ARMeilleure/Intrinsic: Add X86Sha256Rnds2

* ARmeilleure: Hardware accelerate SHA256H/SHA256H2

* ARMeilleure/Intrinsic: Add X86Sha256Msg1, X86Sha256Msg2

* ARMeilleure/Intrinsic: Add X86Palignr

* ARMeilleure: Hardware accelerate SHA256SU0, SHA256SU1

* PTC: Bump InternalVersion
---
 ARMeilleure/IntermediateRepresentation/Intrinsic.cs | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'ARMeilleure/IntermediateRepresentation')

diff --git a/ARMeilleure/IntermediateRepresentation/Intrinsic.cs b/ARMeilleure/IntermediateRepresentation/Intrinsic.cs
index f5c5f3d7..71bfc3be 100644
--- a/ARMeilleure/IntermediateRepresentation/Intrinsic.cs
+++ b/ARMeilleure/IntermediateRepresentation/Intrinsic.cs
@@ -71,6 +71,7 @@ namespace ARMeilleure.IntermediateRepresentation
         X86Paddd,
         X86Paddq,
         X86Paddw,
+        X86Palignr,
         X86Pand,
         X86Pandn,
         X86Pavgb,
@@ -140,6 +141,9 @@ namespace ARMeilleure.IntermediateRepresentation
         X86Roundss,
         X86Rsqrtps,
         X86Rsqrtss,
+        X86Sha256Msg1,
+        X86Sha256Msg2,
+        X86Sha256Rnds2,
         X86Shufpd,
         X86Shufps,
         X86Sqrtpd,
-- 
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