From e5f7ff1eee81ebc852b8bc703d5f4847eb430560 Mon Sep 17 00:00:00 2001 From: sharmander Date: Tue, 4 Jan 2022 14:45:28 -0500 Subject: CPU - Implement FCVTMS (Vector) (#2937) * Add FCVTMS_V Implementation to Armeilleure * Fix opcode designation * Add tests * Amend Ptc version * Fix OpCode / Tests * Create Math.Floor helper method + Update implementation * Address gdk comments * Re-address gdk comments * Update ARMeilleure/Decoders/OpCodeTable.cs Co-authored-by: gdkchan * Update Tests to use 2S (4S) and 2D Co-authored-by: gdkchan --- ARMeilleure/Instructions/InstEmitSimdCvt.cs | 12 ++++++++++++ ARMeilleure/Instructions/InstName.cs | 1 + 2 files changed, 13 insertions(+) (limited to 'ARMeilleure/Instructions') diff --git a/ARMeilleure/Instructions/InstEmitSimdCvt.cs b/ARMeilleure/Instructions/InstEmitSimdCvt.cs index a5b472ec..e6400e06 100644 --- a/ARMeilleure/Instructions/InstEmitSimdCvt.cs +++ b/ARMeilleure/Instructions/InstEmitSimdCvt.cs @@ -217,6 +217,18 @@ namespace ARMeilleure.Instructions } } + public static void Fcvtms_V(ArmEmitterContext context) + { + if (Optimizations.UseSse41) + { + EmitSse41FcvtsOpF(context, FPRoundingMode.TowardsMinusInfinity, scalar: false); + } + else + { + EmitFcvt(context, (op1) => EmitUnaryMathCall(context, nameof(Math.Floor), op1), signed: true, scalar: false); + } + } + public static void Fcvtmu_Gp(ArmEmitterContext context) { if (Optimizations.UseSse41) diff --git a/ARMeilleure/Instructions/InstName.cs b/ARMeilleure/Instructions/InstName.cs index a9c443f1..081a1ef5 100644 --- a/ARMeilleure/Instructions/InstName.cs +++ b/ARMeilleure/Instructions/InstName.cs @@ -188,6 +188,7 @@ namespace ARMeilleure.Instructions Fcvtau_V, Fcvtl_V, Fcvtms_Gp, + Fcvtms_V, Fcvtmu_Gp, Fcvtn_V, Fcvtns_S, -- cgit v1.2.3