From ab9d4b862d6ef5bc67cbb1afe0e1f55f24c028fa Mon Sep 17 00:00:00 2001
From: gdkchan <gab.dark.100@gmail.com>
Date: Wed, 23 Jun 2021 18:21:23 -0300
Subject: Implement VORN (register) Arm32 instruction (#2396)

---
 ARMeilleure/Instructions/InstEmitSimdLogical32.cs | 18 ++++++++++++++++++
 ARMeilleure/Instructions/InstName.cs              |  1 +
 2 files changed, 19 insertions(+)

(limited to 'ARMeilleure/Instructions')

diff --git a/ARMeilleure/Instructions/InstEmitSimdLogical32.cs b/ARMeilleure/Instructions/InstEmitSimdLogical32.cs
index 2d6bf481..48bf18bc 100644
--- a/ARMeilleure/Instructions/InstEmitSimdLogical32.cs
+++ b/ARMeilleure/Instructions/InstEmitSimdLogical32.cs
@@ -115,6 +115,24 @@ namespace ARMeilleure.Instructions
             }
         }
 
+        public static void Vorn_I(ArmEmitterContext context)
+        {
+            if (Optimizations.UseSse2)
+            {
+                Operand mask = context.VectorOne();
+
+                EmitVectorBinaryOpSimd32(context, (n, m) =>
+                {
+                    m = context.AddIntrinsic(Intrinsic.X86Pandn, m, mask);
+                    return context.AddIntrinsic(Intrinsic.X86Por, n, m);
+                });
+            }
+            else
+            {
+                EmitVectorBinaryOpZx32(context, (op1, op2) => context.BitwiseOr(op1, context.BitwiseNot(op2)));
+            }
+        }
+
         public static void Vorr_I(ArmEmitterContext context)
         {
             if (Optimizations.UseSse2)
diff --git a/ARMeilleure/Instructions/InstName.cs b/ARMeilleure/Instructions/InstName.cs
index fe7644a9..9b4e8961 100644
--- a/ARMeilleure/Instructions/InstName.cs
+++ b/ARMeilleure/Instructions/InstName.cs
@@ -605,6 +605,7 @@ namespace ARMeilleure.Instructions
         Vnmul,
         Vnmla,
         Vnmls,
+        Vorn,
         Vorr,
         Vpadd,
         Vpmax,
-- 
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