From 83d94b21d077e2d31faee74711ff38e0c0499afa Mon Sep 17 00:00:00 2001
From: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>
Date: Wed, 27 May 2020 18:51:59 +0200
Subject: Add FMaxNmV & FMinNmV Inst.s with Test. (#1279)

Successful unit testing on Windows (debug and release mode).
---
 ARMeilleure/Instructions/InstEmitSimdHelper.cs | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

(limited to 'ARMeilleure/Instructions/InstEmitSimdHelper.cs')

diff --git a/ARMeilleure/Instructions/InstEmitSimdHelper.cs b/ARMeilleure/Instructions/InstEmitSimdHelper.cs
index 5918bac3..bf8d54c1 100644
--- a/ARMeilleure/Instructions/InstEmitSimdHelper.cs
+++ b/ARMeilleure/Instructions/InstEmitSimdHelper.cs
@@ -1103,6 +1103,26 @@ namespace ARMeilleure.Instructions
             context.Copy(GetVec(op.Rd), d);
         }
 
+        public static void EmitVectorAcrossVectorOpF(ArmEmitterContext context, Func2I emit)
+        {
+            OpCodeSimd op = (OpCodeSimd)context.CurrOp;
+
+            Debug.Assert((op.Size & 1) == 0 && op.RegisterSize == RegisterSize.Simd128);
+
+            Operand res = context.VectorExtract(OperandType.FP32, GetVec(op.Rn), 0);
+
+            for (int index = 1; index < 4; index++)
+            {
+                Operand n = context.VectorExtract(OperandType.FP32, GetVec(op.Rn), index);
+
+                res = emit(res, n);
+            }
+
+            Operand d = context.VectorInsert(context.VectorZero(), res, 0);
+
+            context.Copy(GetVec(op.Rd), d);
+        }
+
         public static void EmitVectorPairwiseOpF(ArmEmitterContext context, Func2I emit)
         {
             OpCodeSimdReg op = (OpCodeSimdReg)context.CurrOp;
-- 
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