From 567ea726e173040ae931a37bc85fd6cd92b69363 Mon Sep 17 00:00:00 2001 From: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com> Date: Mon, 7 Dec 2020 10:37:07 +0100 Subject: Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630) * Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). * Ptc.InternalVersion = 1630 * Nits. * Address comments. * Update Ptc.cs * Address comment. --- ARMeilleure/Instructions/InstEmitSimdHelper.cs | 33 ++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'ARMeilleure/Instructions/InstEmitSimdHelper.cs') diff --git a/ARMeilleure/Instructions/InstEmitSimdHelper.cs b/ARMeilleure/Instructions/InstEmitSimdHelper.cs index 69e79a6d..eab891ec 100644 --- a/ARMeilleure/Instructions/InstEmitSimdHelper.cs +++ b/ARMeilleure/Instructions/InstEmitSimdHelper.cs @@ -1189,6 +1189,39 @@ namespace ARMeilleure.Instructions } } + [Flags] + public enum Mxcsr + { + Ftz = 1 << 15, // Flush To Zero. + Um = 1 << 11, // Underflow Mask. + Dm = 1 << 8, // Denormal Mask. + Daz = 1 << 6 // Denormals Are Zero. + } + + public static void EmitSseOrAvxEnterFtzAndDazModesOpF(ArmEmitterContext context, out Operand isTrue) + { + isTrue = context.Call(typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetFpcrFz))); + + Operand lblTrue = Label(); + context.BranchIfFalse(lblTrue, isTrue); + + context.AddIntrinsicNoRet(Intrinsic.X86Mxcsrmb, Const((int)(Mxcsr.Ftz | Mxcsr.Um | Mxcsr.Dm | Mxcsr.Daz))); + + context.MarkLabel(lblTrue); + } + + public static void EmitSseOrAvxExitFtzAndDazModesOpF(ArmEmitterContext context, Operand isTrue = null) + { + isTrue ??= context.Call(typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetFpcrFz))); + + Operand lblTrue = Label(); + context.BranchIfFalse(lblTrue, isTrue); + + context.AddIntrinsicNoRet(Intrinsic.X86Mxcsrub, Const((int)(Mxcsr.Ftz | Mxcsr.Daz))); + + context.MarkLabel(lblTrue); + } + public enum CmpCondition { // Legacy Sse. -- cgit v1.2.3