From a804db6eed016a8a1f152c2837fc7b65e50f02df Mon Sep 17 00:00:00 2001
From: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>
Date: Mon, 13 Jul 2020 13:08:47 +0200
Subject: =?UTF-8?q?Add=20Fmax/minv=5FV=20&=20S/Ushl=5FS=20Inst.s=20with=20?=
 =?UTF-8?q?Tests.=20Fix=20Maxps/d=20&=20Minps/d=20d=E2=80=A6=20(#1335)?=
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* Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d double zero sign handling. Allows better handling of NaNs.

* Optimized EmitSse2VectorIsNaNOpF() for multiple uses per opF.
---
 ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs')

diff --git a/ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs b/ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs
index 82f57d63..eb86ac9e 100644
--- a/ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs
+++ b/ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs
@@ -1200,8 +1200,8 @@ namespace ARMeilleure.Instructions
                 Operand nNum = context.Copy(n);
                 Operand mNum = context.Copy(m);
 
-                Operand nQNaNMask = InstEmit.EmitSse2VectorIsQNaNOpF(context, nNum);
-                Operand mQNaNMask = InstEmit.EmitSse2VectorIsQNaNOpF(context, mNum);
+                InstEmit.EmitSse2VectorIsNaNOpF(context, nNum, out Operand nQNaNMask, out _, isQNaN: true);
+                InstEmit.EmitSse2VectorIsNaNOpF(context, mNum, out Operand mQNaNMask, out _, isQNaN: true);
 
                 int sizeF = op.Size & 1;
 
-- 
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