From 36f6bbf5b9082193abb33b26e654ce973ed0ee83 Mon Sep 17 00:00:00 2001
From: sharmander <saldabain.dev@gmail.com>
Date: Mon, 7 Dec 2020 19:04:01 -0500
Subject: CPU: Implement VFNMA.F32 | F.64 (#1783)

* Implement VFNMA.F<32/64>

* Update PTC Version

* Update Implementation & Renames & Correct Order

* Fix alignment

* Update implementation to not trigger assert

* Actually use the intrinsic that makes sense :)
---
 ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

(limited to 'ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs')

diff --git a/ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs b/ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs
index 00e32b9f..d72df97c 100644
--- a/ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs
+++ b/ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs
@@ -284,6 +284,21 @@ namespace ARMeilleure.Instructions
             }
         }
 
+        public static void Vfnma_S(ArmEmitterContext context) // Fused.
+        {
+            if (Optimizations.FastFP && Optimizations.UseFma)
+            {
+                EmitScalarTernaryOpF32(context, Intrinsic.X86Vfnmsub231ss, Intrinsic.X86Vfnmsub231sd);
+            }
+            else
+            {
+                EmitScalarTernaryOpF32(context, (op1, op2, op3) =>
+                {
+                    return EmitSoftFloatCall(context, nameof(SoftFloat32.FPMulAdd), context.Negate(op1), context.Negate(op2), op3);
+                });
+            }
+        }
+
         public static void Vfnms_S(ArmEmitterContext context) // Fused.
         {
             if (Optimizations.FastFP && Optimizations.UseFma)
-- 
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