From c64524a240671cb3f8609e3454576e69e5948a60 Mon Sep 17 00:00:00 2001 From: gdkchan Date: Fri, 9 Sep 2022 22:09:11 -0300 Subject: Add ADD (zx imm12), NOP, MOV (rs), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions (#3683) * Add ADD (zx imm12), NOP, MOV (register shifted), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions, fix LDRD, STRD, CBZ, CBNZ and BLX (reg) * Bump PPTC version --- ARMeilleure/Instructions/InstEmitMemory32.cs | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'ARMeilleure/Instructions/InstEmitMemory32.cs') diff --git a/ARMeilleure/Instructions/InstEmitMemory32.cs b/ARMeilleure/Instructions/InstEmitMemory32.cs index e15f6a5b..17ec97aa 100644 --- a/ARMeilleure/Instructions/InstEmitMemory32.cs +++ b/ARMeilleure/Instructions/InstEmitMemory32.cs @@ -204,15 +204,15 @@ namespace ARMeilleure.Instructions context.BranchIfTrue(lblBigEndian, GetFlag(PState.EFlag)); - Load(op.Rt, 0, WordSizeLog2); - Load(op.Rt | 1, 4, WordSizeLog2); + Load(op.Rt, 0, WordSizeLog2); + Load(op.Rt2, 4, WordSizeLog2); context.Branch(lblEnd); context.MarkLabel(lblBigEndian); - Load(op.Rt | 1, 0, WordSizeLog2); - Load(op.Rt, 4, WordSizeLog2); + Load(op.Rt2, 0, WordSizeLog2); + Load(op.Rt, 4, WordSizeLog2); context.MarkLabel(lblEnd); } @@ -237,15 +237,15 @@ namespace ARMeilleure.Instructions context.BranchIfTrue(lblBigEndian, GetFlag(PState.EFlag)); - Store(op.Rt, 0, WordSizeLog2); - Store(op.Rt | 1, 4, WordSizeLog2); + Store(op.Rt, 0, WordSizeLog2); + Store(op.Rt2, 4, WordSizeLog2); context.Branch(lblEnd); context.MarkLabel(lblBigEndian); - Store(op.Rt | 1, 0, WordSizeLog2); - Store(op.Rt, 4, WordSizeLog2); + Store(op.Rt2, 0, WordSizeLog2); + Store(op.Rt, 4, WordSizeLog2); context.MarkLabel(lblEnd); } -- cgit v1.2.3