From 7b35ebc64a411e95e197bb36ad4b55c522c3703d Mon Sep 17 00:00:00 2001 From: merry Date: Tue, 22 Feb 2022 22:11:28 +0000 Subject: T32: Implement ALU (shifted register) instructions (#3135) * T32: Implement ADC, ADD, AND, BIC, CMN, CMP, EOR, MOV, MVN, ORN, ORR, RSB, SBC, SUB, TEQ, TST (shifted register) * OpCodeTable: Sort T32 list * Tests: Rename RandomTestCase to PrecomputedThumbTestCase * T32: Tests for AluRsImm instructions * fix nit * fix nit 2 --- ARMeilleure/Decoders/OpCodeTable.cs | 31 +++++++++++++++++++++++++++---- 1 file changed, 27 insertions(+), 4 deletions(-) (limited to 'ARMeilleure/Decoders/OpCodeTable.cs') diff --git a/ARMeilleure/Decoders/OpCodeTable.cs b/ARMeilleure/Decoders/OpCodeTable.cs index 1ea8885b..d290e554 100644 --- a/ARMeilleure/Decoders/OpCodeTable.cs +++ b/ARMeilleure/Decoders/OpCodeTable.cs @@ -1,6 +1,7 @@ using ARMeilleure.Instructions; using System; using System.Collections.Generic; +using System.Numerics; namespace ARMeilleure.Decoders { @@ -972,8 +973,7 @@ namespace ARMeilleure.Decoders SetA32("111100111x11<<10xxxx00011xx0xxxx", InstName.Vzip, InstEmit32.Vzip, OpCode32SimdCmpZ.Create); #endregion -#region "OpCode Table (AArch32, T16/T32)" - // T16 +#region "OpCode Table (AArch32, T16)" SetT16("000< makeOp(inst, address, (int)BitOperations.RotateRight((uint)opCode, 16)); + Set(reversedEncoding, AllInstT32, new InstDescriptor(name, emitter), reversedMakeOp); } private static void SetA64(string encoding, InstName name, InstEmitter emitter, MakeOp makeOp) -- cgit v1.2.3