From cee712105850ac3385cd0091a923438167433f9f Mon Sep 17 00:00:00 2001 From: TSR Berry <20988865+TSRBerry@users.noreply.github.com> Date: Sat, 8 Apr 2023 01:22:00 +0200 Subject: Move solution and projects to src --- ARMeilleure/Decoders/OpCodeSimdMemMs.cs | 48 --------------------------------- 1 file changed, 48 deletions(-) delete mode 100644 ARMeilleure/Decoders/OpCodeSimdMemMs.cs (limited to 'ARMeilleure/Decoders/OpCodeSimdMemMs.cs') diff --git a/ARMeilleure/Decoders/OpCodeSimdMemMs.cs b/ARMeilleure/Decoders/OpCodeSimdMemMs.cs deleted file mode 100644 index 8922c18f..00000000 --- a/ARMeilleure/Decoders/OpCodeSimdMemMs.cs +++ /dev/null @@ -1,48 +0,0 @@ -namespace ARMeilleure.Decoders -{ - class OpCodeSimdMemMs : OpCodeMemReg, IOpCodeSimd - { - public int Reps { get; } - public int SElems { get; } - public int Elems { get; } - public bool WBack { get; } - - public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeSimdMemMs(inst, address, opCode); - - public OpCodeSimdMemMs(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode) - { - switch ((opCode >> 12) & 0xf) - { - case 0b0000: Reps = 1; SElems = 4; break; - case 0b0010: Reps = 4; SElems = 1; break; - case 0b0100: Reps = 1; SElems = 3; break; - case 0b0110: Reps = 3; SElems = 1; break; - case 0b0111: Reps = 1; SElems = 1; break; - case 0b1000: Reps = 1; SElems = 2; break; - case 0b1010: Reps = 2; SElems = 1; break; - - default: Instruction = InstDescriptor.Undefined; return; - } - - Size = (opCode >> 10) & 3; - WBack = ((opCode >> 23) & 1) != 0; - - bool q = ((opCode >> 30) & 1) != 0; - - if (!q && Size == 3 && SElems != 1) - { - Instruction = InstDescriptor.Undefined; - - return; - } - - Extend64 = false; - - RegisterSize = q - ? RegisterSize.Simd128 - : RegisterSize.Simd64; - - Elems = (GetBitsCount() >> 3) >> Size; - } - } -} \ No newline at end of file -- cgit v1.2.3