From e05bf90af600f5c75a13a0b4113b7fc6a641ff6a Mon Sep 17 00:00:00 2001 From: merry Date: Tue, 13 Sep 2022 22:25:37 +0100 Subject: T32: Implement Asimd instructions (#3692) --- ARMeilleure/Decoders/OpCode32SimdSqrte.cs | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'ARMeilleure/Decoders/OpCode32SimdSqrte.cs') diff --git a/ARMeilleure/Decoders/OpCode32SimdSqrte.cs b/ARMeilleure/Decoders/OpCode32SimdSqrte.cs index 74cb4cb6..5b715535 100644 --- a/ARMeilleure/Decoders/OpCode32SimdSqrte.cs +++ b/ARMeilleure/Decoders/OpCode32SimdSqrte.cs @@ -2,9 +2,10 @@ { class OpCode32SimdSqrte : OpCode32Simd { - public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdSqrte(inst, address, opCode); + public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdSqrte(inst, address, opCode, false); + public new static OpCode CreateT32(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdSqrte(inst, address, opCode, true); - public OpCode32SimdSqrte(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode) + public OpCode32SimdSqrte(InstDescriptor inst, ulong address, int opCode, bool isThumb) : base(inst, address, opCode, isThumb) { Size = (opCode >> 18) & 0x1; F = ((opCode >> 8) & 0x1) != 0; -- cgit v1.2.3