From c26f3774bdbf3982149a3ea4c0f7abb4de869db7 Mon Sep 17 00:00:00 2001 From: gdkchan Date: Tue, 10 Mar 2020 21:49:27 -0300 Subject: Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other fixes (#977) * Implement VMULL, VMLSL, VQRSHRN, VQRSHRUN AArch32 instructions plus other fixes * Re-align opcode table * Re-enable undefined, use subclasses to fix checks * Add test and fix VRSHR instruction * PR feedback --- ARMeilleure/Decoders/OpCode32SimdShImm.cs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ARMeilleure/Decoders/OpCode32SimdShImm.cs') diff --git a/ARMeilleure/Decoders/OpCode32SimdShImm.cs b/ARMeilleure/Decoders/OpCode32SimdShImm.cs index b19a601f..53da6bfb 100644 --- a/ARMeilleure/Decoders/OpCode32SimdShImm.cs +++ b/ARMeilleure/Decoders/OpCode32SimdShImm.cs @@ -35,7 +35,7 @@ Instruction = InstDescriptor.Undefined; } - if (DecoderHelper.VectorArgumentsInvalid(Q, Vd, Vm)) + if (GetType() == typeof(OpCode32SimdShImm) && DecoderHelper.VectorArgumentsInvalid(Q, Vd, Vm)) { Instruction = InstDescriptor.Undefined; } -- cgit v1.2.3