From 04e330cc004add7550eef8361cd490fac99255e2 Mon Sep 17 00:00:00 2001
From: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>
Date: Tue, 13 Oct 2020 22:41:33 +0200
Subject: Add Umaal & Vabd_I, Vabdl_I, Vaddl_I, Vhadd, Vqshrn, Vshll inst.s
 (slow paths). (#1577)

* Add Umaal & Vabd_I, Vabdl_I, Vaddl_I, Vhadd, Vqshrn, Vshll inst.s (slow paths).

No test provided (i.e. draft).

* Ptc InternalVersion = 1577
---
 ARMeilleure/Decoders/OpCode32SimdRegWide.cs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'ARMeilleure/Decoders/OpCode32SimdRegWide.cs')

diff --git a/ARMeilleure/Decoders/OpCode32SimdRegWide.cs b/ARMeilleure/Decoders/OpCode32SimdRegWide.cs
index 55384b2b..93ef6949 100644
--- a/ARMeilleure/Decoders/OpCode32SimdRegWide.cs
+++ b/ARMeilleure/Decoders/OpCode32SimdRegWide.cs
@@ -1,6 +1,6 @@
 namespace ARMeilleure.Decoders
 {
-    sealed class OpCode32SimdRegWide : OpCode32SimdReg
+    class OpCode32SimdRegWide : OpCode32SimdReg
     {
         public OpCode32SimdRegWide(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
         {
-- 
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