From e05bf90af600f5c75a13a0b4113b7fc6a641ff6a Mon Sep 17 00:00:00 2001 From: merry Date: Tue, 13 Sep 2022 22:25:37 +0100 Subject: T32: Implement Asimd instructions (#3692) --- ARMeilleure/Decoders/OpCode32SimdMemSingle.cs | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'ARMeilleure/Decoders/OpCode32SimdMemSingle.cs') diff --git a/ARMeilleure/Decoders/OpCode32SimdMemSingle.cs b/ARMeilleure/Decoders/OpCode32SimdMemSingle.cs index e90c2227..35dd41c2 100644 --- a/ARMeilleure/Decoders/OpCode32SimdMemSingle.cs +++ b/ARMeilleure/Decoders/OpCode32SimdMemSingle.cs @@ -15,10 +15,13 @@ namespace ARMeilleure.Decoders public bool Replicate { get; } public int Increment { get; } - public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdMemSingle(inst, address, opCode); + public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdMemSingle(inst, address, opCode, false); + public static OpCode CreateT32(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdMemSingle(inst, address, opCode, true); - public OpCode32SimdMemSingle(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode) + public OpCode32SimdMemSingle(InstDescriptor inst, ulong address, int opCode, bool isThumb) : base(inst, address, opCode) { + IsThumb = isThumb; + Vd = (opCode >> 12) & 0xf; Vd |= (opCode >> 18) & 0x10; -- cgit v1.2.3