From e05bf90af600f5c75a13a0b4113b7fc6a641ff6a Mon Sep 17 00:00:00 2001 From: merry Date: Tue, 13 Sep 2022 22:25:37 +0100 Subject: T32: Implement Asimd instructions (#3692) --- ARMeilleure/Decoders/OpCode32SimdLong.cs | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'ARMeilleure/Decoders/OpCode32SimdLong.cs') diff --git a/ARMeilleure/Decoders/OpCode32SimdLong.cs b/ARMeilleure/Decoders/OpCode32SimdLong.cs index 9cde8fff..8d64d673 100644 --- a/ARMeilleure/Decoders/OpCode32SimdLong.cs +++ b/ARMeilleure/Decoders/OpCode32SimdLong.cs @@ -4,9 +4,10 @@ { public bool U { get; } - public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdLong(inst, address, opCode); + public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdLong(inst, address, opCode, false); + public static OpCode CreateT32(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdLong(inst, address, opCode, true); - public OpCode32SimdLong(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode) + public OpCode32SimdLong(InstDescriptor inst, ulong address, int opCode, bool isThumb) : base(inst, address, opCode, isThumb) { int imm3h = (opCode >> 19) & 0x7; @@ -18,7 +19,7 @@ case 4: Size = 2; break; } - U = ((opCode >> 24) & 0x1) != 0; + U = ((opCode >> (isThumb ? 28 : 24)) & 0x1) != 0; RegisterSize = RegisterSize.Simd64; -- cgit v1.2.3